149 lines
4.9 KiB
Plaintext
149 lines
4.9 KiB
Plaintext
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/home/ubuntu/tinyriscv/tests/riscv-compliance/build_generated/rv32Zicsr/I-CSRRWI-01.elf: file format elf32-littleriscv
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Disassembly of section .text.init:
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00000000 <_start>:
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0: 0480006f j 48 <reset_vector>
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00000004 <trap_vector>:
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4: 34202f73 csrr t5,mcause
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8: 00800f93 li t6,8
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c: 03ff0863 beq t5,t6,3c <write_tohost>
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10: 00900f93 li t6,9
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14: 03ff0463 beq t5,t6,3c <write_tohost>
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18: 00b00f93 li t6,11
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1c: 03ff0063 beq t5,t6,3c <write_tohost>
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20: 00000f13 li t5,0
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24: 000f0463 beqz t5,2c <trap_vector+0x28>
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28: 000f0067 jr t5
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2c: 34202f73 csrr t5,mcause
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30: 000f5463 bgez t5,38 <handle_exception>
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34: 0040006f j 38 <handle_exception>
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00000038 <handle_exception>:
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38: 5391e193 ori gp,gp,1337
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0000003c <write_tohost>:
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3c: 00001f17 auipc t5,0x1
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40: fc3f2223 sw gp,-60(t5) # 1000 <tohost>
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44: ff9ff06f j 3c <write_tohost>
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00000048 <reset_vector>:
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48: 00000193 li gp,0
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4c: 00000297 auipc t0,0x0
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50: fb828293 addi t0,t0,-72 # 4 <trap_vector>
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54: 30529073 csrw mtvec,t0
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58: 30005073 csrwi mstatus,0
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5c: 00000297 auipc t0,0x0
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60: 02028293 addi t0,t0,32 # 7c <begin_testcode>
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64: 34129073 csrw mepc,t0
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68: 00000293 li t0,0
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6c: 20000337 lui t1,0x20000
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70: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
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74: 00532023 sw t0,0(t1)
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78: 30200073 mret
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0000007c <begin_testcode>:
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7c: 00002797 auipc a5,0x2
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80: f8478793 addi a5,a5,-124 # 2000 <begin_signature>
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84: 34001073 csrw mscratch,zero
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88: 3400d173 csrrwi sp,mscratch,1
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8c: 34005273 csrrwi tp,mscratch,0
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90: 340fd373 csrrwi t1,mscratch,31
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94: 3407de73 csrrwi t3,mscratch,15
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98: 34085f73 csrrwi t5,mscratch,16
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9c: 34005ff3 csrrwi t6,mscratch,0
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a0: 0007a023 sw zero,0(a5)
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a4: 0027a223 sw sp,4(a5)
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a8: 0047a423 sw tp,8(a5)
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ac: 0067a623 sw t1,12(a5)
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b0: 01c7a823 sw t3,16(a5)
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b4: 01e7aa23 sw t5,20(a5)
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b8: 01f7ac23 sw t6,24(a5)
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bc: 00002097 auipc ra,0x2
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c0: f6008093 addi ra,ra,-160 # 201c <test_B_res>
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c4: 3407d073 csrwi mscratch,15
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c8: 34005073 csrwi mscratch,0
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cc: 0000a023 sw zero,0(ra)
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d0: 00002297 auipc t0,0x2
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d4: f3028293 addi t0,t0,-208 # 2000 <begin_signature>
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d8: 20000337 lui t1,0x20000
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dc: 00830313 addi t1,t1,8 # 20000008 <_end+0x1fffde04>
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e0: 00532023 sw t0,0(t1)
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e4: 00002297 auipc t0,0x2
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e8: f3c28293 addi t0,t0,-196 # 2020 <end_signature>
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ec: 20000337 lui t1,0x20000
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f0: 00c30313 addi t1,t1,12 # 2000000c <_end+0x1fffde08>
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f4: 00532023 sw t0,0(t1)
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f8: 00100293 li t0,1
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fc: 20000337 lui t1,0x20000
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100: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
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104: 00532023 sw t0,0(t1)
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108: 00000013 nop
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10c: 00100193 li gp,1
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110: 00000073 ecall
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00000114 <end_testcode>:
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114: c0001073 unimp
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...
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Disassembly of section .tohost:
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00001000 <tohost>:
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...
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00001100 <fromhost>:
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...
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Disassembly of section .data:
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00002000 <begin_signature>:
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2000: ffff 0xffff
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2002: ffff 0xffff
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2004: ffff 0xffff
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2006: ffff 0xffff
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2008: ffff 0xffff
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200a: ffff 0xffff
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200c: ffff 0xffff
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200e: ffff 0xffff
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2010: ffff 0xffff
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2012: ffff 0xffff
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2014: ffff 0xffff
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2016: ffff 0xffff
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2018: ffff 0xffff
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201a: ffff 0xffff
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0000201c <test_B_res>:
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201c: ffff 0xffff
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201e: ffff 0xffff
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00002020 <end_signature>:
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...
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00002100 <begin_regstate>:
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2100: 0080 addi s0,sp,64
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...
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00002200 <end_regstate>:
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2200: 0004 0x4
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...
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Disassembly of section .riscv.attributes:
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00000000 <.riscv.attributes>:
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0: 1d41 addi s10,s10,-16
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2: 0000 unimp
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4: 7200 flw fs0,32(a2)
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6: 7369 lui t1,0xffffa
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8: 01007663 bgeu zero,a6,14 <trap_vector+0x10>
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c: 00000013 nop
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10: 7205 lui tp,0xfffe1
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12: 3376 fld ft6,376(sp)
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14: 6932 flw fs2,12(sp)
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16: 7032 flw ft0,44(sp)
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18: 0030 addi a2,sp,8
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1a: 0108 addi a0,sp,128
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1c: 0b0a slli s6,s6,0x2
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