260 lines
9.2 KiB
Plaintext
260 lines
9.2 KiB
Plaintext
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/home/ubuntu/tinyriscv/tests/riscv-compliance/build_generated/rv32Zicsr/I-CSRRS-01.elf: file format elf32-littleriscv
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Disassembly of section .text.init:
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00000000 <_start>:
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0: 0480006f j 48 <reset_vector>
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00000004 <trap_vector>:
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4: 34202f73 csrr t5,mcause
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8: 00800f93 li t6,8
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c: 03ff0863 beq t5,t6,3c <write_tohost>
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10: 00900f93 li t6,9
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14: 03ff0463 beq t5,t6,3c <write_tohost>
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18: 00b00f93 li t6,11
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1c: 03ff0063 beq t5,t6,3c <write_tohost>
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20: 00000f13 li t5,0
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24: 000f0463 beqz t5,2c <trap_vector+0x28>
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28: 000f0067 jr t5
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2c: 34202f73 csrr t5,mcause
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30: 000f5463 bgez t5,38 <handle_exception>
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34: 0040006f j 38 <handle_exception>
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00000038 <handle_exception>:
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38: 5391e193 ori gp,gp,1337
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0000003c <write_tohost>:
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3c: 00001f17 auipc t5,0x1
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40: fc3f2223 sw gp,-60(t5) # 1000 <tohost>
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44: ff9ff06f j 3c <write_tohost>
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00000048 <reset_vector>:
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48: 00000193 li gp,0
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4c: 00000297 auipc t0,0x0
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50: fb828293 addi t0,t0,-72 # 4 <trap_vector>
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54: 30529073 csrw mtvec,t0
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58: 30005073 csrwi mstatus,0
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5c: 00000297 auipc t0,0x0
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60: 02028293 addi t0,t0,32 # 7c <begin_testcode>
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64: 34129073 csrw mepc,t0
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68: 00000293 li t0,0
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6c: 20000337 lui t1,0x20000
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70: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
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74: 00532023 sw t0,0(t1)
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78: 30200073 mret
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0000007c <begin_testcode>:
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7c: 00002797 auipc a5,0x2
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80: f8478793 addi a5,a5,-124 # 2000 <begin_signature>
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84: 00100093 li ra,1
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88: 00000113 li sp,0
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8c: 7ff101b7 lui gp,0x7ff10
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90: fff18193 addi gp,gp,-1 # 7ff0ffff <_end+0x7ff0ddfb>
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94: 80000237 lui tp,0x80000
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98: fff00293 li t0,-1
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9c: 34001073 csrw mscratch,zero
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a0: 3400a0f3 csrrs ra,mscratch,ra
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a4: 340010f3 csrrw ra,mscratch,zero
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a8: 34012173 csrrs sp,mscratch,sp
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ac: 34001173 csrrw sp,mscratch,zero
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b0: 3401a1f3 csrrs gp,mscratch,gp
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b4: 340011f3 csrrw gp,mscratch,zero
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b8: 34022273 csrrs tp,mscratch,tp
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bc: 34001273 csrrw tp,mscratch,zero
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c0: 3402a2f3 csrrs t0,mscratch,t0
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c4: 340012f3 csrrw t0,mscratch,zero
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c8: 0007a023 sw zero,0(a5)
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cc: 0017a223 sw ra,4(a5)
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d0: 0027a423 sw sp,8(a5)
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d4: 0037a623 sw gp,12(a5)
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d8: 0047a823 sw tp,16(a5)
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dc: 0057aa23 sw t0,20(a5)
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e0: 00002297 auipc t0,0x2
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e4: f3828293 addi t0,t0,-200 # 2018 <test_A2_res>
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e8: 00100593 li a1,1
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ec: 00000613 li a2,0
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f0: 7ff106b7 lui a3,0x7ff10
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f4: fff68693 addi a3,a3,-1 # 7ff0ffff <_end+0x7ff0ddfb>
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f8: 80000737 lui a4,0x80000
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fc: fff00793 li a5,-1
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100: 34001073 csrw mscratch,zero
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104: 3405a5f3 csrrs a1,mscratch,a1
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108: 34062673 csrrs a2,mscratch,a2
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10c: 3406a6f3 csrrs a3,mscratch,a3
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110: 34072773 csrrs a4,mscratch,a4
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114: 3407a7f3 csrrs a5,mscratch,a5
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118: 34002873 csrr a6,mscratch
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11c: 00b2a023 sw a1,0(t0)
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120: 00c2a223 sw a2,4(t0)
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124: 00d2a423 sw a3,8(t0)
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128: 00e2a623 sw a4,12(t0)
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12c: 00f2a823 sw a5,16(t0)
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130: 0102aa23 sw a6,20(t0)
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134: 00002d17 auipc s10,0x2
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138: efcd0d13 addi s10,s10,-260 # 2030 <test_B_res>
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13c: 12345ab7 lui s5,0x12345
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140: 678a8a93 addi s5,s5,1656 # 12345678 <_end+0x12343474>
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144: 34001073 csrw mscratch,zero
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148: 340aab73 csrrs s6,mscratch,s5
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14c: 340b2bf3 csrrs s7,mscratch,s6
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150: 34001bf3 csrrw s7,mscratch,zero
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154: 340bac73 csrrs s8,mscratch,s7
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158: 34002cf3 csrr s9,mscratch
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15c: 015d2023 sw s5,0(s10)
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160: 016d2223 sw s6,4(s10)
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164: 017d2423 sw s7,8(s10)
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168: 018d2623 sw s8,12(s10)
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16c: 019d2823 sw s9,16(s10)
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170: 00002097 auipc ra,0x2
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174: ed408093 addi ra,ra,-300 # 2044 <test_C_res>
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178: 42727f37 lui t5,0x42727
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17c: e6ff0f13 addi t5,t5,-401 # 42726e6f <_end+0x42724c6b>
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180: 340f1073 csrw mscratch,t5
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184: 340f2073 csrs mscratch,t5
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188: 0000a023 sw zero,0(ra)
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18c: 01e0a223 sw t5,4(ra)
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190: 00002117 auipc sp,0x2
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194: ebc10113 addi sp,sp,-324 # 204c <test_D_res>
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198: f7ff9fb7 lui t6,0xf7ff9
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19c: 818f8f93 addi t6,t6,-2024 # f7ff8818 <_end+0xf7ff6614>
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1a0: 340f9073 csrw mscratch,t6
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1a4: 34002073 csrr zero,mscratch
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1a8: 34002073 csrr zero,mscratch
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1ac: 34002ff3 csrr t6,mscratch
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1b0: 00012023 sw zero,0(sp)
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1b4: 01f12223 sw t6,4(sp)
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1b8: 00002117 auipc sp,0x2
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1bc: e9c10113 addi sp,sp,-356 # 2054 <test_E_res>
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1c0: 321653b7 lui t2,0x32165
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1c4: 49838393 addi t2,t2,1176 # 32165498 <_end+0x32163294>
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1c8: 963852b7 lui t0,0x96385
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1cc: 27428293 addi t0,t0,628 # 96385274 <_end+0x96383070>
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1d0: 34001073 csrw mscratch,zero
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1d4: 3402a2f3 csrrs t0,mscratch,t0
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1d8: 3403a3f3 csrrs t2,mscratch,t2
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1dc: 34042473 csrrs s0,mscratch,s0
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1e0: 00512023 sw t0,0(sp)
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1e4: 00712223 sw t2,4(sp)
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1e8: 00812423 sw s0,8(sp)
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1ec: 00002297 auipc t0,0x2
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1f0: e1428293 addi t0,t0,-492 # 2000 <begin_signature>
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1f4: 20000337 lui t1,0x20000
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1f8: 00830313 addi t1,t1,8 # 20000008 <_end+0x1fffde04>
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1fc: 00532023 sw t0,0(t1)
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200: 00002297 auipc t0,0x2
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204: e6028293 addi t0,t0,-416 # 2060 <end_signature>
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208: 20000337 lui t1,0x20000
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20c: 00c30313 addi t1,t1,12 # 2000000c <_end+0x1fffde08>
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210: 00532023 sw t0,0(t1)
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214: 00100293 li t0,1
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218: 20000337 lui t1,0x20000
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21c: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
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220: 00532023 sw t0,0(t1)
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224: 00000013 nop
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228: 00100193 li gp,1
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22c: 00000073 ecall
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00000230 <end_testcode>:
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230: c0001073 unimp
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...
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Disassembly of section .tohost:
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00001000 <tohost>:
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...
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00001100 <fromhost>:
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...
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Disassembly of section .data:
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00002000 <begin_signature>:
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2000: ffff 0xffff
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2002: ffff 0xffff
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2004: ffff 0xffff
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2006: ffff 0xffff
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2008: ffff 0xffff
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200a: ffff 0xffff
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200c: ffff 0xffff
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200e: ffff 0xffff
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2010: ffff 0xffff
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2012: ffff 0xffff
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2014: ffff 0xffff
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2016: ffff 0xffff
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00002018 <test_A2_res>:
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2018: ffff 0xffff
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201a: ffff 0xffff
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201c: ffff 0xffff
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201e: ffff 0xffff
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2020: ffff 0xffff
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2022: ffff 0xffff
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2024: ffff 0xffff
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2026: ffff 0xffff
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2028: ffff 0xffff
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202a: ffff 0xffff
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202c: ffff 0xffff
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202e: ffff 0xffff
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00002030 <test_B_res>:
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2030: ffff 0xffff
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2032: ffff 0xffff
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2034: ffff 0xffff
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2036: ffff 0xffff
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2038: ffff 0xffff
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203a: ffff 0xffff
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203c: ffff 0xffff
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203e: ffff 0xffff
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2040: ffff 0xffff
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2042: ffff 0xffff
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00002044 <test_C_res>:
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2044: ffff 0xffff
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2046: ffff 0xffff
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2048: ffff 0xffff
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204a: ffff 0xffff
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0000204c <test_D_res>:
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204c: ffff 0xffff
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204e: ffff 0xffff
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2050: ffff 0xffff
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2052: ffff 0xffff
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00002054 <test_E_res>:
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2054: ffff 0xffff
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2056: ffff 0xffff
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2058: ffff 0xffff
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205a: ffff 0xffff
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205c: ffff 0xffff
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205e: ffff 0xffff
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00002060 <end_signature>:
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...
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00002100 <begin_regstate>:
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2100: 0080 addi s0,sp,64
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...
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00002200 <end_regstate>:
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2200: 0004 0x4
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...
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Disassembly of section .riscv.attributes:
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00000000 <.riscv.attributes>:
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0: 1d41 addi s10,s10,-16
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2: 0000 unimp
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4: 7200 flw fs0,32(a2)
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6: 7369 lui t1,0xffffa
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8: 01007663 bgeu zero,a6,14 <trap_vector+0x10>
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c: 00000013 nop
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10: 7205 lui tp,0xfffe1
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12: 3376 fld ft6,376(sp)
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14: 6932 flw fs2,12(sp)
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16: 7032 flw ft0,44(sp)
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18: 0030 addi a2,sp,8
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1a: 0108 addi a0,sp,128
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1c: 0b0a slli s6,s6,0x2
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