tinyriscv/sim
liangkangnan 1486b5aca8 sim: change uart_tx.v to uart.v
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-06-26 22:44:14 +08:00
..
compliance_test sim: change uart_tx.v to uart.v 2020-06-26 22:44:14 +08:00
README.md sim: add README.md 2020-05-27 23:43:35 +08:00
inst.data reorganize example and optimize interrupt 2020-04-11 19:03:49 +08:00
out.vvp reorganize example and optimize interrupt 2020-04-11 19:03:49 +08:00
sim_default_nowave.bat sim: change uart_tx.v to uart.v 2020-06-26 22:44:14 +08:00
sim_new_nowave.bat sim: change uart_tx.v to uart.v 2020-06-26 22:44:14 +08:00
test_all_isa.py update 2020-03-29 23:19:14 +08:00
tinyriscv_soc_tb.vcd reorganize example and optimize interrupt 2020-04-11 19:03:49 +08:00

README.md

sim_new_nowave.bat

对指定的bin文件(重新生成inst.data文件)进行测试。

使用方法:

sim_new_nowave.bat ..\tests\isa\generated\rv32ui-p-add.bin inst.data

sim_default_nowave.bat

对已经存在的inst.data文件进行测试。

使用方法:

sim_default_nowave.bat

test_all_isa.py

一次性测试所有指令。

使用方法:

python test_all_isa.py