137 lines
4.7 KiB
Python
137 lines
4.7 KiB
Python
# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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"""Generate SystemVerilog designs from IpBlock object"""
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import logging as log
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import os
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from typing import Dict, Optional, Tuple
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from mako import exceptions # type: ignore
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from mako.template import Template # type: ignore
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from pkg_resources import resource_filename
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from .ip_block import IpBlock
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from .multi_register import MultiRegister
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from .reg_base import RegBase
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from .register import Register
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def escape_name(name: str) -> str:
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return name.lower().replace(' ', '_')
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def make_box_quote(msg: str, indent: str = ' ') -> str:
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hr = indent + ('/' * (len(msg) + 6))
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middle = indent + '// ' + msg + ' //'
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return '\n'.join([hr, middle, hr])
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def _get_awparam_name(iface_name: Optional[str]) -> str:
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return (iface_name or 'Iface').capitalize() + 'Aw'
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def get_addr_widths(block: IpBlock) -> Dict[Optional[str], Tuple[str, int]]:
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'''Return the address widths for the device interfaces
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Returns a dictionary keyed by interface name whose values are pairs:
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(paramname, width) where paramname is IfaceAw for an unnamed interface and
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FooAw for an interface called foo. This is constructed in the same order as
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block.reg_blocks.
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If there is a single device interface and that interface is unnamed, use
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the more general parameter name "BlockAw".
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'''
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assert block.reg_blocks
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if len(block.reg_blocks) == 1 and None in block.reg_blocks:
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return {None: ('BlockAw', block.reg_blocks[None].get_addr_width())}
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return {name: (_get_awparam_name(name), rb.get_addr_width())
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for name, rb in block.reg_blocks.items()}
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def get_type_name_pfx(block: IpBlock, iface_name: Optional[str]) -> str:
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return block.name.lower() + ('' if iface_name is None
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else '_{}'.format(iface_name.lower()))
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def get_r0(reg: RegBase) -> Register:
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'''Get a Register representing an entry in the RegBase'''
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if isinstance(reg, Register):
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return reg
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else:
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assert isinstance(reg, MultiRegister)
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return reg.reg
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def get_iface_tx_type(block: IpBlock,
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iface_name: Optional[str],
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hw2reg: bool) -> str:
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x2x = 'hw2reg' if hw2reg else 'reg2hw'
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pfx = get_type_name_pfx(block, iface_name)
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return '_'.join([pfx, x2x, 't'])
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def get_reg_tx_type(block: IpBlock, reg: RegBase, hw2reg: bool) -> str:
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'''Get the name of the hw2reg or reg2hw type for reg'''
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if isinstance(reg, Register):
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r0 = reg
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type_suff = 'reg_t'
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else:
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assert isinstance(reg, MultiRegister)
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r0 = reg.reg
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type_suff = 'mreg_t'
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x2x = 'hw2reg' if hw2reg else 'reg2hw'
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return '_'.join([block.name.lower(),
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x2x,
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r0.name.lower(),
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type_suff])
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def gen_rtl(block: IpBlock, outdir: str) -> int:
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# Read Register templates
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reg_top_tpl = Template(
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filename=resource_filename('reggen', 'reg_top.sv.tpl'))
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reg_pkg_tpl = Template(
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filename=resource_filename('reggen', 'reg_pkg.sv.tpl'))
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# Generate <block>_reg_pkg.sv
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#
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# This defines the various types used to interface between the *_reg_top
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# module(s) and the block itself.
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reg_pkg_path = os.path.join(outdir, block.name.lower() + "_reg_pkg.sv")
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with open(reg_pkg_path, 'w', encoding='UTF-8') as fout:
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try:
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fout.write(reg_pkg_tpl.render(block=block))
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except: # noqa F722 for template Exception handling
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log.error(exceptions.text_error_template().render())
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return 1
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# Generate the register block implementation(s). For a device interface
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# with no name we generate the register module "<block>_reg_top" (writing
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# to <block>_reg_top.sv). In any other case, we also need the interface
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# name, giving <block>_<ifname>_reg_top.
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lblock = block.name.lower()
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for if_name, rb in block.reg_blocks.items():
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if if_name is None:
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mod_base = lblock
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else:
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mod_base = lblock + '_' + if_name.lower()
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mod_name = mod_base + '_reg_top'
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reg_top_path = os.path.join(outdir, mod_name + '.sv')
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with open(reg_top_path, 'w', encoding='UTF-8') as fout:
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try:
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fout.write(reg_top_tpl.render(block=block,
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mod_base=mod_base,
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mod_name=mod_name,
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if_name=if_name,
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rb=rb))
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except: # noqa F722 for template Exception handling
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log.error(exceptions.text_error_template().render())
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return 1
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return 0
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