tinyriscv/rtl
Blue Liang 97efd66e78 add mul instruction
Signed-off-by: Blue Liang <liangkangnan@163.com>
2020-01-02 16:12:13 +08:00
..
defines.v add mul instruction 2020-01-02 16:12:13 +08:00
ex.v add mul instruction 2020-01-02 16:12:13 +08:00
id.v add mul instruction 2020-01-02 16:12:13 +08:00
if_id.v first release 2019-12-04 08:47:19 +08:00
openriscv_core.v first release 2019-12-04 08:47:19 +08:00
pc_reg.v first release 2019-12-04 08:47:19 +08:00
regs.v first release 2019-12-04 08:47:19 +08:00
sim_ram.v first release 2019-12-04 08:47:19 +08:00