92 lines
3.1 KiB
C
92 lines
3.1 KiB
C
#ifndef _UART_REG_DEFS_
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#define _UART_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Register width
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#define UART_PARAM_REG_WIDTH 32
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#define UART0_BASE_ADDR (0x05000000)
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#define UART1_BASE_ADDR (0x09000000)
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#define UART2_BASE_ADDR (0x0A000000)
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#define UART0 (UART0_BASE_ADDR)
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#define UART1 (UART1_BASE_ADDR)
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#define UART2 (UART2_BASE_ADDR)
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#define UART_REG(base, offset) (*((volatile uint32_t *)(base + offset)))
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#define UART_TX_FIFO_LEN (8)
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#define UART_RX_FIFO_LEN UART_TX_FIFO_LEN
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typedef void (*myputc)(uint8_t);
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void uart0_putc(uint8_t c);
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uint8_t uart0_getc();
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void uart1_putc(uint8_t c);
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uint8_t uart1_getc();
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void uart2_putc(uint8_t c);
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uint8_t uart2_getc();
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void uart_init(uint32_t base, myputc put);
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void uart_tx_enable(uint32_t base, uint8_t en);
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void uart_rx_enable(uint32_t base, uint8_t en);
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void uart_tx_fifo_empty_int_enable(uint32_t base, uint8_t en);
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void uart_rx_fifo_not_empty_int_enable(uint32_t base, uint8_t en);
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void uart_set_baud_div(uint32_t base, uint32_t div);
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void uart_reset_tx_fifo(uint32_t base);
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void uart_reset_rx_fifo(uint32_t base);
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uint8_t uart_tx_fifo_full(uint32_t base);
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uint8_t uart_rx_fifo_full(uint32_t base);
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uint8_t uart_tx_fifo_empty(uint32_t base);
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uint8_t uart_rx_fifo_empty(uint32_t base);
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uint8_t uart_tx_idle(uint32_t base);
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uint8_t uart_rx_idle(uint32_t base);
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uint8_t uart_get_rx_fifo_data(uint32_t base);
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void uart_set_tx_fifo_data(uint32_t base, uint8_t data);
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// UART control register
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#define UART_CTRL_REG_OFFSET 0x0
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#define UART_CTRL_REG_RESVAL 0xd90000
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#define UART_CTRL_TX_EN_BIT 0
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#define UART_CTRL_RX_EN_BIT 1
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#define UART_CTRL_TX_FIFO_EMPTY_INT_EN_BIT 2
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#define UART_CTRL_RX_FIFO_NOT_EMPTY_INT_EN_BIT 3
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#define UART_CTRL_TX_FIFO_RST_BIT 4
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#define UART_CTRL_RX_FIFO_RST_BIT 5
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#define UART_CTRL_BAUD_DIV_MASK 0xffff
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#define UART_CTRL_BAUD_DIV_OFFSET 16
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#define UART_CTRL_BAUD_DIV_FIELD \
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((bitfield_field32_t) { .mask = UART_CTRL_BAUD_DIV_MASK, .index = UART_CTRL_BAUD_DIV_OFFSET })
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// UART status register
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#define UART_STATUS_REG_OFFSET 0x4
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#define UART_STATUS_REG_RESVAL 0x3c
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#define UART_STATUS_TXFULL_BIT 0
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#define UART_STATUS_RXFULL_BIT 1
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#define UART_STATUS_TXEMPTY_BIT 2
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#define UART_STATUS_RXEMPTY_BIT 3
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#define UART_STATUS_TXIDLE_BIT 4
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#define UART_STATUS_RXIDLE_BIT 5
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// UART TX data register
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#define UART_TXDATA_REG_OFFSET 0x8
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#define UART_TXDATA_REG_RESVAL 0x0
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#define UART_TXDATA_TXDATA_MASK 0xff
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#define UART_TXDATA_TXDATA_OFFSET 0
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#define UART_TXDATA_TXDATA_FIELD \
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((bitfield_field32_t) { .mask = UART_TXDATA_TXDATA_MASK, .index = UART_TXDATA_TXDATA_OFFSET })
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// UART RX data register
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#define UART_RXDATA_REG_OFFSET 0xc
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#define UART_RXDATA_REG_RESVAL 0x0
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#define UART_RXDATA_RXDATA_MASK 0xff
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#define UART_RXDATA_RXDATA_OFFSET 0
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#define UART_RXDATA_RXDATA_FIELD \
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((bitfield_field32_t) { .mask = UART_RXDATA_RXDATA_MASK, .index = UART_RXDATA_RXDATA_OFFSET })
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _UART_REG_DEFS_
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