tinyriscv/sim
liangkangnan 8b51737477 add interrupt support and example
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-03-08 15:09:30 +08:00
..
inst.data add interrupt support and example 2020-03-08 15:09:30 +08:00
out.vvp add interrupt support and example 2020-03-08 15:09:30 +08:00
sim_default_nowave.bat add peripheral: timer 2020-03-08 15:07:17 +08:00
sim_new_nowave.bat add peripheral: timer 2020-03-08 15:07:17 +08:00
tinyriscv_core_tb.v add interrupt support and example 2020-03-08 15:09:30 +08:00
tinyriscv_core_tb.vcd add interrupt support and example 2020-03-08 15:09:30 +08:00