82 lines
2.6 KiB
Plaintext
82 lines
2.6 KiB
Plaintext
# 时钟约束50MHz
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set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 } [get_ports {clk}];
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create_clock -add -name sys_clk_pin -period 20.00 -waveform {0 10} [get_ports {clk}];
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# 时钟引脚
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set_property IOSTANDARD LVCMOS33 [get_ports clk]
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set_property PACKAGE_PIN N14 [get_ports clk]
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# 复位引脚
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set_property IOSTANDARD LVCMOS33 [get_ports rst]
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set_property PACKAGE_PIN L13 [get_ports rst]
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# 程序执行完毕指示引脚
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set_property IOSTANDARD LVCMOS33 [get_ports over]
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set_property PACKAGE_PIN M16 [get_ports over]
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# 程序执行成功指示引脚
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set_property IOSTANDARD LVCMOS33 [get_ports succ]
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set_property PACKAGE_PIN N16 [get_ports succ]
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# CPU停住指示引脚
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set_property IOSTANDARD LVCMOS33 [get_ports halted_ind]
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set_property PACKAGE_PIN P15 [get_ports halted_ind]
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# 串口下载使能引脚
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set_property IOSTANDARD LVCMOS33 [get_ports uart_debug_pin]
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set_property PACKAGE_PIN K13 [get_ports uart_debug_pin]
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# 串口发送引脚
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set_property IOSTANDARD LVCMOS33 [get_ports uart_tx_pin]
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set_property PACKAGE_PIN M6 [get_ports uart_tx_pin]
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# 串口接收引脚
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set_property IOSTANDARD LVCMOS33 [get_ports uart_rx_pin]
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set_property PACKAGE_PIN N6 [get_ports uart_rx_pin]
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# GPIO0引脚
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set_property IOSTANDARD LVCMOS33 [get_ports {gpio[0]}]
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set_property PACKAGE_PIN P16 [get_ports {gpio[0]}]
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# GPIO1引脚
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set_property IOSTANDARD LVCMOS33 [get_ports {gpio[1]}]
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set_property PACKAGE_PIN T15 [get_ports {gpio[1]}]
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# JTAG TCK引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TCK]
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set_property PACKAGE_PIN N11 [get_ports jtag_TCK]
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#create_clock -name jtag_clk_pin -period 300 [get_ports {jtag_TCK}];
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# JTAG TMS引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TMS]
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set_property PACKAGE_PIN N3 [get_ports jtag_TMS]
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# JTAG TDI引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TDI]
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set_property PACKAGE_PIN N2 [get_ports jtag_TDI]
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# JTAG TDO引脚
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set_property IOSTANDARD LVCMOS33 [get_ports jtag_TDO]
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set_property PACKAGE_PIN M1 [get_ports jtag_TDO]
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# SPI MISO引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_miso]
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set_property PACKAGE_PIN P1 [get_ports spi_miso]
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# SPI MOSI引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_mosi]
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set_property PACKAGE_PIN N1 [get_ports spi_mosi]
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# SPI SS引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_ss]
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set_property PACKAGE_PIN M5 [get_ports spi_ss]
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# SPI CLK引脚
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set_property IOSTANDARD LVCMOS33 [get_ports spi_clk]
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set_property PACKAGE_PIN N4 [get_ports spi_clk]
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
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set_property CONFIG_MODE SPIx4 [current_design]
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set_property BITSTREAM.CONFIG.CONFIGRATE 50 [current_design]
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