tinyriscv/fpga/constrs
liangkangnan f03f42fc9b rtl: add reset ctrl module
Signed-off-by: liangkangnan <liangkangnan@163.com>
2020-11-18 22:15:08 +08:00
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tinyriscv.xdc rtl: add reset ctrl module 2020-11-18 22:15:08 +08:00