63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
#ifndef _UART_REG_DEFS_
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#define _UART_REG_DEFS_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Register width
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#define UART_PARAM_REG_WIDTH 32
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#define UART0_BASE_ADDR (0x50000000)
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#define UART0_REG(offset) (*((volatile uint32_t *)(UART0_BASE_ADDR + offset)))
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// UART control register
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#define UART_CTRL_REG_OFFSET 0x0
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#define UART_CTRL_REG_RESVAL 0xd90000
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#define UART_CTRL_TX_EN_BIT 0
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#define UART_CTRL_RX_EN_BIT 1
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#define UART_CTRL_TX_FIFO_EMPTY_INT_EN_BIT 2
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#define UART_CTRL_RX_FIFO_NOT_EMPTY_INT_EN_BIT 3
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#define UART_CTRL_TX_FIFO_RST_BIT 4
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#define UART_CTRL_RX_FIFO_RST_BIT 5
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#define UART_CTRL_BAUD_DIV_MASK 0xffff
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#define UART_CTRL_BAUD_DIV_OFFSET 16
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#define UART_CTRL_BAUD_DIV_FIELD \
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((bitfield_field32_t) { .mask = UART_CTRL_BAUD_DIV_MASK, .index = UART_CTRL_BAUD_DIV_OFFSET })
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// UART status register
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#define UART_STATUS_REG_OFFSET 0x4
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#define UART_STATUS_REG_RESVAL 0x3c
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#define UART_STATUS_TXFULL_BIT 0
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#define UART_STATUS_RXFULL_BIT 1
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#define UART_STATUS_TXEMPTY_BIT 2
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#define UART_STATUS_RXEMPTY_BIT 3
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#define UART_STATUS_TXIDLE_BIT 4
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#define UART_STATUS_RXIDLE_BIT 5
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// UART TX data register
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#define UART_TXDATA_REG_OFFSET 0x8
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#define UART_TXDATA_REG_RESVAL 0x0
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#define UART_TXDATA_TXDATA_MASK 0xff
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#define UART_TXDATA_TXDATA_OFFSET 0
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#define UART_TXDATA_TXDATA_FIELD \
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((bitfield_field32_t) { .mask = UART_TXDATA_TXDATA_MASK, .index = UART_TXDATA_TXDATA_OFFSET })
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// UART RX data register
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#define UART_RXDATA_REG_OFFSET 0xc
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#define UART_RXDATA_REG_RESVAL 0x0
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#define UART_RXDATA_RXDATA_MASK 0xff
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#define UART_RXDATA_RXDATA_OFFSET 0
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#define UART_RXDATA_RXDATA_FIELD \
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((bitfield_field32_t) { .mask = UART_RXDATA_RXDATA_MASK, .index = UART_RXDATA_RXDATA_OFFSET })
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typedef void (*putc)(uint8_t);
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void uart0_init(putc put);
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uint8_t uart0_getc();
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void uart0_putc(uint8_t c);
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#ifdef __cplusplus
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} // extern "C"
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#endif
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#endif // _UART_REG_DEFS_
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