tinyriscv/rtl
liangkangnan b6d3b39f4d rtl:perips:spi: add fifo reset
Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-10-12 10:22:02 +08:00
..
core rtl🔝 add more perips 2021-09-10 09:57:39 +08:00
debug rtl🚌 use gnt and rvalid signal 2021-09-01 09:54:32 +08:00
perips rtl:perips:spi: add fifo reset 2021-10-12 10:22:02 +08:00
sys_bus rtl🚌 use gnt and rvalid signal 2021-09-01 09:54:32 +08:00
top rtl🔝 add more perips 2021-09-10 09:57:39 +08:00
utils rtl:utils:edge_detect: add DP parameter 2021-09-01 14:14:36 +08:00