tinyriscv/tests/isa/generated/rv32ui-p-sra.verilog

101 lines
4.7 KiB
Plaintext
Executable File

@00000000
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B7 0E 00 80 93 01 20 00 63 14 DF 59 B7 00 00 80
13 01 10 00 33 DF 20 40 B7 0E 00 C0 93 01 30 00
63 18 DF 57 B7 00 00 80 13 01 70 00 33 DF 20 40
B7 0E 00 FF 93 01 40 00 63 1C DF 55 B7 00 00 80
13 01 E0 00 33 DF 20 40 B7 0E FE FF 93 01 50 00
63 10 DF 55 B7 00 00 80 93 80 10 00 13 01 F0 01
33 DF 20 40 93 0E F0 FF 93 01 60 00 63 12 DF 53
B7 00 00 80 93 80 F0 FF 13 01 00 00 33 DF 20 40
B7 0E 00 80 93 8E FE FF 93 01 70 00 63 12 DF 51
B7 00 00 80 93 80 F0 FF 13 01 10 00 33 DF 20 40
B7 0E 00 40 93 8E FE FF 93 01 80 00 63 12 DF 4F
B7 00 00 80 93 80 F0 FF 13 01 70 00 33 DF 20 40
B7 0E 00 01 93 8E FE FF 93 01 90 00 63 12 DF 4D
B7 00 00 80 93 80 F0 FF 13 01 E0 00 33 DF 20 40
B7 0E 02 00 93 8E FE FF 93 01 A0 00 63 12 DF 4B
B7 00 00 80 93 80 F0 FF 13 01 F0 01 33 DF 20 40
93 0E 00 00 93 01 B0 00 63 14 DF 49 B7 80 81 81
93 80 10 18 13 01 00 00 33 DF 20 40 B7 8E 81 81
93 8E 1E 18 93 01 C0 00 63 14 DF 47 B7 80 81 81
93 80 10 18 13 01 10 00 33 DF 20 40 B7 CE C0 C0
93 8E 0E 0C 93 01 D0 00 63 14 DF 45 B7 80 81 81
93 80 10 18 13 01 70 00 33 DF 20 40 B7 0E 03 FF
93 8E 3E 30 93 01 E0 00 63 14 DF 43 B7 80 81 81
93 80 10 18 13 01 E0 00 33 DF 20 40 B7 0E FE FF
93 8E 6E 60 93 01 F0 00 63 14 DF 41 B7 80 81 81
93 80 10 18 13 01 F0 01 33 DF 20 40 93 0E F0 FF
93 01 00 01 63 16 DF 3F B7 80 81 81 93 80 10 18
13 01 00 FC 33 DF 20 40 B7 8E 81 81 93 8E 1E 18
93 01 10 01 63 16 DF 3D B7 80 81 81 93 80 10 18
13 01 10 FC 33 DF 20 40 B7 CE C0 C0 93 8E 0E 0C
93 01 20 01 63 16 DF 3B B7 80 81 81 93 80 10 18
13 01 70 FC 33 DF 20 40 B7 0E 03 FF 93 8E 3E 30
93 01 30 01 63 16 DF 39 B7 80 81 81 93 80 10 18
13 01 E0 FC 33 DF 20 40 B7 0E FE FF 93 8E 6E 60
93 01 40 01 63 16 DF 37 B7 80 81 81 93 80 10 18
13 01 F0 FF 33 DF 20 40 93 0E F0 FF 93 01 50 01
63 18 DF 35 B7 00 00 80 13 01 70 00 B3 D0 20 40
B7 0E 00 FF 93 01 60 01 63 9C D0 33 B7 00 00 80
13 01 E0 00 33 D1 20 40 B7 0E FE FF 93 01 70 01
63 10 D1 33 93 00 70 00 B3 D0 10 40 93 0E 00 00
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13 01 70 00 33 DF 20 40 13 03 0F 00 13 02 12 00
93 02 20 00 E3 14 52 FE B7 0E 00 FF 93 01 90 01
63 10 D3 2F 13 02 00 00 B7 00 00 80 13 01 E0 00
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93 02 20 00 E3 12 52 FE B7 0E FE FF 93 01 A0 01
63 18 D3 2B 13 02 00 00 B7 00 00 80 13 01 F0 01
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13 02 12 00 93 02 20 00 E3 10 52 FE 93 0E F0 FF
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13 01 70 00 33 DF 20 40 13 02 12 00 93 02 20 00
E3 16 52 FE B7 0E 00 FF 93 01 C0 01 63 1A DF 25
13 02 00 00 B7 00 00 80 13 01 E0 00 13 00 00 00
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B7 0E FE FF 93 01 D0 01 63 14 DF 23 13 02 00 00
B7 00 00 80 13 01 F0 01 13 00 00 00 13 00 00 00
33 DF 20 40 13 02 12 00 93 02 20 00 E3 12 52 FE
93 0E F0 FF 93 01 E0 01 63 1C DF 1F 13 02 00 00
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13 02 12 00 93 02 20 00 E3 14 52 FE B7 0E 00 FF
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13 02 12 00 93 02 20 00 E3 12 52 FE B7 0E FE FF
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13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E F0 FF
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B7 00 00 80 33 DF 20 40 13 02 12 00 93 02 20 00
E3 16 52 FE B7 0E 00 FF 93 01 20 02 63 12 DF 15
13 02 00 00 13 01 E0 00 B7 00 00 80 13 00 00 00
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B7 0E FE FF 93 01 30 02 63 1C DF 11 13 02 00 00
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33 DF 20 40 13 02 12 00 93 02 20 00 E3 12 52 FE
93 0E F0 FF 93 01 40 02 63 14 DF 0F 13 02 00 00
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13 02 12 00 93 02 20 00 E3 12 52 FE B7 0E FE FF
93 01 60 02 63 16 DF 09 13 02 00 00 13 01 F0 01
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13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E F0 FF
93 01 70 02 63 1E DF 05 93 00 F0 00 33 51 10 40
93 0E 00 00 93 01 80 02 63 14 D1 05 93 00 00 02
33 D1 00 40 93 0E 00 02 93 01 90 02 63 1A D1 03
B3 50 00 40 93 0E 00 00 93 01 A0 02 63 92 D0 03
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93 0E 00 00 93 01 B0 02 63 14 D0 01 63 16 30 00
73 D0 00 10 6F 00 00 00 73 D0 01 10 6F 00 00 00
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00 00 00 00
@00000600
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