/home/ubuntu/tinyriscv/tests/riscv-compliance/build_generated/rv32Zifencei/I-FENCE.I-01.elf:     file format elf32-littleriscv


Disassembly of section .text.init:

00000000 <_start>:
   0:	0480006f          	j	48 <reset_vector>

00000004 <trap_vector>:
   4:	34202f73          	csrr	t5,mcause
   8:	00800f93          	li	t6,8
   c:	03ff0863          	beq	t5,t6,3c <write_tohost>
  10:	00900f93          	li	t6,9
  14:	03ff0463          	beq	t5,t6,3c <write_tohost>
  18:	00b00f93          	li	t6,11
  1c:	03ff0063          	beq	t5,t6,3c <write_tohost>
  20:	00000f13          	li	t5,0
  24:	000f0463          	beqz	t5,2c <trap_vector+0x28>
  28:	000f0067          	jr	t5
  2c:	34202f73          	csrr	t5,mcause
  30:	000f5463          	bgez	t5,38 <handle_exception>
  34:	0040006f          	j	38 <handle_exception>

00000038 <handle_exception>:
  38:	5391e193          	ori	gp,gp,1337

0000003c <write_tohost>:
  3c:	00001f17          	auipc	t5,0x1
  40:	fc3f2223          	sw	gp,-60(t5) # 1000 <tohost>
  44:	ff9ff06f          	j	3c <write_tohost>

00000048 <reset_vector>:
  48:	00000193          	li	gp,0
  4c:	00000297          	auipc	t0,0x0
  50:	fb828293          	addi	t0,t0,-72 # 4 <trap_vector>
  54:	30529073          	csrw	mtvec,t0
  58:	30005073          	csrwi	mstatus,0
  5c:	00000297          	auipc	t0,0x0
  60:	02028293          	addi	t0,t0,32 # 7c <begin_testcode>
  64:	34129073          	csrw	mepc,t0
  68:	00000293          	li	t0,0
  6c:	20000337          	lui	t1,0x20000
  70:	01030313          	addi	t1,t1,16 # 20000010 <_end+0x1fffde0c>
  74:	00532023          	sw	t0,0(t1)
  78:	30200073          	mret

0000007c <begin_testcode>:
  7c:	00002817          	auipc	a6,0x2
  80:	f8880813          	addi	a6,a6,-120 # 2004 <test_A_data>
  84:	00002897          	auipc	a7,0x2
  88:	f8c88893          	addi	a7,a7,-116 # 2010 <begin_signature>
  8c:	00000193          	li	gp,0
  90:	00082083          	lw	ra,0(a6)
  94:	00482103          	lw	sp,4(a6)
  98:	00002a17          	auipc	s4,0x2
  9c:	f68a0a13          	addi	s4,s4,-152 # 2000 <instr_A_src>
  a0:	00000a97          	auipc	s5,0x0
  a4:	014a8a93          	addi	s5,s5,20 # b4 <instr_A_dst>
  a8:	000a2783          	lw	a5,0(s4)
  ac:	00faa023          	sw	a5,0(s5)
  b0:	0000100f          	fence.i

000000b4 <instr_A_dst>:
  b4:	00000137          	lui	sp,0x0
  b8:	0018a023          	sw	ra,0(a7)
  bc:	0028a223          	sw	sp,4(a7)
  c0:	0038a423          	sw	gp,8(a7)
  c4:	00f8a623          	sw	a5,12(a7)
  c8:	00002297          	auipc	t0,0x2
  cc:	f4828293          	addi	t0,t0,-184 # 2010 <begin_signature>
  d0:	20000337          	lui	t1,0x20000
  d4:	00830313          	addi	t1,t1,8 # 20000008 <_end+0x1fffde04>
  d8:	00532023          	sw	t0,0(t1)
  dc:	00002297          	auipc	t0,0x2
  e0:	f4428293          	addi	t0,t0,-188 # 2020 <end_signature>
  e4:	20000337          	lui	t1,0x20000
  e8:	00c30313          	addi	t1,t1,12 # 2000000c <_end+0x1fffde08>
  ec:	00532023          	sw	t0,0(t1)
  f0:	00100293          	li	t0,1
  f4:	20000337          	lui	t1,0x20000
  f8:	01030313          	addi	t1,t1,16 # 20000010 <_end+0x1fffde0c>
  fc:	00532023          	sw	t0,0(t1)
 100:	00000013          	nop
 104:	00100193          	li	gp,1
 108:	00000073          	ecall

0000010c <end_testcode>:
 10c:	c0001073          	unimp
	...

Disassembly of section .tohost:

00001000 <tohost>:
	...

00001100 <fromhost>:
	...

Disassembly of section .data:

00002000 <instr_A_src>:
    2000:	001101b3          	add	gp,sp,ra

00002004 <test_A_data>:
    2004:	0030                	addi	a2,sp,8
    2006:	0000                	unimp
    2008:	0012                	c.slli	zero,0x4
    200a:	0000                	unimp
    200c:	0000                	unimp
	...

00002010 <begin_signature>:
    2010:	ffff                	0xffff
    2012:	ffff                	0xffff
    2014:	ffff                	0xffff
    2016:	ffff                	0xffff
    2018:	ffff                	0xffff
    201a:	ffff                	0xffff
    201c:	ffff                	0xffff
    201e:	ffff                	0xffff

00002020 <end_signature>:
	...

00002100 <begin_regstate>:
    2100:	0080                	addi	s0,sp,64
	...

00002200 <end_regstate>:
    2200:	0004                	0x4
	...

Disassembly of section .riscv.attributes:

00000000 <.riscv.attributes>:
   0:	1d41                	addi	s10,s10,-16
   2:	0000                	unimp
   4:	7200                	flw	fs0,32(a2)
   6:	7369                	lui	t1,0xffffa
   8:	01007663          	bgeu	zero,a6,14 <trap_vector+0x10>
   c:	00000013          	nop
  10:	7205                	lui	tp,0xfffe1
  12:	3376                	fld	ft6,376(sp)
  14:	6932                	flw	fs2,12(sp)
  16:	7032                	flw	ft0,44(sp)
  18:	0030                	addi	a2,sp,8
  1a:	0108                	addi	a0,sp,128
  1c:	0b0a                	slli	s6,s6,0x2