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Commit Graph

  • 470239fdd9
         Pre Merge pull request !6 from UkiTenzai/PGL22G UkiTenzai 2024-07-18 09:55:56 +0000
  • 9294baf8d9
         Pre Merge pull request !5 from cxing/N/A cxing 2024-07-18 09:55:55 +0000
  • 86d779f7f3 doc: add first file master Blue Liang 2024-07-18 17:54:41 +0800
  • 1159d1dd86 README: remove doc link Blue Liang 2024-07-03 10:45:21 +0800
  • 3ea48ec9f2 已完成代码更新和readme撰写 UkiTenzai 2023-07-14 19:00:21 +0800
  • 280a548e62 sdk:examples: update gpio verilator liangkangnan 2023-04-18 15:13:25 +0800
  • 6942faa82d sdk:examples: update led_toggle liangkangnan 2023-04-18 14:54:54 +0800
  • 5745f0140d fpga:xilinx:cmod_a7:constrs: leds and spi use same pin liangkangnan 2023-04-18 14:52:56 +0800
  • 47b744a7ec tools:bootrom: enable qspi mode liangkangnan 2023-04-04 11:11:39 +0800
  • d65cdee729 rtl:perips:bootrom: enable qspi mode liangkangnan 2023-04-04 11:10:28 +0800
  • 574474acc8 rtl:perips:xip: add qspi mode support liangkangnan 2023-04-04 11:09:10 +0800
  • e379fdd445 fpga:doc: add cmod_a7 sch liangkangnan 2023-04-04 11:07:03 +0800
  • 5dd0fa4034 sdk: update flash_ctrl liangkangnan 2023-04-03 10:36:04 +0800
  • b61fd21057 tools: remove flash_loader liangkangnan 2023-04-01 15:53:20 +0800
  • 6d37b9fc9c rtl:perips: remove flash_ctrl module liangkangnan 2023-04-01 15:50:29 +0800
  • ad3dbd1a51 rtl:core: add bootrom and xip module address liangkangnan 2023-04-01 15:32:56 +0800
  • 6c6f6cf7af tools:openocd: add flash band for tinyriscv liangkangnan 2023-04-01 15:23:09 +0800
  • da19d3ebe5 fpga:cmod_a7:top: add bootrom module and use xip instead of flash_ctrl module liangkangnan 2023-04-01 15:18:17 +0800
  • 3eaa4cdc97 sim🔝 add bootrom module and use xip instead of flash_ctrl module liangkangnan 2023-04-01 15:16:07 +0800
  • f704e47e4a rtl:perips: add bootrom and xip liangkangnan 2023-04-01 15:11:40 +0800
  • 6aa5f18429 tools: add bootrom liangkangnan 2023-04-01 15:06:00 +0800
  • 9aba174156 sdk🔗 change flash addr to 0x02000000 liangkangnan 2023-04-01 15:04:35 +0800
  • b3cfa2dfa6 rtl: do not need request all the access period liangkangnan 2023-04-01 14:12:59 +0800
  • 1b296983eb tools: add debug_rom liangkangnan 2023-03-30 20:36:56 +0800
  • 09c0b531b0 sdk: use cmod_a7 for default board, its input clock = 12MHz liangkangnan 2023-03-28 10:25:49 +0800
  • d6a14415c9 rtl: optimized for instr fetch and mem access liangkangnan 2023-03-28 10:19:07 +0800
  • 7993b97612 rtl:utils: add async_fifo module liangkangnan 2023-03-23 20:47:51 +0800
  • 8bfee71fd0 rtl:sys_bus: fix only select one master liangkangnan 2023-03-21 17:54:36 +0800
  • e2f7c52d81
         Pre Merge pull request !3 from Gary-Lu/bram Gary-Lu 2023-03-21 09:22:28 +0000
  • c68ac2c135
         update fpga/AL_EG4/移植到EG4S.md. Gary-Lu 2023-03-21 09:22:25 +0000
  • 5077993572
         update fpga/AL_EG4/移植到EG4S.md. Gary-Lu 2023-03-21 09:21:49 +0000
  • 36380133f4 regtool: update README liangkangnan 2023-01-18 10:43:58 +0800
  • b24fc9044b update README.md liangkangnan 2022-12-27 09:23:32 +0800
  • 769f93c70a fpga: cmod_a7: add sch doc liangkangnan 2022-10-10 09:03:42 +0800
  • 384320c7b1 fpga: constrs: change for cmod_a7 extern board liangkangnan 2022-10-10 09:02:45 +0800
  • ccadad262f sdk: add support for gd25xx nor flash liangkangnan 2022-10-10 09:00:03 +0800
  • 26a221a132 sdk:examples:led_toggle: update liangkangnan 2022-08-20 15:03:55 +0800
  • 22407f4b1f sdk:examples: add led_toggle liangkangnan 2022-08-20 15:00:17 +0800
  • ed2644b66e fpga:README: update bin file download address liangkangnan 2022-08-18 20:00:06 +0800
  • 53ae450762 fpga: update README.md liangkangnan 2022-08-18 09:17:40 +0800
  • a27d949a5d tools:openocd: update to support cmsis_dap-v2 driver liangkangnan 2022-08-17 10:22:17 +0800
  • b8e9d8165e
         update rtl/core/pc_reg.v. 添加注释 cxing 2022-08-16 01:45:01 +0000
  • 490c52054b fpga: xilinx: cmod_a7: add bin.tcl and mcs.tcl liangkangnan 2022-08-12 19:33:49 +0800
  • 4c16dfb254 rtl: move top module into fpga dir liangkangnan 2022-08-10 08:13:38 +0800
  • 4958cb66c2 rtl: top: move out sim_jtag module liangkangnan 2022-08-06 14:32:56 +0800
  • 504f836de5 sim: remote_bitbang: fix print when connected liangkangnan 2022-08-05 09:53:16 +0800
  • cfa17b8607 修改： README.md luogantt 2022-06-20 18:53:47 +0800
  • 3666009efc fpga: xilinx: add tcl scripts liangkangnan 2022-05-07 17:55:56 +0800
  • 1ac6d71b6e 移植到安路EG4系列FPGA。 lk 2022-01-07 14:06:58 +0800
  • 5b7b657384 sim: add CFLAGS VL_DEBUG liangkangnan 2022-01-05 17:30:29 +0800
  • 92e89292b1 tests:isa: remove unused test case liangkangnan 2021-12-20 15:04:55 +0800
  • bed8ed965e sdk:bsp: add link script for flash liangkangnan 2021-11-25 09:02:32 +0800
  • 3120110be3 rtl:core: ifu support for boot from flash liangkangnan 2021-11-25 09:00:09 +0800
  • d67f1abab3 tools:openocd: update openocd_win.exe liangkangnan 2021-11-18 19:27:38 +0800
  • 4720d020e4 rtl:perips:flash_ctrl: fix read state liangkangnan 2021-11-16 15:24:37 +0800
  • cfc170f896 tools: add flash_loader liangkangnan 2021-11-11 10:04:17 +0800
  • 27dc2ed0c1 tools: update linux openocd liangkangnan 2021-11-11 09:58:42 +0800
  • 8f4c2cb7fe sdk:examples: add flash_ctrl liangkangnan 2021-11-04 10:13:11 +0800
  • e097662c62 sim🔝 print sim result optimized liangkangnan 2021-11-03 11:51:19 +0800
  • ecd4ecafc6 sdk:bsp:lib: clear sim result flags when start running liangkangnan 2021-11-03 11:48:02 +0800
  • 15928977e1 rtl:perips: add flash_ctrl module liangkangnan 2021-11-02 10:54:37 +0800
  • 274b19363b rtl:perips:spi: fix ss delay ctrl by sw liangkangnan 2021-11-01 09:55:10 +0800
  • 1e510dab9d rtl: utils: add up_counter module liangkangnan 2021-11-01 09:52:46 +0800
  • d8a7a67787 sdk:lib: add flash n25q liangkangnan 2021-10-22 09:02:43 +0800
  • b1dc8941b2 update README liangkangnan 2021-10-16 16:51:04 +0800
  • 90d9349128 sdk:lib:spi: update fifo op liangkangnan 2021-10-12 10:31:57 +0800
  • 448f733f22 sdk:include:spi: add fifo reset liangkangnan 2021-10-12 10:23:16 +0800
  • b6d3b39f4d rtl:perips:spi: add fifo reset liangkangnan 2021-10-12 10:22:02 +0800
  • 04d4dd8dfa regtool: update README.md liangkangnan 2021-10-12 10:16:32 +0800
  • 0667139d7e sdk:examples: remove spi_master2 liangkangnan 2021-09-29 09:26:57 +0800
  • 2d9aab4ecb sdk: add arg for multi perips liangkangnan 2021-09-29 09:24:04 +0800
  • 9a8637be12 sdk:examples: update spi_master liangkangnan 2021-09-24 09:26:02 +0800
  • 22e6866dea sdk:examples:spi_master: add quad fast read liangkangnan 2021-09-23 09:45:48 +0800
  • 75de08cfc8 sdk:examples: add spi_master liangkangnan 2021-09-17 09:09:38 +0800
  • 718e16a46d sdk:bsp: add spi liangkangnan 2021-09-17 09:08:29 +0800
  • 3903d9e7f4 rtl:pinmux: add more spi mux liangkangnan 2021-09-17 09:06:47 +0800
  • d40f39a091 sdk:examples: use pinmux to config IO liangkangnan 2021-09-13 18:11:20 +0800
  • 3b7fa13a73 fpga:constrs: reassign pins liangkangnan 2021-09-10 09:59:34 +0800
  • 22a038cc09 rtl🔝 add more perips liangkangnan 2021-09-10 09:57:39 +0800
  • 519ef32ae7 sdk: adapt to more perips liangkangnan 2021-09-10 09:56:21 +0800
  • 55f37e93fa rtl:perips:gpio: increase to 16 gpios liangkangnan 2021-09-10 09:51:08 +0800
  • 4086a2d863 rtl:perips: add pinmux liangkangnan 2021-09-10 09:48:44 +0800
  • 4d0f63ef86 sdk:examples: add int_preempt liangkangnan 2021-09-07 09:46:09 +0800
  • 57690b00bd rtl:perips: add spi master liangkangnan 2021-09-06 10:01:56 +0800
  • f74f2d8f5d rtl:utils:edge_detect: add DP parameter liangkangnan 2021-09-01 14:14:36 +0800
  • 574708bd89 rtl:utils:gen_buf: add handle for DP=0 liangkangnan 2021-09-01 14:12:21 +0800
  • ae3ff5a211 rtl🚌 use gnt and rvalid signal liangkangnan 2021-09-01 09:54:32 +0800
  • f7231a2f15 sdk:examples: add i2c_slave liangkangnan 2021-08-26 09:28:23 +0800
  • 2c11873056 rtl:i2c: fix slave read error liangkangnan 2021-08-26 09:25:18 +0800
  • e708eb6d4d rtl:perips:i2c: add i2c slave liangkangnan 2021-08-25 17:51:35 +0800
  • 7e57d8db17 rtl:perips:rvic: bug fix liangkangnan 2021-08-25 17:47:18 +0800
  • 9905a7c3a2 sdk:bsp: add i2c0 slave api liangkangnan 2021-08-20 14:17:01 +0800
  • 08492931fc bsp:lib:sim_ctrl: add dump wave api liangkangnan 2021-08-20 11:51:49 +0800
  • 92e1e5a77a sim: add dump wave enable by softwave liangkangnan 2021-08-20 11:50:21 +0800
  • facd5d31f4 sdk:examples: add i2c_master liangkangnan 2021-08-20 09:26:13 +0800
  • 3f400f2fb8 tmp commit liangkangnan 2021-08-19 17:45:45 +0800
  • 1218a1ef4b sdk: rename to timer0_irq_handler liangkangnan 2021-08-19 10:22:18 +0800
  • 4ac826a398 sdk:bsp: add i2c liangkangnan 2021-08-19 09:45:40 +0800
  • cd9e219d1b fpga:xilinx:constrs: add i2c pin liangkangnan 2021-08-19 09:44:36 +0800
  • 2afcba47ea rtl:perips: add i2c master liangkangnan 2021-08-19 09:43:12 +0800