liangkangnan
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b57bfe7736
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rtl: timing optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-09 21:00:14 +08:00 |
Blue Liang
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fccb920070
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rtl: core: optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-08-13 09:01:27 +08:00 |
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liangkangnan
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260246f488
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fix nop inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-05-07 22:40:31 +08:00 |
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liangkangnan
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837af2c977
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use = instead of <= in combination logic
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-05-02 11:58:44 +08:00 |
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liangkangnan
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dcac95dfab
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add code comments
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 20:14:37 +08:00 |
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liangkangnan
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ce225394df
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fix reg1 reg2 bits width
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:35:43 +08:00 |
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liangkangnan
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0e188d4934
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reorganize example and optimize interrupt
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-11 19:03:49 +08:00 |
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liangkangnan
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6660f18b3d
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support CSR inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-05 22:22:34 +08:00 |
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liangkangnan
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ecb9fca8c1
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-29 23:19:14 +08:00 |
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liangkangnan
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8b51737477
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add interrupt support and example
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-08 15:09:30 +08:00 |
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liangkangnan
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8208cbc100
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support JTAG
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-01 14:55:36 +08:00 |