liangkangnan
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136dc45a09
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change core clock to 25MHZ
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-17 16:40:25 +08:00 |
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liangkangnan
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536d28ede3
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-17 10:22:04 +08:00 |
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liangkangnan
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6e466fbbf7
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add perips
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-14 21:00:57 +08:00 |
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liangkangnan
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5811bdde13
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debug: add hw breakpoint support
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-14 14:37:47 +08:00 |
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liangkangnan
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b02b38bddc
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-11 16:21:58 +08:00 |
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liangkangnan
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36147d9391
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-11 10:35:36 +08:00 |
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liangkangnan
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4a4c08bc69
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-04 21:11:43 +08:00 |
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liangkangnan
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10d8d35a13
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rtl: fix combilation loop
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-02 14:51:12 +08:00 |
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liangkangnan
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738fba1d6f
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-30 18:27:30 +08:00 |
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liangkangnan
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53865371ce
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-30 16:41:24 +08:00 |
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liangkangnan
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dfa8bf490e
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bus: fix bug
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-30 08:59:10 +08:00 |
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liangkangnan
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f9412fca3c
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-29 19:27:25 +08:00 |
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liangkangnan
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77812d60df
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-26 14:08:26 +08:00 |
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liangkangnan
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4da79b6046
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debug: add sba module
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-26 09:48:19 +08:00 |
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liangkangnan
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ec65381ba9
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-25 17:14:09 +08:00 |
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liangkangnan
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462cc4c786
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-13 19:49:09 +08:00 |
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liangkangnan
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05e2441d24
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-13 16:34:00 +08:00 |
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liangkangnan
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9ac1b31965
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rtl: add reset module
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-13 14:12:47 +08:00 |
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liangkangnan
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7803e89d68
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-13 11:10:06 +08:00 |
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liangkangnan
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e53f681063
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rtl: optimize csr regs
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-13 09:25:29 +08:00 |
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liangkangnan
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bd2d372c66
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-12 19:18:35 +08:00 |
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liangkangnan
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16fa475ba7
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rtl:perips: remove vld rdy signals
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-09 20:47:00 +08:00 |
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liangkangnan
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ad775ef316
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-09 20:27:33 +08:00 |
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liangkangnan
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f1f09584ee
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optimize ifu and lsu
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-09 20:22:34 +08:00 |
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liangkangnan
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e3667e0ddd
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-04-01 11:29:00 +08:00 |
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liangkangnan
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9943d02600
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-03-31 18:00:19 +08:00 |
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liangkangnan
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c070f0b49d
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-03-31 15:25:22 +08:00 |
Blue Liang
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8214134b89
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tmp commit, unstable
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-03-29 15:14:50 +08:00 |
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liangkangnan
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fdc776ab5e
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rtl: debug: support reset cmd
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-12-06 20:06:12 +08:00 |
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liangkangnan
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f03f42fc9b
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rtl: add reset ctrl module
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-11-18 22:15:08 +08:00 |
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liangkangnan
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5c9f1a140e
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rtl: add mem access misaligned exception
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-11-08 22:08:03 +08:00 |
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Blue Liang
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60a4f7d6df
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rtl: add generate block name
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-10-26 17:01:04 +08:00 |
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liangkangnan
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2b44f1e8f3
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first release
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-10-23 21:26:18 +08:00 |
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liangkangnan
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4876225f60
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rtl: utils: add full handshake CDC source
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-23 21:39:20 +08:00 |
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liangkangnan
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386ba909ba
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rtl: jtag: handle DM module in cpu clock domain
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-23 21:37:00 +08:00 |
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liangkangnan
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633a1d0b15
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rtl: debug: fix latch
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-20 22:18:58 +08:00 |
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liangkangnan
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29623c8d2a
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rtl: div: fix error
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-14 22:22:42 +08:00 |
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liangkangnan
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045f482fe1
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rtl: jtag: optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-13 17:47:18 +08:00 |
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liangkangnan
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8c3d7ac932
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rtl: div: timing optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-12 14:17:34 +08:00 |
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liangkangnan
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8468303ba7
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rtl: add gen_buf.v
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-12 14:14:59 +08:00 |
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liangkangnan
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b57bfe7736
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rtl: timing optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-09 21:00:14 +08:00 |
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liangkangnan
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a4a723e1e7
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rtl: add gen_dff.v
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-09 20:58:08 +08:00 |
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liangkangnan
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b6754f002c
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rtl: div: optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-09-06 23:17:56 +08:00 |
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liangkangnan
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0ed81ff1a8
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rtl: remove unused signals
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-08-29 22:35:43 +08:00 |
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liangkangnan
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10a3df3e5a
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rtl: core: fix sync interrupt
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-08-15 16:05:06 +08:00 |
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Blue Liang
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fccb920070
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rtl: core: optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-08-13 09:01:27 +08:00 |
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Blue Liang
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fa958a6153
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rtl: rib: arbitrated by logic instead of clock
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-08-13 08:56:01 +08:00 |
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liangkangnan
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e23ad11e7e
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rtl: fix sync interrupt return address
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-07-25 22:15:03 +08:00 |
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liangkangnan
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b39062a4ea
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rtl: fix interrupt return address
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-07-25 16:23:45 +08:00 |
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liangkangnan
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b0c4d1fa4d
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rtl:timer: update interrupt assert
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-07-12 22:33:15 +08:00 |