liangkangnan
|
6143d9ee6a
|
rtl:gpio: remove gpio.h
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-17 10:20:30 +08:00 |
liangkangnan
|
12467d1554
|
sdk:bsp: adapte to new rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-14 14:05:08 +08:00 |
liangkangnan
|
d4b670217a
|
rtl:perips: rewrite rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-14 14:03:47 +08:00 |
liangkangnan
|
477d9efc34
|
sdk:examples: adapte to new perips
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-13 10:07:13 +08:00 |
liangkangnan
|
fdd953c0f0
|
sdk:bsp: update gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-13 09:35:56 +08:00 |
liangkangnan
|
5fa659a084
|
rtl:perips: rewrite gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-13 09:33:15 +08:00 |
liangkangnan
|
9387f56a33
|
sdk:examples: add uart_int
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-13 09:31:19 +08:00 |
liangkangnan
|
aaa5684cc9
|
sdk:bsp: remove machine_timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-11 14:47:35 +08:00 |
liangkangnan
|
0437ff99da
|
sdk: examples: remove machine_timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-08-10 11:30:08 +08:00 |
liangkangnan
|
79f83c1ad4
|
tmp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-08-10 11:26:46 +08:00 |
liangkangnan
|
ad5adcb843
|
tmp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-08-10 11:09:53 +08:00 |
liangkangnan
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c4fe45ffaf
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sdk: examples: add timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-08-10 09:54:20 +08:00 |
liangkangnan
|
64041b4d2b
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rtl: perips: rewrite timer module
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-10 09:47:37 +08:00 |
liangkangnan
|
f6c8a046c7
|
tools:regtool: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-07 15:26:12 +08:00 |
liangkangnan
|
c178a8fbb2
|
tools: add regtool
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-07 15:07:44 +08:00 |
liangkangnan
|
72b982d133
|
sdk:lib: rewrite uart
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-07 14:30:29 +08:00 |
liangkangnan
|
58f180a92f
|
rtl: perips: rewrite uart module
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-08-07 14:28:46 +08:00 |
liangkangnan
|
cba47c1f64
|
use none-vector interrupt mode
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-26 09:54:38 +08:00 |
liangkangnan
|
9e7653a96a
|
sdk:bsp: adapt to rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-22 09:40:26 +08:00 |
liangkangnan
|
3227fb1ffd
|
rtl:perips: add rvic
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-22 09:36:04 +08:00 |
liangkangnan
|
e9044a7efe
|
tests:random_instruction: add .gitignore
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-12 19:46:00 +08:00 |
liangkangnan
|
5ebb41c477
|
tests/random_instruction: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-12 19:29:40 +08:00 |
liangkangnan
|
8f3aa6bb2c
|
tests: add random instruction
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-12 18:22:02 +08:00 |
liangkangnan
|
ac245a5d6c
|
tools: add riscv-torture
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-12 18:13:01 +08:00 |
liangkangnan
|
18de7f2e00
|
test: use csr_sstatus for test result
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-10 14:49:36 +08:00 |
liangkangnan
|
fd2c981317
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-07-09 15:18:09 +08:00 |
liangkangnan
|
53e4263706
|
rtl: ifu optimization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-07-03 15:09:13 +08:00 |
liangkangnan
|
34218536c1
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-07-01 09:46:56 +08:00 |
liangkangnan
|
3269041c0b
|
rtl: add config for branch predictor
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-28 11:31:04 +08:00 |
liangkangnan
|
2db9e7dbb9
|
rtl: add sync_fifo module
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-28 11:09:37 +08:00 |
liangkangnan
|
96d6976c44
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-19 16:33:50 +08:00 |
liangkangnan
|
5f56e8d0fb
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-18 20:04:46 +08:00 |
liangkangnan
|
4e99bd4f33
|
README: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-11 09:49:31 +08:00 |
liangkangnan
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7196d33074
|
rtl: add static branch predict unit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-11 09:44:26 +08:00 |
liangkangnan
|
e26dda807e
|
README: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-08 19:35:29 +08:00 |
liangkangnan
|
f9f78976fb
|
rtl: core: optimize mem access
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-05 20:00:15 +08:00 |
liangkangnan
|
6121a21322
|
rtl: top: make jtag host highest priority
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-05 19:59:07 +08:00 |
liangkangnan
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4436e0cc6a
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tools: update openocd for win
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-05 19:48:41 +08:00 |
liangkangnan
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b7b8572542
|
tb: add tests type macro
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-05 16:59:26 +08:00 |
liangkangnan
|
d9a1f89fd2
|
tests: riscv-compliance: add support
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-06-05 16:02:02 +08:00 |
liangkangnan
|
6059c4c3a7
|
tests: isa: add support
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-05 15:11:33 +08:00 |
liangkangnan
|
c847244c5b
|
rtl: perips: fix machine timer
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-06-03 09:23:50 +08:00 |
liangkangnan
|
646bc96419
|
openocd: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-31 14:07:36 +08:00 |
liangkangnan
|
6d8015727e
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-31 10:27:01 +08:00 |
liangkangnan
|
247a5b6354
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-28 15:10:37 +08:00 |
liangkangnan
|
cd9ac0adae
|
debug: change dmi addr bits to 7
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-28 10:37:50 +08:00 |
liangkangnan
|
fb461a6176
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-25 11:45:53 +08:00 |
liangkangnan
|
c6163aaff1
|
temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-25 09:41:00 +08:00 |
liangkangnan
|
fd5413791d
|
example: coremark: print tips after uart init
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-22 15:26:24 +08:00 |
liangkangnan
|
87849fbd35
|
README: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
|
2021-05-21 17:08:46 +08:00 |