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70 Commits
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70 Commits (43aca8195c10c3bbdff7b996ba76a73a83740b19)

Author SHA1 Message Date
liangkangnan 43aca8195c add clint hold input signal 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:08:46 +08:00
liangkangnan db8a65ebf4 use larger rom and ram for more example 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:07:31 +08:00
liangkangnan f110a2c0e0 set MPIE and MPP 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:05:48 +08:00
liangkangnan 6cf86e0286 stop div when interrupt assert 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:04:44 +08:00
liangkangnan 09513f8f2c support preemption 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 17:03:13 +08:00
liangkangnan 0ac39d9cdd add FPGA xdc file 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 16:59:23 +08:00
liangkangnan 7434cad275 example: add FreeRTOS 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-25 16:57:57 +08:00
liangkangnan 39af40a476 add FPGA clock 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-19 11:05:08 +08:00
liangkangnan 69321f870e add other 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-19 10:55:53 +08:00
liangkangnan f1f89f7bf5 add toolchain and mcmodel configuration 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 21:27:26 +08:00
liangkangnan ea9b4de53d update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:53:34 +08:00
liangkangnan 7708930ecf update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:49:42 +08:00
liangkangnan 57ca3832a0 add C example instruction 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:42:20 +08:00
liangkangnan dcac95dfab add code comments 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 20:14:37 +08:00
liangkangnan 73098bdcd8 optimized 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:39:27 +08:00
liangkangnan 18577d9b61 use oneshot mode 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:37:22 +08:00
liangkangnan ce225394df fix reg1 reg2 bits width 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:35:43 +08:00
liangkangnan b29781a8de optimize div 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:23:46 +08:00
liangkangnan 2638240d0b add mepc reg 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:22:20 +08:00
liangkangnan 96f8d6e5a0 optimized: use statemachine 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-18 11:21:09 +08:00
liangkangnan 59acc36185 update coremark 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-12 19:51:03 +08:00
liangkangnan ef8f1d5ca9 uart_tx: update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-12 19:38:26 +08:00
liangkangnan ba91618324 add uart.c 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-12 19:36:06 +08:00
liangkangnan 356e47b543 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-12 17:58:13 +08:00
liangkangnan 39fb6311da add coremark 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-12 15:21:26 +08:00
liangkangnan 3771cba0aa add coremark score 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-11 22:43:23 +08:00
liangkangnan 0c79eef623 example: add coremark 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-11 22:30:09 +08:00
liangkangnan cf7862f50c add README.md 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-11 19:40:36 +08:00
liangkangnan 0e188d4934 reorganize example and optimize interrupt 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-11 19:03:49 +08:00
liangkangnan 20d1055ea4 example: reorganization 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 21:28:56 +08:00
liangkangnan 115a8ea384 pic: add addr_alloc.jpg 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 20:29:57 +08:00
liangkangnan 36a2ffdf5a example: add uart_tx 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 20:20:31 +08:00
liangkangnan b2827b2fb4 uart: update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 19:54:40 +08:00
liangkangnan 000bb19ad2 example: add gpio 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 17:19:53 +08:00
liangkangnan e714a0ba63 add write dpc 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-06 14:34:12 +08:00
liangkangnan c934727ea8 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-05 22:45:53 +08:00
liangkangnan 66967e9bb0 pic: update arch.jpg 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-05 22:35:35 +08:00
liangkangnan a68f31b604 perips: add uart_tx and gpio 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-05 22:27:00 +08:00
liangkangnan 6660f18b3d support CSR inst 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-04-05 22:22:34 +08:00
liangkangnan ecb9fca8c1 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-29 23:19:14 +08:00
liangkangnan 7d9dc3f83a update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-21 18:02:40 +08:00
liangkangnan c57f3cf121 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-21 13:58:24 +08:00
liangkangnan a224aa1d59 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-08 15:35:07 +08:00
liangkangnan a4148afa4d update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-08 15:29:53 +08:00
liangkangnan 150ca7ca2b update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-08 15:14:04 +08:00
liangkangnan 8b51737477 add interrupt support and example 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-08 15:09:30 +08:00
liangkangnan c7c9193982 add peripheral: timer 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-08 15:07:17 +08:00
liangkangnan 429f5de88a update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-03 20:47:55 +08:00
liangkangnan 534dba1706 update 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-01 17:20:05 +08:00
liangkangnan 97afab88d6 add openocd 
Signed-off-by: liangkangnan <liangkangnan@163.com>
 2020-03-01 15:17:39 +08:00