liangkangnan
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ea21ca6a38
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FPGA: add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 20:13:58 +08:00 |
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liangkangnan
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c40dd0c603
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:34:58 +08:00 |
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liangkangnan
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39750cffc8
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add freertos
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:24:51 +08:00 |
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liangkangnan
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aead35700c
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add signal
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:15:46 +08:00 |
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liangkangnan
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d92352e1c2
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use relative include path
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:15:00 +08:00 |
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liangkangnan
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02d19b9e6f
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add mie and mstatus reg
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:13:12 +08:00 |
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liangkangnan
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4a530ab894
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add ECALL inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:11:53 +08:00 |
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liangkangnan
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02bcee9aa9
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sync for different clock
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:10:11 +08:00 |
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liangkangnan
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43aca8195c
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add clint hold input signal
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:08:46 +08:00 |
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liangkangnan
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db8a65ebf4
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use larger rom and ram for more example
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:07:31 +08:00 |
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liangkangnan
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f110a2c0e0
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set MPIE and MPP
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:05:48 +08:00 |
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liangkangnan
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6cf86e0286
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stop div when interrupt assert
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:04:44 +08:00 |
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liangkangnan
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09513f8f2c
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support preemption
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 17:03:13 +08:00 |
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liangkangnan
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0ac39d9cdd
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add FPGA xdc file
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 16:59:23 +08:00 |
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liangkangnan
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7434cad275
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example: add FreeRTOS
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-25 16:57:57 +08:00 |
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liangkangnan
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39af40a476
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add FPGA clock
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-19 11:05:08 +08:00 |
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liangkangnan
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69321f870e
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add other
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-19 10:55:53 +08:00 |
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liangkangnan
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f1f89f7bf5
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add toolchain and mcmodel configuration
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 21:27:26 +08:00 |
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liangkangnan
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ea9b4de53d
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 20:53:34 +08:00 |
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liangkangnan
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7708930ecf
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 20:49:42 +08:00 |
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liangkangnan
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57ca3832a0
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add C example instruction
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 20:42:20 +08:00 |
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liangkangnan
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dcac95dfab
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add code comments
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 20:14:37 +08:00 |
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liangkangnan
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73098bdcd8
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optimized
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:39:27 +08:00 |
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liangkangnan
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18577d9b61
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use oneshot mode
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:37:22 +08:00 |
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liangkangnan
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ce225394df
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fix reg1 reg2 bits width
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:35:43 +08:00 |
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liangkangnan
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b29781a8de
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optimize div
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:23:46 +08:00 |
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liangkangnan
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2638240d0b
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add mepc reg
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:22:20 +08:00 |
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liangkangnan
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96f8d6e5a0
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optimized: use statemachine
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-18 11:21:09 +08:00 |
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liangkangnan
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59acc36185
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update coremark
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-12 19:51:03 +08:00 |
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liangkangnan
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ef8f1d5ca9
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uart_tx: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-12 19:38:26 +08:00 |
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liangkangnan
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ba91618324
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add uart.c
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-12 19:36:06 +08:00 |
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liangkangnan
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356e47b543
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-12 17:58:13 +08:00 |
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liangkangnan
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39fb6311da
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add coremark
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-12 15:21:26 +08:00 |
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liangkangnan
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3771cba0aa
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add coremark score
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-11 22:43:23 +08:00 |
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liangkangnan
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0c79eef623
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example: add coremark
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-11 22:30:09 +08:00 |
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liangkangnan
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cf7862f50c
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add README.md
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-11 19:40:36 +08:00 |
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liangkangnan
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0e188d4934
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reorganize example and optimize interrupt
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-11 19:03:49 +08:00 |
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liangkangnan
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20d1055ea4
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example: reorganization
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 21:28:56 +08:00 |
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liangkangnan
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115a8ea384
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pic: add addr_alloc.jpg
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 20:29:57 +08:00 |
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liangkangnan
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36a2ffdf5a
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example: add uart_tx
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 20:20:31 +08:00 |
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liangkangnan
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b2827b2fb4
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uart: update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 19:54:40 +08:00 |
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liangkangnan
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000bb19ad2
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example: add gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 17:19:53 +08:00 |
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liangkangnan
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e714a0ba63
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add write dpc
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-06 14:34:12 +08:00 |
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liangkangnan
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c934727ea8
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-05 22:45:53 +08:00 |
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liangkangnan
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66967e9bb0
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pic: update arch.jpg
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-05 22:35:35 +08:00 |
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liangkangnan
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a68f31b604
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perips: add uart_tx and gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-05 22:27:00 +08:00 |
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liangkangnan
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6660f18b3d
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support CSR inst
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-04-05 22:22:34 +08:00 |
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liangkangnan
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ecb9fca8c1
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-29 23:19:14 +08:00 |
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liangkangnan
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7d9dc3f83a
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-21 18:02:40 +08:00 |
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liangkangnan
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c57f3cf121
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update
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-03-21 13:58:24 +08:00 |