liangkangnan
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4c16dfb254
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rtl: move top module into fpga dir
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2022-08-10 08:13:38 +08:00 |
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liangkangnan
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5b7b657384
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sim: add CFLAGS VL_DEBUG
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2022-01-05 17:30:29 +08:00 |
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liangkangnan
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5811bdde13
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debug: add hw breakpoint support
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-05-14 14:37:47 +08:00 |
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liangkangnan
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c070f0b49d
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temp commit
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-03-31 15:25:22 +08:00 |
Blue Liang
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8214134b89
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tmp commit, unstable
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2021-03-29 15:14:50 +08:00 |