liangkangnan
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f03f42fc9b
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rtl: add reset ctrl module
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-11-18 22:15:08 +08:00 |
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liangkangnan
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2b44f1e8f3
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first release
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-10-23 21:26:18 +08:00 |
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liangkangnan
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233bb1fb23
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fpga: constrs: do not constraint JTAG_CLK clk
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-07-25 16:20:54 +08:00 |
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liangkangnan
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8c751095fd
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fpga: constrs: add uart_debug_en pin
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-07-04 14:33:33 +08:00 |
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liangkangnan
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317061682d
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fpga: constrs: add uart rx pin
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-06-26 22:41:48 +08:00 |
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liangkangnan
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f2010755bb
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fpga: constrs: add spi flash config
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-06-14 22:13:44 +08:00 |
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liangkangnan
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5c70814fc6
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fpga: constrs: add one more gpio
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-06-14 10:41:52 +08:00 |
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liangkangnan
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09d45f9ea9
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rename FPGA to fpga
Signed-off-by: liangkangnan <liangkangnan@163.com>
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2020-05-31 12:05:28 +08:00 |