rtl:utils:edge_detect: add DP parameter

Signed-off-by: liangkangnan <liangkangnan@163.com>
2021-09-01 14:14:36 +08:00 · 2021-09-01 14:14:36 +08:00 · f74f2d8f5d
parent 574708bd89
commit f74f2d8f5d
1 changed files with 4 additions and 2 deletions
--- a/rtl/utils/edge_detect.sv
+++ b/rtl/utils/edge_detect.sv
@ -15,7 +15,9 @@
 */

 // 上升沿、下降沿检测
-module edge_detect (
+module edge_detect #(
+    parameter int DP = 2
+    )(
    input  logic        clk_i,
    input  logic        rst_ni,
    input  logic        sig_i,
@ -39,7 +41,7 @@ module edge_detect (
    end

    gen_ticks_sync #(
-        .DP(2),
+        .DP(DP),
        .DW(1)
    ) u_sync (
        .clk(clk_i),