From bd2d372c669c884ae5d71dd3b4a3325a50184ea7 Mon Sep 17 00:00:00 2001 From: liangkangnan Date: Mon, 12 Apr 2021 19:18:35 +0800 Subject: [PATCH] temp commit Signed-off-by: liangkangnan --- rtl/core/defines.sv | 21 ++++++++++++++++++--- rtl/top/tinyriscv_soc_top.sv | 8 ++++---- 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/rtl/core/defines.sv b/rtl/core/defines.sv index f4b706c..33946e1 100644 --- a/rtl/core/defines.sv +++ b/rtl/core/defines.sv @@ -14,15 +14,30 @@ limitations under the License. */ -`define CPU_RESET_ADDR 32'h0 // CPU复位地址 +`define CPU_RESET_ADDR 32'h00000000 // CPU复位地址 `define CPU_CLOCK_HZ 50000000 // CPU时钟(50MHZ) -`define INST_MEM_START_ADDR 32'h0 // 指令存储器起始地址 -`define INST_MEM_END_ADDR 32'h0fffffff // 指令存储器结束地址 `define JTAG_RESET_FF_LEVELS 5 `define ROM_DEPTH 8192 // 指令存储器深度，单位为word(4字节) `define RAM_DEPTH 4096 // 数据存储器深度，单位为word(4字节) +// 外设地址、大小 +// ROM +`define ROM_ADDR_MASK ~32'hfffff +`define ROM_ADDR_BASE 32'h00000000 +// RAM +`define RAM_ADDR_MASK ~32'hfffff +`define RAM_ADDR_BASE 32'h10000000 +// GPIO +`define GPIO_ADDR_MASK ~32'hffff +`define GPIO_ADDR_BASE 32'h40000000 +// Timer +`define TIMER_ADDR_MASK ~32'hffff +`define TIMER_ADDR_BASE 32'h20000000 +// UART +`define UART_ADDR_MASK ~32'hffff +`define UART_ADDR_BASE 32'h30000000 + `define INT_WIDTH 8 `define INT_NONE 8'h0 diff --git a/rtl/top/tinyriscv_soc_top.sv b/rtl/top/tinyriscv_soc_top.sv index c0a94e6..c27801b 100644 --- a/rtl/top/tinyriscv_soc_top.sv +++ b/rtl/top/tinyriscv_soc_top.sv @@ -96,8 +96,8 @@ module tinyriscv_soc_top( ); - assign slave_addr_mask[Rom] = ~32'hfffff; - assign slave_addr_base[Rom] = 32'h00000000; + assign slave_addr_mask[Rom] = `ROM_ADDR_MASK; + assign slave_addr_base[Rom] = `ROM_ADDR_BASE; // 指令存储器 rom #( .DP(`ROM_DEPTH) @@ -111,8 +111,8 @@ module tinyriscv_soc_top( .data_o(slave_rdata[Rom]) ); - assign slave_addr_mask[Ram] = ~32'hfffff; - assign slave_addr_base[Ram] = 32'h10000000; + assign slave_addr_mask[Ram] = `RAM_ADDR_MASK; + assign slave_addr_base[Ram] = `RAM_ADDR_BASE; // 数据存储器 ram #( .DP(`RAM_DEPTH)