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rtl:core: add bootrom and xip module address 

Signed-off-by: liangkangnan <liangkangnan@163.com>
verilator
liangkangnan 2023-04-01 15:32:56 +08:00
parent 6c6f6cf7af
commit ad3dbd1a51
1 changed files with 6 additions and 6 deletions
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12
rtl/core/defines.sv
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@ -32,9 +32,12 @@
// ROM // ROM
`define ROM_ADDR_MASK ~32'hfffff `define ROM_ADDR_MASK ~32'hfffff
`define ROM_ADDR_BASE 32'h00000000 `define ROM_ADDR_BASE 32'h00000000
// Flash // Bootrom
`define FLASH_ADDR_MASK ~32'hffffff `define BOOTROM_ADDR_MASK ~32'hffffff
`define FLASH_ADDR_BASE 32'h01000000 `define BOOTROM_ADDR_BASE 32'h01000000
// Xip
`define XIP_ADDR_MASK ~32'hffffff
`define XIP_ADDR_BASE 32'h02000000
// DEBUG // DEBUG
`define DEBUG_ADDR_MASK ~32'hfffff `define DEBUG_ADDR_MASK ~32'hfffff
`define DEBUG_ADDR_BASE 32'h10000000 `define DEBUG_ADDR_BASE 32'h10000000
@ -71,9 +74,6 @@
// Timer2 // Timer2
`define TIMER2_ADDR_MASK ~32'hffff `define TIMER2_ADDR_MASK ~32'hffff
`define TIMER2_ADDR_BASE 32'h0D000000 `define TIMER2_ADDR_BASE 32'h0D000000
// Flash ctrl
`define FLASH_CTRL_ADDR_MASK ~32'hffffff
`define FLASH_CTRL_ADDR_BASE 32'h0E000000
// I2C1 // I2C1
`define I2C1_ADDR_MASK ~32'hffff `define I2C1_ADDR_MASK ~32'hffff
`define I2C1_ADDR_BASE 32'h0B000000 `define I2C1_ADDR_BASE 32'h0B000000