From a4a723e1e739379d0b69e9415a8b83dc2ab1e32c Mon Sep 17 00:00:00 2001 From: liangkangnan Date: Wed, 9 Sep 2020 20:58:08 +0800 Subject: [PATCH] rtl: add gen_dff.v Signed-off-by: liangkangnan --- rtl/utils/gen_dff.v | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 rtl/utils/gen_dff.v diff --git a/rtl/utils/gen_dff.v b/rtl/utils/gen_dff.v new file mode 100644 index 0000000..3ee48f8 --- /dev/null +++ b/rtl/utils/gen_dff.v @@ -0,0 +1,43 @@ + /* + Copyright 2020 Blue Liang, liangkangnan@163.com + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. + */ + + +module gen_pipe_dff #( + parameter DW = 32)( + + input wire clk, + input wire rst, + input wire hold_en, + + input wire[DW-1:0] def_val, + input wire[DW-1:0] din, + output wire[DW-1:0] qout + + ); + + reg[DW-1:0] qout_r; + + always @ (posedge clk) begin + if (!rst | hold_en) begin + qout_r <= def_val; + end else begin + qout_r <= din; + end + end + + assign qout = qout_r; + +endmodule