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temp commit 

Signed-off-by: liangkangnan <liangkangnan@163.com>
pull/4/head
liangkangnan 2021-04-26 14:08:26 +08:00
parent 4da79b6046
commit 77812d60df
1 changed files with 5 additions and 2 deletions
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7
rtl/debug/jtag_dm.sv
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@ -84,6 +84,7 @@ module jtag_dm #(
wire cmdbusy;
wire sbdata_valid;
wire[31:0] sbdata;
wire[19:0] hartsel;
// DM regs
reg[31:0] dmstatus;
@ -98,6 +99,8 @@ module jtag_dm #(
assign dm_sbaddress = sbaddress0_q;
assign hartsel = {dmcontrol_q[`Hartselhi], dmcontrol_q[`Hartsello]};
assign dm_op = dmi_data_i[DMI_OP_BITS-1:0];
assign dm_op_addr = dmi_data_i[DMI_REQ_BITS-1:DMI_DATA_BITS+DMI_OP_BITS];
assign dm_op_data = dmi_data_i[DMI_DATA_BITS+DMI_OP_BITS-1:DMI_OP_BITS];
@ -163,6 +166,8 @@ module jtag_dm #(
dmstatus[`Anyhalted] = halted;
dmstatus[`Allrunning] = ~halted;
dmstatus[`Anyrunning] = ~halted;
dmstatus[`Allnonexistent] = hartsel > 20'h0;
dmstatus[`Anynonexistent] = hartsel > 20'h0;
// abstractcs
cmderr_d = cmderr_q;
@ -266,8 +271,6 @@ module jtag_dm #(
dmcontrol_d[`Setresethaltreq] = 1'b0;
dmcontrol_d[`Clrresethaltreq] = 1'b0;
dmcontrol_d[`Ackhavereset] = 1'b0;
dmcontrol_d[`Hartsello] = 10'h1;
dmcontrol_d[`Hartselhi] = 10'h0;
// 收到resume请求后清resume应答
if (!dmcontrol_q[`Resumereq] && dmcontrol_d[`Resumereq]) begin
clear_resumeack = 1'b1;