diff --git a/sdk/bsp/include/uart.h b/sdk/bsp/include/uart.h
index 51fa174..b83fd55 100644
--- a/sdk/bsp/include/uart.h
+++ b/sdk/bsp/include/uart.h
@@ -1,17 +1,60 @@
-#ifndef _UART_H_
-#define _UART_H_
+#ifndef _UART_REG_DEFS_
+#define _UART_REG_DEFS_
 
-#define UART0_BASE      (0x50000000)
-#define UART0_CTRL      (UART0_BASE + (0x00))
-#define UART0_STATUS    (UART0_BASE + (0x04))
-#define UART0_BAUD      (UART0_BASE + (0x08))
-#define UART0_TXDATA    (UART0_BASE + (0x0c))
-#define UART0_RXDATA    (UART0_BASE + (0x10))
+#ifdef __cplusplus
+extern "C" {
+#endif
+// Register width
+#define UART_PARAM_REG_WIDTH 32
 
-#define UART0_REG(addr) (*((volatile uint32_t *)addr))
+#define UART0_BASE_ADDR      (0x50000000)
+#define UART0_REG(offset)    (*((volatile uint32_t *)(UART0_BASE_ADDR + offset)))
+
+// UART control register
+#define UART_CTRL_REG_OFFSET 0x0
+#define UART_CTRL_REG_RESVAL 0xd90000
+#define UART_CTRL_TX_EN_BIT 0
+#define UART_CTRL_RX_EN_BIT 1
+#define UART_CTRL_TX_FIFO_EMPTY_INT_EN_BIT 2
+#define UART_CTRL_RX_FIFO_NOT_EMPTY_INT_EN_BIT 3
+#define UART_CTRL_TX_FIFO_RST_BIT 4
+#define UART_CTRL_RX_FIFO_RST_BIT 5
+#define UART_CTRL_BAUD_DIV_MASK 0xffff
+#define UART_CTRL_BAUD_DIV_OFFSET 16
+#define UART_CTRL_BAUD_DIV_FIELD \
+  ((bitfield_field32_t) { .mask = UART_CTRL_BAUD_DIV_MASK, .index = UART_CTRL_BAUD_DIV_OFFSET })
+
+// UART status register
+#define UART_STATUS_REG_OFFSET 0x4
+#define UART_STATUS_REG_RESVAL 0x3c
+#define UART_STATUS_TXFULL_BIT 0
+#define UART_STATUS_RXFULL_BIT 1
+#define UART_STATUS_TXEMPTY_BIT 2
+#define UART_STATUS_RXEMPTY_BIT 3
+#define UART_STATUS_TXIDLE_BIT 4
+#define UART_STATUS_RXIDLE_BIT 5
+
+// UART TX data register
+#define UART_TXDATA_REG_OFFSET 0x8
+#define UART_TXDATA_REG_RESVAL 0x0
+#define UART_TXDATA_TXDATA_MASK 0xff
+#define UART_TXDATA_TXDATA_OFFSET 0
+#define UART_TXDATA_TXDATA_FIELD \
+  ((bitfield_field32_t) { .mask = UART_TXDATA_TXDATA_MASK, .index = UART_TXDATA_TXDATA_OFFSET })
+
+// UART RX data register
+#define UART_RXDATA_REG_OFFSET 0xc
+#define UART_RXDATA_REG_RESVAL 0x0
+#define UART_RXDATA_RXDATA_MASK 0xff
+#define UART_RXDATA_RXDATA_OFFSET 0
+#define UART_RXDATA_RXDATA_FIELD \
+  ((bitfield_field32_t) { .mask = UART_RXDATA_RXDATA_MASK, .index = UART_RXDATA_RXDATA_OFFSET })
 
 void uart_init();
-void uart_putc(uint8_t c);
 uint8_t uart_getc();
+void uart_putc(uint8_t c);
 
+#ifdef __cplusplus
+}  // extern "C"
 #endif
+#endif  // _UART_REG_DEFS_
diff --git a/sdk/bsp/lib/uart.c b/sdk/bsp/lib/uart.c
index 0e9e124..9f1a120 100644
--- a/sdk/bsp/lib/uart.c
+++ b/sdk/bsp/lib/uart.c
@@ -7,23 +7,24 @@
 // send one char to uart
 void uart_putc(uint8_t c)
 {
-    while (UART0_REG(UART0_STATUS) & 0x1);
-    UART0_REG(UART0_TXDATA) = c;
+    while (UART0_REG(UART_STATUS_REG_OFFSET) & (1 << UART_STATUS_TXFULL_BIT));
+
+    UART0_REG(UART_TXDATA_REG_OFFSET) = c;
 }
 
 // Block, get one char from uart.
 uint8_t uart_getc()
 {
-    UART0_REG(UART0_STATUS) &= ~0x2;
-    while (!(UART0_REG(UART0_STATUS) & 0x2));
-    return (UART0_REG(UART0_RXDATA) & 0xff);
+    while ((UART0_REG(UART_STATUS_REG_OFFSET) & (1 << UART_STATUS_RXEMPTY_BIT)));
+
+    return (UART0_REG(UART_RXDATA_REG_OFFSET) & 0xff);
 }
 
 // 115200bps, 8 N 1
 void uart_init()
 {
     // enable tx and rx
-    UART0_REG(UART0_CTRL) = 0x3;
+    UART0_REG(UART_CTRL_REG_OFFSET) |= 0x3;
 
     xdev_out(uart_putc);
 }
diff --git a/sdk/examples/uart_loopback/Makefile b/sdk/examples/uart_loopback/Makefile
index 3529efd..381e8c6 100644
--- a/sdk/examples/uart_loopback/Makefile
+++ b/sdk/examples/uart_loopback/Makefile
@@ -3,7 +3,7 @@ RISCV_ABI := ilp32
 RISCV_MCMODEL := medlow
 
 
-TARGET = uart_rx
+TARGET = uart_loopback
 
 
 #CFLAGS += -DSIMULATION