zcy
/
tinyriscv
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

tests: isa: add support 

Signed-off-by: liangkangnan <liangkangnan@163.com>
pull/4/head
liangkangnan 2021-06-05 15:11:33 +08:00
parent c847244c5b
commit 6059c4c3a7
238 changed files with 22246 additions and 2967 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
tests/isa/Makefile
View File

@ -15,12 +15,13 @@ default: all
# Build rules # Build rules
#-------------------------------------------------------------------- #--------------------------------------------------------------------
RISCV_PREFIX ?= ../../tools/gnu-mcu-eclipse-riscv-none-gcc-8.2.0-2.2-20190521-0004-win64/bin/riscv-none-embed- RISCV_PREFIX ?= /opt/riscv32/bin/riscv32-unknown-elf-
RISCV_GCC ?= $(RISCV_PREFIX)gcc RISCV_GCC ?= $(RISCV_PREFIX)gcc
RISCV_GCC_OPTS ?= -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles RISCV_GCC_OPTS ?= -static -mcmodel=medany -fvisibility=hidden -nostdlib -nostartfiles
RISCV_OBJDUMP ?= $(RISCV_PREFIX)objdump --disassemble-all RISCV_OBJDUMP ?= $(RISCV_PREFIX)objdump --disassemble-all
RISCV_OBJCOPY ?= $(RISCV_PREFIX)objcopy RISCV_OBJCOPY ?= $(RISCV_PREFIX)objcopy
BIN_TO_MEM := $(src_dir)/../../tools/BinToMem.py
vpath %.S $(src_dir) vpath %.S $(src_dir)
@ -31,6 +32,7 @@ vpath %.S $(src_dir)
$(RISCV_OBJDUMP) generated/$< > generated/$@ $(RISCV_OBJDUMP) generated/$< > generated/$@
$(RISCV_OBJCOPY) -O verilog generated/$< generated/$<.verilog $(RISCV_OBJCOPY) -O verilog generated/$< generated/$<.verilog
$(RISCV_OBJCOPY) -O binary generated/$< generated/$<.bin $(RISCV_OBJCOPY) -O binary generated/$< generated/$<.bin
$(BIN_TO_MEM) generated/$<.bin generated/$<.mem
define compile_template define compile_template

38
tests/isa/README.md
View File

@ -1,4 +1,34 @@
RV32I instruction source code which copy from riscv(github). RV32I instruction source code which copy from riscv(github).
I have modified it so can run on tinyriscv. I have modified it so can run on tinyriscv.
compile: type make under the cmd windows compile: type make under the cmd windows
recompile: type make after make clean under the cmd windows recompile: type make after make clean under the cmd windows
编译方法：
1.修改Makefile里GNU工具链的路径：
```
RISCV_PREFIX ?= /opt/riscv32/bin/riscv32-unknown-elf-
```
2.修改Makefile里bin文件转men文件工具的路径：
```
BIN_TO_MEM := $(src_dir)/../../tools/BinToMem.py
```
3.编译
```
make
```
4.重新编译
```
make clean
make
```

BIN
tests/isa/generated/rv32ui-p-add Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-add.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-add.dump
View File

@ -395,15 +395,15 @@ Disassembly of section .text.init:
4e4: 00301863 bne zero,gp,4f4 <pass> 4e4: 00301863 bne zero,gp,4f4 <pass>
000004e8 <fail>: 000004e8 <fail>:
4e8: 00100d13 li s10,1 4e8: 00000d93 li s11,0
4ec: 00000d93 li s11,0 4ec: 00100d13 li s10,1
000004f0 <loop_fail>: 000004f0 <loop_fail>:
4f0: 0000006f j 4f0 <loop_fail> 4f0: 0000006f j 4f0 <loop_fail>
000004f4 <pass>: 000004f4 <pass>:
4f4: 00100d13 li s10,1 4f4: 00100d93 li s11,1
4f8: 00100d93 li s11,1 4f8: 00100d13 li s10,1
000004fc <loop_pass>: 000004fc <loop_pass>:
4fc: 0000006f j 4fc <loop_pass> 4fc: 0000006f j 4fc <loop_pass>
@ -417,3 +417,18 @@ Disassembly of section .tohost:
00000580 <fromhost>: 00000580 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

354
tests/isa/generated/rv32ui-p-add.mem Normal file
View File

@ -0,0 +1,354 @@
00000d13
00000d93
00000093
00000113
00208f33
00000e93
00200193
4ddf1663
00100093
00100113
00208f33
00200e93
00300193
4bdf1a63
00300093
00700113
00208f33
00a00e93
00400193
49df1e63
00000093
ffff8137
00208f33
ffff8eb7
00500193
49df1263
800000b7
00000113
00208f33
80000eb7
00600193
47df1663
800000b7
ffff8137
00208f33
7fff8eb7
00700193
45df1a63
00000093
00008137
fff10113
00208f33
00008eb7
fffe8e93
00800193
43df1a63
800000b7
fff08093
00000113
00208f33
80000eb7
fffe8e93
00900193
41df1a63
800000b7
fff08093
00008137
fff10113
00208f33
80008eb7
ffee8e93
00a00193
3fdf1863
800000b7
00008137
fff10113
00208f33
80008eb7
fffe8e93
00b00193
3ddf1863
800000b7
fff08093
ffff8137
00208f33
7fff8eb7
fffe8e93
00c00193
3bdf1863
00000093
fff00113
00208f33
fff00e93
00d00193
39df1c63
fff00093
00100113
00208f33
00000e93
00e00193
39df1063
fff00093
fff00113
00208f33
ffe00e93
00f00193
37df1463
00100093
80000137
fff10113
00208f33
80000eb7
01000193
35df1663
00d00093
00b00113
002080b3
01800e93
01100193
33d09a63
00e00093
00b00113
00208133
01900e93
01200193
31d11e63
00d00093
001080b3
01a00e93
01300193
31d09463
00000213
00d00093
00b00113
00208f33
000f0313
00120213
00200293
fe5214e3
01800e93
01400193
2dd31e63
00000213
00e00093
00b00113
00208f33
00000013
000f0313
00120213
00200293
fe5212e3
01900e93
01500193
2bd31663
00000213
00f00093
00b00113
00208f33
00000013
00000013
000f0313
00120213
00200293
fe5210e3
01a00e93
01600193
27d31c63
00000213
00d00093
00b00113
00208f33
00120213
00200293
fe5216e3
01800e93
01700193
25df1863
00000213
00e00093
00b00113
00000013
00208f33
00120213
00200293
fe5214e3
01900e93
01800193
23df1263
00000213
00f00093
00b00113
00000013
00000013
00208f33
00120213
00200293
fe5212e3
01a00e93
01900193
1fdf1a63
00000213
00d00093
00000013
00b00113
00208f33
00120213
00200293
fe5214e3
01800e93
01a00193
1ddf1463
00000213
00e00093
00000013
00b00113
00000013
00208f33
00120213
00200293
fe5212e3
01900e93
01b00193
19df1c63
00000213
00f00093
00000013
00000013
00b00113
00208f33
00120213
00200293
fe5212e3
01a00e93
01c00193
17df1463
00000213
00b00113
00d00093
00208f33
00120213
00200293
fe5216e3
01800e93
01d00193
15df1063
00000213
00b00113
00e00093
00000013
00208f33
00120213
00200293
fe5214e3
01900e93
01e00193
11df1a63
00000213
00b00113
00f00093
00000013
00000013
00208f33
00120213
00200293
fe5212e3
01a00e93
01f00193
0fdf1263
00000213
00b00113
00000013
00d00093
00208f33
00120213
00200293
fe5214e3
01800e93
02000193
0bdf1c63
00000213
00b00113
00000013
00e00093
00000013
00208f33
00120213
00200293
fe5212e3
01900e93
02100193
09df1463
00000213
00b00113
00000013
00000013
00f00093
00208f33
00120213
00200293
fe5212e3
01a00e93
02200193
05df1c63
00f00093
00100133
00f00e93
02300193
05d11263
02000093
00008133
02000e93
02400193
03d11863
000000b3
00000e93
02500193
03d09063
01000093
01e00113
00208033
00000e93
02600193
01d01463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

176
tests/isa/generated/rv32ui-p-add.verilog Normal file → Executable file
View File

@ -1,88 +1,88 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 00 00 00 13 01 00 00 13 0D 00 00 93 0D 00 00 93 00 00 00 13 01 00 00
33 8F 20 00 93 0E 00 00 93 01 20 00 63 16 DF 4D 33 8F 20 00 93 0E 00 00 93 01 20 00 63 16 DF 4D
93 00 10 00 13 01 10 00 33 8F 20 00 93 0E 20 00 93 00 10 00 13 01 10 00 33 8F 20 00 93 0E 20 00
93 01 30 00 63 1A DF 4B 93 00 30 00 13 01 70 00 93 01 30 00 63 1A DF 4B 93 00 30 00 13 01 70 00
33 8F 20 00 93 0E A0 00 93 01 40 00 63 1E DF 49 33 8F 20 00 93 0E A0 00 93 01 40 00 63 1E DF 49
93 00 00 00 37 81 FF FF 33 8F 20 00 B7 8E FF FF 93 00 00 00 37 81 FF FF 33 8F 20 00 B7 8E FF FF
93 01 50 00 63 12 DF 49 B7 00 00 80 13 01 00 00 93 01 50 00 63 12 DF 49 B7 00 00 80 13 01 00 00
33 8F 20 00 B7 0E 00 80 93 01 60 00 63 16 DF 47 33 8F 20 00 B7 0E 00 80 93 01 60 00 63 16 DF 47
B7 00 00 80 37 81 FF FF 33 8F 20 00 B7 8E FF 7F B7 00 00 80 37 81 FF FF 33 8F 20 00 B7 8E FF 7F
93 01 70 00 63 1A DF 45 93 00 00 00 37 81 00 00 93 01 70 00 63 1A DF 45 93 00 00 00 37 81 00 00
13 01 F1 FF 33 8F 20 00 B7 8E 00 00 93 8E FE FF 13 01 F1 FF 33 8F 20 00 B7 8E 00 00 93 8E FE FF
93 01 80 00 63 1A DF 43 B7 00 00 80 93 80 F0 FF 93 01 80 00 63 1A DF 43 B7 00 00 80 93 80 F0 FF
13 01 00 00 33 8F 20 00 B7 0E 00 80 93 8E FE FF 13 01 00 00 33 8F 20 00 B7 0E 00 80 93 8E FE FF
93 01 90 00 63 1A DF 41 B7 00 00 80 93 80 F0 FF 93 01 90 00 63 1A DF 41 B7 00 00 80 93 80 F0 FF
37 81 00 00 13 01 F1 FF 33 8F 20 00 B7 8E 00 80 37 81 00 00 13 01 F1 FF 33 8F 20 00 B7 8E 00 80
93 8E EE FF 93 01 A0 00 63 18 DF 3F B7 00 00 80 93 8E EE FF 93 01 A0 00 63 18 DF 3F B7 00 00 80
37 81 00 00 13 01 F1 FF 33 8F 20 00 B7 8E 00 80 37 81 00 00 13 01 F1 FF 33 8F 20 00 B7 8E 00 80
93 8E FE FF 93 01 B0 00 63 18 DF 3D B7 00 00 80 93 8E FE FF 93 01 B0 00 63 18 DF 3D B7 00 00 80
93 80 F0 FF 37 81 FF FF 33 8F 20 00 B7 8E FF 7F 93 80 F0 FF 37 81 FF FF 33 8F 20 00 B7 8E FF 7F
93 8E FE FF 93 01 C0 00 63 18 DF 3B 93 00 00 00 93 8E FE FF 93 01 C0 00 63 18 DF 3B 93 00 00 00
13 01 F0 FF 33 8F 20 00 93 0E F0 FF 93 01 D0 00 13 01 F0 FF 33 8F 20 00 93 0E F0 FF 93 01 D0 00
63 1C DF 39 93 00 F0 FF 13 01 10 00 33 8F 20 00 63 1C DF 39 93 00 F0 FF 13 01 10 00 33 8F 20 00
93 0E 00 00 93 01 E0 00 63 10 DF 39 93 00 F0 FF 93 0E 00 00 93 01 E0 00 63 10 DF 39 93 00 F0 FF
13 01 F0 FF 33 8F 20 00 93 0E E0 FF 93 01 F0 00 13 01 F0 FF 33 8F 20 00 93 0E E0 FF 93 01 F0 00
63 14 DF 37 93 00 10 00 37 01 00 80 13 01 F1 FF 63 14 DF 37 93 00 10 00 37 01 00 80 13 01 F1 FF
33 8F 20 00 B7 0E 00 80 93 01 00 01 63 16 DF 35 33 8F 20 00 B7 0E 00 80 93 01 00 01 63 16 DF 35
93 00 D0 00 13 01 B0 00 B3 80 20 00 93 0E 80 01 93 00 D0 00 13 01 B0 00 B3 80 20 00 93 0E 80 01
93 01 10 01 63 9A D0 33 93 00 E0 00 13 01 B0 00 93 01 10 01 63 9A D0 33 93 00 E0 00 13 01 B0 00
33 81 20 00 93 0E 90 01 93 01 20 01 63 1E D1 31 33 81 20 00 93 0E 90 01 93 01 20 01 63 1E D1 31
93 00 D0 00 B3 80 10 00 93 0E A0 01 93 01 30 01 93 00 D0 00 B3 80 10 00 93 0E A0 01 93 01 30 01
63 94 D0 31 13 02 00 00 93 00 D0 00 13 01 B0 00 63 94 D0 31 13 02 00 00 93 00 D0 00 13 01 B0 00
33 8F 20 00 13 03 0F 00 13 02 12 00 93 02 20 00 33 8F 20 00 13 03 0F 00 13 02 12 00 93 02 20 00
E3 14 52 FE 93 0E 80 01 93 01 40 01 63 1E D3 2D E3 14 52 FE 93 0E 80 01 93 01 40 01 63 1E D3 2D
13 02 00 00 93 00 E0 00 13 01 B0 00 33 8F 20 00 13 02 00 00 93 00 E0 00 13 01 B0 00 33 8F 20 00
13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00 13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00
E3 12 52 FE 93 0E 90 01 93 01 50 01 63 16 D3 2B E3 12 52 FE 93 0E 90 01 93 01 50 01 63 16 D3 2B
13 02 00 00 93 00 F0 00 13 01 B0 00 33 8F 20 00 13 02 00 00 93 00 F0 00 13 01 B0 00 33 8F 20 00
13 00 00 00 13 00 00 00 13 03 0F 00 13 02 12 00 13 00 00 00 13 00 00 00 13 03 0F 00 13 02 12 00
93 02 20 00 E3 10 52 FE 93 0E A0 01 93 01 60 01 93 02 20 00 E3 10 52 FE 93 0E A0 01 93 01 60 01
63 1C D3 27 13 02 00 00 93 00 D0 00 13 01 B0 00 63 1C D3 27 13 02 00 00 93 00 D0 00 13 01 B0 00
33 8F 20 00 13 02 12 00 93 02 20 00 E3 16 52 FE 33 8F 20 00 13 02 12 00 93 02 20 00 E3 16 52 FE
93 0E 80 01 93 01 70 01 63 18 DF 25 13 02 00 00 93 0E 80 01 93 01 70 01 63 18 DF 25 13 02 00 00
93 00 E0 00 13 01 B0 00 13 00 00 00 33 8F 20 00 93 00 E0 00 13 01 B0 00 13 00 00 00 33 8F 20 00
13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 90 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 90 01
93 01 80 01 63 12 DF 23 13 02 00 00 93 00 F0 00 93 01 80 01 63 12 DF 23 13 02 00 00 93 00 F0 00
13 01 B0 00 13 00 00 00 13 00 00 00 33 8F 20 00 13 01 B0 00 13 00 00 00 13 00 00 00 33 8F 20 00
13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E A0 01 13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E A0 01
93 01 90 01 63 1A DF 1F 13 02 00 00 93 00 D0 00 93 01 90 01 63 1A DF 1F 13 02 00 00 93 00 D0 00
13 00 00 00 13 01 B0 00 33 8F 20 00 13 02 12 00 13 00 00 00 13 01 B0 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 14 52 FE 93 0E 80 01 93 01 A0 01 93 02 20 00 E3 14 52 FE 93 0E 80 01 93 01 A0 01
63 14 DF 1D 13 02 00 00 93 00 E0 00 13 00 00 00 63 14 DF 1D 13 02 00 00 93 00 E0 00 13 00 00 00
13 01 B0 00 13 00 00 00 33 8F 20 00 13 02 12 00 13 01 B0 00 13 00 00 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 12 52 FE 93 0E 90 01 93 01 B0 01 93 02 20 00 E3 12 52 FE 93 0E 90 01 93 01 B0 01
63 1C DF 19 13 02 00 00 93 00 F0 00 13 00 00 00 63 1C DF 19 13 02 00 00 93 00 F0 00 13 00 00 00
13 00 00 00 13 01 B0 00 33 8F 20 00 13 02 12 00 13 00 00 00 13 01 B0 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 12 52 FE 93 0E A0 01 93 01 C0 01 93 02 20 00 E3 12 52 FE 93 0E A0 01 93 01 C0 01
63 14 DF 17 13 02 00 00 13 01 B0 00 93 00 D0 00 63 14 DF 17 13 02 00 00 13 01 B0 00 93 00 D0 00
33 8F 20 00 13 02 12 00 93 02 20 00 E3 16 52 FE 33 8F 20 00 13 02 12 00 93 02 20 00 E3 16 52 FE
93 0E 80 01 93 01 D0 01 63 10 DF 15 13 02 00 00 93 0E 80 01 93 01 D0 01 63 10 DF 15 13 02 00 00
13 01 B0 00 93 00 E0 00 13 00 00 00 33 8F 20 00 13 01 B0 00 93 00 E0 00 13 00 00 00 33 8F 20 00
13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 90 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 90 01
93 01 E0 01 63 1A DF 11 13 02 00 00 13 01 B0 00 93 01 E0 01 63 1A DF 11 13 02 00 00 13 01 B0 00
93 00 F0 00 13 00 00 00 13 00 00 00 33 8F 20 00 93 00 F0 00 13 00 00 00 13 00 00 00 33 8F 20 00
13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E A0 01 13 02 12 00 93 02 20 00 E3 12 52 FE 93 0E A0 01
93 01 F0 01 63 12 DF 0F 13 02 00 00 13 01 B0 00 93 01 F0 01 63 12 DF 0F 13 02 00 00 13 01 B0 00
13 00 00 00 93 00 D0 00 33 8F 20 00 13 02 12 00 13 00 00 00 93 00 D0 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 14 52 FE 93 0E 80 01 93 01 00 02 93 02 20 00 E3 14 52 FE 93 0E 80 01 93 01 00 02
63 1C DF 0B 13 02 00 00 13 01 B0 00 13 00 00 00 63 1C DF 0B 13 02 00 00 13 01 B0 00 13 00 00 00
93 00 E0 00 13 00 00 00 33 8F 20 00 13 02 12 00 93 00 E0 00 13 00 00 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 12 52 FE 93 0E 90 01 93 01 10 02 93 02 20 00 E3 12 52 FE 93 0E 90 01 93 01 10 02
63 14 DF 09 13 02 00 00 13 01 B0 00 13 00 00 00 63 14 DF 09 13 02 00 00 13 01 B0 00 13 00 00 00
13 00 00 00 93 00 F0 00 33 8F 20 00 13 02 12 00 13 00 00 00 93 00 F0 00 33 8F 20 00 13 02 12 00
93 02 20 00 E3 12 52 FE 93 0E A0 01 93 01 20 02 93 02 20 00 E3 12 52 FE 93 0E A0 01 93 01 20 02
63 1C DF 05 93 00 F0 00 33 01 10 00 93 0E F0 00 63 1C DF 05 93 00 F0 00 33 01 10 00 93 0E F0 00
93 01 30 02 63 12 D1 05 93 00 00 02 33 81 00 00 93 01 30 02 63 12 D1 05 93 00 00 02 33 81 00 00
93 0E 00 02 93 01 40 02 63 18 D1 03 B3 00 00 00 93 0E 00 02 93 01 40 02 63 18 D1 03 B3 00 00 00
93 0E 00 00 93 01 50 02 63 90 D0 03 93 00 00 01 93 0E 00 00 93 01 50 02 63 90 D0 03 93 00 00 01
13 01 E0 01 33 80 20 00 93 0E 00 00 93 01 60 02 13 01 E0 01 33 80 20 00 93 0E 00 00 93 01 60 02
63 14 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 14 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00
@00000540 @00000540
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-addi Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-addi.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-addi.dump
View File

@ -219,15 +219,15 @@ Disassembly of section .text.init:
28c: 00301863 bne zero,gp,29c <pass> 28c: 00301863 bne zero,gp,29c <pass>
00000290 <fail>: 00000290 <fail>:
290: 00100d13 li s10,1 290: 00000d93 li s11,0
294: 00000d93 li s11,0 294: 00100d13 li s10,1
00000298 <loop_fail>: 00000298 <loop_fail>:
298: 0000006f j 298 <loop_fail> 298: 0000006f j 298 <loop_fail>
0000029c <pass>: 0000029c <pass>:
29c: 00100d13 li s10,1 29c: 00100d93 li s11,1
2a0: 00100d93 li s11,1 2a0: 00100d13 li s10,1
000002a4 <loop_pass>: 000002a4 <loop_pass>:
2a4: 0000006f j 2a4 <loop_pass> 2a4: 0000006f j 2a4 <loop_pass>
@ -240,3 +240,18 @@ Disassembly of section .tohost:
00000340 <fromhost>: 00000340 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

210
tests/isa/generated/rv32ui-p-addi.mem Normal file
View File

@ -0,0 +1,210 @@
00000d13
00000d93
00000093
00008f13
00000e93
00200193
27df1c63
00100093
00108f13
00200e93
00300193
27df1263
00300093
00708f13
00a00e93
00400193
25df1863
00000093
80008f13
80000e93
00500193
23df1e63
800000b7
00008f13
80000eb7
00600193
23df1463
800000b7
80008f13
80000eb7
800e8e93
00700193
21df1863
00000093
7ff08f13
7ff00e93
00800193
1fdf1e63
800000b7
fff08093
00008f13
80000eb7
fffe8e93
00900193
1fdf1063
800000b7
fff08093
7ff08f13
80000eb7
7fee8e93
00a00193
1ddf1263
800000b7
7ff08f13
80000eb7
7ffe8e93
00b00193
1bdf1663
800000b7
fff08093
80008f13
7ffffeb7
7ffe8e93
00c00193
19df1863
00000093
fff08f13
fff00e93
00d00193
17df1e63
fff00093
00108f13
00000e93
00e00193
17df1463
fff00093
fff08f13
ffe00e93
00f00193
15df1a63
800000b7
fff08093
00108f13
80000eb7
01000193
13df1e63
00d00093
00b08093
01800e93
01100193
13d09463
00000213
00d00093
00b08f13
000f0313
00120213
00200293
fe5216e3
01800e93
01200193
11d31063
00000213
00d00093
00a08f13
00000013
000f0313
00120213
00200293
fe5214e3
01700e93
01300193
0dd31a63
00000213
00d00093
00908f13
00000013
00000013
000f0313
00120213
00200293
fe5212e3
01600e93
01400193
0bd31263
00000213
00d00093
00b08f13
00120213
00200293
fe5218e3
01800e93
01500193
09df1063
00000213
00d00093
00000013
00a08f13
00120213
00200293
fe5216e3
01700e93
01600193
05df1c63
00000213
00d00093
00000013
00000013
00908f13
00120213
00200293
fe5214e3
01600e93
01700193
03df1663
02000093
02000e93
01800193
01d09e63
02100093
03208013
00000e93
01900193
01d01463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

104
tests/isa/generated/rv32ui-p-addi.verilog Normal file → Executable file
View File

@ -1,52 +1,52 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 00 00 00 13 8F 00 00 13 0D 00 00 93 0D 00 00 93 00 00 00 13 8F 00 00
93 0E 00 00 93 01 20 00 63 1C DF 27 93 00 10 00 93 0E 00 00 93 01 20 00 63 1C DF 27 93 00 10 00
13 8F 10 00 93 0E 20 00 93 01 30 00 63 12 DF 27 13 8F 10 00 93 0E 20 00 93 01 30 00 63 12 DF 27
93 00 30 00 13 8F 70 00 93 0E A0 00 93 01 40 00 93 00 30 00 13 8F 70 00 93 0E A0 00 93 01 40 00
63 18 DF 25 93 00 00 00 13 8F 00 80 93 0E 00 80 63 18 DF 25 93 00 00 00 13 8F 00 80 93 0E 00 80
93 01 50 00 63 1E DF 23 B7 00 00 80 13 8F 00 00 93 01 50 00 63 1E DF 23 B7 00 00 80 13 8F 00 00
B7 0E 00 80 93 01 60 00 63 14 DF 23 B7 00 00 80 B7 0E 00 80 93 01 60 00 63 14 DF 23 B7 00 00 80
13 8F 00 80 B7 0E 00 80 93 8E 0E 80 93 01 70 00 13 8F 00 80 B7 0E 00 80 93 8E 0E 80 93 01 70 00
63 18 DF 21 93 00 00 00 13 8F F0 7F 93 0E F0 7F 63 18 DF 21 93 00 00 00 13 8F F0 7F 93 0E F0 7F
93 01 80 00 63 1E DF 1F B7 00 00 80 93 80 F0 FF 93 01 80 00 63 1E DF 1F B7 00 00 80 93 80 F0 FF
13 8F 00 00 B7 0E 00 80 93 8E FE FF 93 01 90 00 13 8F 00 00 B7 0E 00 80 93 8E FE FF 93 01 90 00
63 10 DF 1F B7 00 00 80 93 80 F0 FF 13 8F F0 7F 63 10 DF 1F B7 00 00 80 93 80 F0 FF 13 8F F0 7F
B7 0E 00 80 93 8E EE 7F 93 01 A0 00 63 12 DF 1D B7 0E 00 80 93 8E EE 7F 93 01 A0 00 63 12 DF 1D
B7 00 00 80 13 8F F0 7F B7 0E 00 80 93 8E FE 7F B7 00 00 80 13 8F F0 7F B7 0E 00 80 93 8E FE 7F
93 01 B0 00 63 16 DF 1B B7 00 00 80 93 80 F0 FF 93 01 B0 00 63 16 DF 1B B7 00 00 80 93 80 F0 FF
13 8F 00 80 B7 FE FF 7F 93 8E FE 7F 93 01 C0 00 13 8F 00 80 B7 FE FF 7F 93 8E FE 7F 93 01 C0 00
63 18 DF 19 93 00 00 00 13 8F F0 FF 93 0E F0 FF 63 18 DF 19 93 00 00 00 13 8F F0 FF 93 0E F0 FF
93 01 D0 00 63 1E DF 17 93 00 F0 FF 13 8F 10 00 93 01 D0 00 63 1E DF 17 93 00 F0 FF 13 8F 10 00
93 0E 00 00 93 01 E0 00 63 14 DF 17 93 00 F0 FF 93 0E 00 00 93 01 E0 00 63 14 DF 17 93 00 F0 FF
13 8F F0 FF 93 0E E0 FF 93 01 F0 00 63 1A DF 15 13 8F F0 FF 93 0E E0 FF 93 01 F0 00 63 1A DF 15
B7 00 00 80 93 80 F0 FF 13 8F 10 00 B7 0E 00 80 B7 00 00 80 93 80 F0 FF 13 8F 10 00 B7 0E 00 80
93 01 00 01 63 1E DF 13 93 00 D0 00 93 80 B0 00 93 01 00 01 63 1E DF 13 93 00 D0 00 93 80 B0 00
93 0E 80 01 93 01 10 01 63 94 D0 13 13 02 00 00 93 0E 80 01 93 01 10 01 63 94 D0 13 13 02 00 00
93 00 D0 00 13 8F B0 00 13 03 0F 00 13 02 12 00 93 00 D0 00 13 8F B0 00 13 03 0F 00 13 02 12 00
93 02 20 00 E3 16 52 FE 93 0E 80 01 93 01 20 01 93 02 20 00 E3 16 52 FE 93 0E 80 01 93 01 20 01
63 10 D3 11 13 02 00 00 93 00 D0 00 13 8F A0 00 63 10 D3 11 13 02 00 00 93 00 D0 00 13 8F A0 00
13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00 13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00
E3 14 52 FE 93 0E 70 01 93 01 30 01 63 1A D3 0D E3 14 52 FE 93 0E 70 01 93 01 30 01 63 1A D3 0D
13 02 00 00 93 00 D0 00 13 8F 90 00 13 00 00 00 13 02 00 00 93 00 D0 00 13 8F 90 00 13 00 00 00
13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00 13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00
E3 12 52 FE 93 0E 60 01 93 01 40 01 63 12 D3 0B E3 12 52 FE 93 0E 60 01 93 01 40 01 63 12 D3 0B
13 02 00 00 93 00 D0 00 13 8F B0 00 13 02 12 00 13 02 00 00 93 00 D0 00 13 8F B0 00 13 02 12 00
93 02 20 00 E3 18 52 FE 93 0E 80 01 93 01 50 01 93 02 20 00 E3 18 52 FE 93 0E 80 01 93 01 50 01
63 10 DF 09 13 02 00 00 93 00 D0 00 13 00 00 00 63 10 DF 09 13 02 00 00 93 00 D0 00 13 00 00 00
13 8F A0 00 13 02 12 00 93 02 20 00 E3 16 52 FE 13 8F A0 00 13 02 12 00 93 02 20 00 E3 16 52 FE
93 0E 70 01 93 01 60 01 63 1C DF 05 13 02 00 00 93 0E 70 01 93 01 60 01 63 1C DF 05 13 02 00 00
93 00 D0 00 13 00 00 00 13 00 00 00 13 8F 90 00 93 00 D0 00 13 00 00 00 13 00 00 00 13 8F 90 00
13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 60 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 0E 60 01
93 01 70 01 63 16 DF 03 93 00 00 02 93 0E 00 02 93 01 70 01 63 16 DF 03 93 00 00 02 93 0E 00 02
93 01 80 01 63 9E D0 01 93 00 10 02 13 80 20 03 93 01 80 01 63 9E D0 01 93 00 10 02 13 80 20 03
93 0E 00 00 93 01 90 01 63 14 D0 01 63 18 30 00 93 0E 00 00 93 01 90 01 63 14 D0 01 63 18 30 00
13 0D 10 00 93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 00 00 13 0D 10 00 6F 00 00 00 93 0D 10 00
93 0D 10 00 6F 00 00 00 00 00 00 00 00 00 00 00 13 0D 10 00 6F 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000300 @00000300
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-and Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-and.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-and.dump
View File

@ -363,15 +363,15 @@ Disassembly of section .text.init:
4bc: 00301863 bne zero,gp,4cc <pass> 4bc: 00301863 bne zero,gp,4cc <pass>
000004c0 <fail>: 000004c0 <fail>:
4c0: 00100d13 li s10,1 4c0: 00000d93 li s11,0
4c4: 00000d93 li s11,0 4c4: 00100d13 li s10,1
000004c8 <loop_fail>: 000004c8 <loop_fail>:
4c8: 0000006f j 4c8 <loop_fail> 4c8: 0000006f j 4c8 <loop_fail>
000004cc <pass>: 000004cc <pass>:
4cc: 00100d13 li s10,1 4cc: 00100d93 li s11,1
4d0: 00100d93 li s11,1 4d0: 00100d13 li s10,1
000004d4 <loop_pass>: 000004d4 <loop_pass>:
4d4: 0000006f j 4d4 <loop_pass> 4d4: 0000006f j 4d4 <loop_pass>
@ -384,3 +384,18 @@ Disassembly of section .tohost:
00000580 <fromhost>: 00000580 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

354
tests/isa/generated/rv32ui-p-and.mem Normal file
View File

@ -0,0 +1,354 @@
00000d13
00000d93
ff0100b7
f0008093
0f0f1137
f0f10113
0020ff33
0f001eb7
f00e8e93
00200193
49df1c63
0ff010b7
ff008093
f0f0f137
0f010113
0020ff33
00f00eb7
0f0e8e93
00300193
47df1a63
00ff00b7
0ff08093
0f0f1137
f0f10113
0020ff33
000f0eb7
00fe8e93
00400193
45df1863
f00ff0b7
00f08093
f0f0f137
0f010113
0020ff33
f000feb7
00500193
43df1863
ff0100b7
f0008093
0f0f1137
f0f10113
0020f0b3
0f001eb7
f00e8e93
00600193
41d09663
0ff010b7
ff008093
f0f0f137
0f010113
0020f133
00f00eb7
0f0e8e93
00700193
3fd11463
ff0100b7
f0008093
0010f0b3
ff010eb7
f00e8e93
00800193
3dd09663
00000213
ff0100b7
f0008093
0f0f1137
f0f10113
0020ff33
000f0313
00120213
00200293
fe5210e3
0f001eb7
f00e8e93
00900193
39d31a63
00000213
0ff010b7
ff008093
f0f0f137
0f010113
0020ff33
00000013
000f0313
00120213
00200293
fc521ee3
00f00eb7
0f0e8e93
00a00193
35d31c63
00000213
00ff00b7
0ff08093
0f0f1137
f0f10113
0020ff33
00000013
00000013
000f0313
00120213
00200293
fc521ce3
000f0eb7
00fe8e93
00b00193
31d31c63
00000213
ff0100b7
f0008093
0f0f1137
f0f10113
0020ff33
00120213
00200293
fe5212e3
0f001eb7
f00e8e93
00c00193
2fdf1263
00000213
0ff010b7
ff008093
f0f0f137
0f010113
00000013
0020ff33
00120213
00200293
fe5210e3
00f00eb7
0f0e8e93
00d00193
2bdf1663
00000213
00ff00b7
0ff08093
0f0f1137
f0f10113
00000013
00000013
0020ff33
00120213
00200293
fc521ee3
000f0eb7
00fe8e93
00e00193
27df1863
00000213
ff0100b7
f0008093
00000013
0f0f1137
f0f10113
0020ff33
00120213
00200293
fe5210e3
0f001eb7
f00e8e93
00f00193
23df1c63
00000213
0ff010b7
ff008093
00000013
f0f0f137
0f010113
00000013
0020ff33
00120213
00200293
fc521ee3
00f00eb7
0f0e8e93
01000193
1fdf1e63
00000213
00ff00b7
0ff08093
00000013
00000013
0f0f1137
f0f10113
0020ff33
00120213
00200293
fc521ee3
000f0eb7
00fe8e93
01100193
1ddf1063
00000213
0f0f1137
f0f10113
ff0100b7
f0008093
0020ff33
00120213
00200293
fe5212e3
0f001eb7
f00e8e93
01200193
19df1663
00000213
f0f0f137
0f010113
0ff010b7
ff008093
00000013
0020ff33
00120213
00200293
fe5210e3
00f00eb7
0f0e8e93
01300193
15df1a63
00000213
0f0f1137
f0f10113
00ff00b7
0ff08093
00000013
00000013
0020ff33
00120213
00200293
fc521ee3
000f0eb7
00fe8e93
01400193
11df1c63
00000213
0f0f1137
f0f10113
00000013
ff0100b7
f0008093
0020ff33
00120213
00200293
fe5210e3
0f001eb7
f00e8e93
01500193
0fdf1063
00000213
f0f0f137
0f010113
00000013
0ff010b7
ff008093
00000013
0020ff33
00120213
00200293
fc521ee3
00f00eb7
0f0e8e93
01600193
0bdf1263
00000213
0f0f1137
f0f10113
00000013
00000013
00ff00b7
0ff08093
0020ff33
00120213
00200293
fc521ee3
000f0eb7
00fe8e93
01700193
07df1463
ff0100b7
f0008093
00107133
00000e93
01800193
05d11863
00ff00b7
0ff08093
0000f133
00000e93
01900193
03d11c63
000070b3
00000e93
01a00193
03d09463
111110b7
11108093
22222137
22210113
0020f033
00000e93
01b00193
01d01463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

176
tests/isa/generated/rv32ui-p-and.verilog Normal file → Executable file
View File

@ -1,88 +1,88 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 B7 00 01 FF 93 80 00 F0 13 0D 00 00 93 0D 00 00 B7 00 01 FF 93 80 00 F0
37 11 0F 0F 13 01 F1 F0 33 FF 20 00 B7 1E 00 0F 37 11 0F 0F 13 01 F1 F0 33 FF 20 00 B7 1E 00 0F
93 8E 0E F0 93 01 20 00 63 1C DF 49 B7 10 F0 0F 93 8E 0E F0 93 01 20 00 63 1C DF 49 B7 10 F0 0F
93 80 00 FF 37 F1 F0 F0 13 01 01 0F 33 FF 20 00 93 80 00 FF 37 F1 F0 F0 13 01 01 0F 33 FF 20 00
B7 0E F0 00 93 8E 0E 0F 93 01 30 00 63 1A DF 47 B7 0E F0 00 93 8E 0E 0F 93 01 30 00 63 1A DF 47
B7 00 FF 00 93 80 F0 0F 37 11 0F 0F 13 01 F1 F0 B7 00 FF 00 93 80 F0 0F 37 11 0F 0F 13 01 F1 F0
33 FF 20 00 B7 0E 0F 00 93 8E FE 00 93 01 40 00 33 FF 20 00 B7 0E 0F 00 93 8E FE 00 93 01 40 00
63 18 DF 45 B7 F0 0F F0 93 80 F0 00 37 F1 F0 F0 63 18 DF 45 B7 F0 0F F0 93 80 F0 00 37 F1 F0 F0
13 01 01 0F 33 FF 20 00 B7 FE 00 F0 93 01 50 00 13 01 01 0F 33 FF 20 00 B7 FE 00 F0 93 01 50 00
63 18 DF 43 B7 00 01 FF 93 80 00 F0 37 11 0F 0F 63 18 DF 43 B7 00 01 FF 93 80 00 F0 37 11 0F 0F
13 01 F1 F0 B3 F0 20 00 B7 1E 00 0F 93 8E 0E F0 13 01 F1 F0 B3 F0 20 00 B7 1E 00 0F 93 8E 0E F0
93 01 60 00 63 96 D0 41 B7 10 F0 0F 93 80 00 FF 93 01 60 00 63 96 D0 41 B7 10 F0 0F 93 80 00 FF
37 F1 F0 F0 13 01 01 0F 33 F1 20 00 B7 0E F0 00 37 F1 F0 F0 13 01 01 0F 33 F1 20 00 B7 0E F0 00
93 8E 0E 0F 93 01 70 00 63 14 D1 3F B7 00 01 FF 93 8E 0E 0F 93 01 70 00 63 14 D1 3F B7 00 01 FF
93 80 00 F0 B3 F0 10 00 B7 0E 01 FF 93 8E 0E F0 93 80 00 F0 B3 F0 10 00 B7 0E 01 FF 93 8E 0E F0
93 01 80 00 63 96 D0 3D 13 02 00 00 B7 00 01 FF 93 01 80 00 63 96 D0 3D 13 02 00 00 B7 00 01 FF
93 80 00 F0 37 11 0F 0F 13 01 F1 F0 33 FF 20 00 93 80 00 F0 37 11 0F 0F 13 01 F1 F0 33 FF 20 00
13 03 0F 00 13 02 12 00 93 02 20 00 E3 10 52 FE 13 03 0F 00 13 02 12 00 93 02 20 00 E3 10 52 FE
B7 1E 00 0F 93 8E 0E F0 93 01 90 00 63 1A D3 39 B7 1E 00 0F 93 8E 0E F0 93 01 90 00 63 1A D3 39
13 02 00 00 B7 10 F0 0F 93 80 00 FF 37 F1 F0 F0 13 02 00 00 B7 10 F0 0F 93 80 00 FF 37 F1 F0 F0
13 01 01 0F 33 FF 20 00 13 00 00 00 13 03 0F 00 13 01 01 0F 33 FF 20 00 13 00 00 00 13 03 0F 00
13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E F0 00 13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E F0 00
93 8E 0E 0F 93 01 A0 00 63 1C D3 35 13 02 00 00 93 8E 0E 0F 93 01 A0 00 63 1C D3 35 13 02 00 00
B7 00 FF 00 93 80 F0 0F 37 11 0F 0F 13 01 F1 F0 B7 00 FF 00 93 80 F0 0F 37 11 0F 0F 13 01 F1 F0
33 FF 20 00 13 00 00 00 13 00 00 00 13 03 0F 00 33 FF 20 00 13 00 00 00 13 00 00 00 13 03 0F 00
13 02 12 00 93 02 20 00 E3 1C 52 FC B7 0E 0F 00 13 02 12 00 93 02 20 00 E3 1C 52 FC B7 0E 0F 00
93 8E FE 00 93 01 B0 00 63 1C D3 31 13 02 00 00 93 8E FE 00 93 01 B0 00 63 1C D3 31 13 02 00 00
B7 00 01 FF 93 80 00 F0 37 11 0F 0F 13 01 F1 F0 B7 00 01 FF 93 80 00 F0 37 11 0F 0F 13 01 F1 F0
33 FF 20 00 13 02 12 00 93 02 20 00 E3 12 52 FE 33 FF 20 00 13 02 12 00 93 02 20 00 E3 12 52 FE
B7 1E 00 0F 93 8E 0E F0 93 01 C0 00 63 12 DF 2F B7 1E 00 0F 93 8E 0E F0 93 01 C0 00 63 12 DF 2F
13 02 00 00 B7 10 F0 0F 93 80 00 FF 37 F1 F0 F0 13 02 00 00 B7 10 F0 0F 93 80 00 FF 37 F1 F0 F0
13 01 01 0F 13 00 00 00 33 FF 20 00 13 02 12 00 13 01 01 0F 13 00 00 00 33 FF 20 00 13 02 12 00
93 02 20 00 E3 10 52 FE B7 0E F0 00 93 8E 0E 0F 93 02 20 00 E3 10 52 FE B7 0E F0 00 93 8E 0E 0F
93 01 D0 00 63 16 DF 2B 13 02 00 00 B7 00 FF 00 93 01 D0 00 63 16 DF 2B 13 02 00 00 B7 00 FF 00
93 80 F0 0F 37 11 0F 0F 13 01 F1 F0 13 00 00 00 93 80 F0 0F 37 11 0F 0F 13 01 F1 F0 13 00 00 00
13 00 00 00 33 FF 20 00 13 02 12 00 93 02 20 00 13 00 00 00 33 FF 20 00 13 02 12 00 93 02 20 00
E3 1E 52 FC B7 0E 0F 00 93 8E FE 00 93 01 E0 00 E3 1E 52 FC B7 0E 0F 00 93 8E FE 00 93 01 E0 00
63 18 DF 27 13 02 00 00 B7 00 01 FF 93 80 00 F0 63 18 DF 27 13 02 00 00 B7 00 01 FF 93 80 00 F0
13 00 00 00 37 11 0F 0F 13 01 F1 F0 33 FF 20 00 13 00 00 00 37 11 0F 0F 13 01 F1 F0 33 FF 20 00
13 02 12 00 93 02 20 00 E3 10 52 FE B7 1E 00 0F 13 02 12 00 93 02 20 00 E3 10 52 FE B7 1E 00 0F
93 8E 0E F0 93 01 F0 00 63 1C DF 23 13 02 00 00 93 8E 0E F0 93 01 F0 00 63 1C DF 23 13 02 00 00
B7 10 F0 0F 93 80 00 FF 13 00 00 00 37 F1 F0 F0 B7 10 F0 0F 93 80 00 FF 13 00 00 00 37 F1 F0 F0
13 01 01 0F 13 00 00 00 33 FF 20 00 13 02 12 00 13 01 01 0F 13 00 00 00 33 FF 20 00 13 02 12 00
93 02 20 00 E3 1E 52 FC B7 0E F0 00 93 8E 0E 0F 93 02 20 00 E3 1E 52 FC B7 0E F0 00 93 8E 0E 0F
93 01 00 01 63 1E DF 1F 13 02 00 00 B7 00 FF 00 93 01 00 01 63 1E DF 1F 13 02 00 00 B7 00 FF 00
93 80 F0 0F 13 00 00 00 13 00 00 00 37 11 0F 0F 93 80 F0 0F 13 00 00 00 13 00 00 00 37 11 0F 0F
13 01 F1 F0 33 FF 20 00 13 02 12 00 93 02 20 00 13 01 F1 F0 33 FF 20 00 13 02 12 00 93 02 20 00
E3 1E 52 FC B7 0E 0F 00 93 8E FE 00 93 01 10 01 E3 1E 52 FC B7 0E 0F 00 93 8E FE 00 93 01 10 01
63 10 DF 1D 13 02 00 00 37 11 0F 0F 13 01 F1 F0 63 10 DF 1D 13 02 00 00 37 11 0F 0F 13 01 F1 F0
B7 00 01 FF 93 80 00 F0 33 FF 20 00 13 02 12 00 B7 00 01 FF 93 80 00 F0 33 FF 20 00 13 02 12 00
93 02 20 00 E3 12 52 FE B7 1E 00 0F 93 8E 0E F0 93 02 20 00 E3 12 52 FE B7 1E 00 0F 93 8E 0E F0
93 01 20 01 63 16 DF 19 13 02 00 00 37 F1 F0 F0 93 01 20 01 63 16 DF 19 13 02 00 00 37 F1 F0 F0
13 01 01 0F B7 10 F0 0F 93 80 00 FF 13 00 00 00 13 01 01 0F B7 10 F0 0F 93 80 00 FF 13 00 00 00
33 FF 20 00 13 02 12 00 93 02 20 00 E3 10 52 FE 33 FF 20 00 13 02 12 00 93 02 20 00 E3 10 52 FE
B7 0E F0 00 93 8E 0E 0F 93 01 30 01 63 1A DF 15 B7 0E F0 00 93 8E 0E 0F 93 01 30 01 63 1A DF 15
13 02 00 00 37 11 0F 0F 13 01 F1 F0 B7 00 FF 00 13 02 00 00 37 11 0F 0F 13 01 F1 F0 B7 00 FF 00
93 80 F0 0F 13 00 00 00 13 00 00 00 33 FF 20 00 93 80 F0 0F 13 00 00 00 13 00 00 00 33 FF 20 00
13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E 0F 00 13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E 0F 00
93 8E FE 00 93 01 40 01 63 1C DF 11 13 02 00 00 93 8E FE 00 93 01 40 01 63 1C DF 11 13 02 00 00
37 11 0F 0F 13 01 F1 F0 13 00 00 00 B7 00 01 FF 37 11 0F 0F 13 01 F1 F0 13 00 00 00 B7 00 01 FF
93 80 00 F0 33 FF 20 00 13 02 12 00 93 02 20 00 93 80 00 F0 33 FF 20 00 13 02 12 00 93 02 20 00
E3 10 52 FE B7 1E 00 0F 93 8E 0E F0 93 01 50 01 E3 10 52 FE B7 1E 00 0F 93 8E 0E F0 93 01 50 01
63 10 DF 0F 13 02 00 00 37 F1 F0 F0 13 01 01 0F 63 10 DF 0F 13 02 00 00 37 F1 F0 F0 13 01 01 0F
13 00 00 00 B7 10 F0 0F 93 80 00 FF 13 00 00 00 13 00 00 00 B7 10 F0 0F 93 80 00 FF 13 00 00 00
33 FF 20 00 13 02 12 00 93 02 20 00 E3 1E 52 FC 33 FF 20 00 13 02 12 00 93 02 20 00 E3 1E 52 FC
B7 0E F0 00 93 8E 0E 0F 93 01 60 01 63 12 DF 0B B7 0E F0 00 93 8E 0E 0F 93 01 60 01 63 12 DF 0B
13 02 00 00 37 11 0F 0F 13 01 F1 F0 13 00 00 00 13 02 00 00 37 11 0F 0F 13 01 F1 F0 13 00 00 00
13 00 00 00 B7 00 FF 00 93 80 F0 0F 33 FF 20 00 13 00 00 00 B7 00 FF 00 93 80 F0 0F 33 FF 20 00
13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E 0F 00 13 02 12 00 93 02 20 00 E3 1E 52 FC B7 0E 0F 00
93 8E FE 00 93 01 70 01 63 14 DF 07 B7 00 01 FF 93 8E FE 00 93 01 70 01 63 14 DF 07 B7 00 01 FF
93 80 00 F0 33 71 10 00 93 0E 00 00 93 01 80 01 93 80 00 F0 33 71 10 00 93 0E 00 00 93 01 80 01
63 18 D1 05 B7 00 FF 00 93 80 F0 0F 33 F1 00 00 63 18 D1 05 B7 00 FF 00 93 80 F0 0F 33 F1 00 00
93 0E 00 00 93 01 90 01 63 1C D1 03 B3 70 00 00 93 0E 00 00 93 01 90 01 63 1C D1 03 B3 70 00 00
93 0E 00 00 93 01 A0 01 63 94 D0 03 B7 10 11 11 93 0E 00 00 93 01 A0 01 63 94 D0 03 B7 10 11 11
93 80 10 11 37 21 22 22 13 01 21 22 33 F0 20 00 93 80 10 11 37 21 22 22 13 01 21 22 33 F0 20 00
93 0E 00 00 93 01 B0 01 63 14 D0 01 63 18 30 00 93 0E 00 00 93 01 B0 01 63 14 D0 01 63 18 30 00
13 0D 10 00 93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 00 00 13 0D 10 00 6F 00 00 00 93 0D 10 00
93 0D 10 00 6F 00 00 00 00 00 00 00 00 00 00 00 13 0D 10 00 6F 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000540 @00000540
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-andi Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-andi.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-andi.dump
View File

@ -147,15 +147,15 @@ Disassembly of section .text.init:
1c4: 00301863 bne zero,gp,1d4 <pass> 1c4: 00301863 bne zero,gp,1d4 <pass>
000001c8 <fail>: 000001c8 <fail>:
1c8: 00100d13 li s10,1 1c8: 00000d93 li s11,0
1cc: 00000d93 li s11,0 1cc: 00100d13 li s10,1
000001d0 <loop_fail>: 000001d0 <loop_fail>:
1d0: 0000006f j 1d0 <loop_fail> 1d0: 0000006f j 1d0 <loop_fail>
000001d4 <pass>: 000001d4 <pass>:
1d4: 00100d13 li s10,1 1d4: 00100d93 li s11,1
1d8: 00100d93 li s11,1 1d8: 00100d13 li s10,1
000001dc <loop_pass>: 000001dc <loop_pass>:
1dc: 0000006f j 1dc <loop_pass> 1dc: 0000006f j 1dc <loop_pass>
@ -168,3 +168,18 @@ Disassembly of section .tohost:
00000280 <fromhost>: 00000280 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

162
tests/isa/generated/rv32ui-p-andi.mem Normal file
View File

@ -0,0 +1,162 @@
00000d13
00000d93
ff0100b7
f0008093
f0f0ff13
ff010eb7
f00e8e93
00200193
1bdf1463
0ff010b7
ff008093
0f00ff13
0f000e93
00300193
19df1863
00ff00b7
0ff08093
70f0ff13
00f00e93
00400193
17df1c63
f00ff0b7
00f08093
0f00ff13
00000e93
00500193
17df1063
ff0100b7
f0008093
0f00f093
00000e93
00600193
15d09463
00000213
0ff010b7
ff008093
70f0ff13
000f0313
00120213
00200293
fe5214e3
70000e93
00700193
11d31e63
00000213
00ff00b7
0ff08093
0f00ff13
00000013
000f0313
00120213
00200293
fe5212e3
0f000e93
00800193
0fd31663
00000213
f00ff0b7
00f08093
f0f0ff13
00000013
00000013
000f0313
00120213
00200293
fe5210e3
f00ffeb7
00fe8e93
00900193
0bd31a63
00000213
0ff010b7
ff008093
70f0ff13
00120213
00200293
fe5216e3
70000e93
00a00193
09df1663
00000213
00ff00b7
0ff08093
00000013
0f00ff13
00120213
00200293
fe5214e3
0f000e93
00b00193
07df1063
00000213
f00ff0b7
00f08093
00000013
00000013
70f0ff13
00120213
00200293
fe5212e3
00f00e93
00c00193
03df1863
0f007093
00000e93
00d00193
03d09063
00ff00b7
0ff08093
70f0f013
00000e93
00e00193
01d01463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

80
tests/isa/generated/rv32ui-p-andi.verilog Normal file → Executable file
View File

@ -1,40 +1,40 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 B7 00 01 FF 93 80 00 F0 13 0D 00 00 93 0D 00 00 B7 00 01 FF 93 80 00 F0
13 FF F0 F0 B7 0E 01 FF 93 8E 0E F0 93 01 20 00 13 FF F0 F0 B7 0E 01 FF 93 8E 0E F0 93 01 20 00
63 14 DF 1B B7 10 F0 0F 93 80 00 FF 13 FF 00 0F 63 14 DF 1B B7 10 F0 0F 93 80 00 FF 13 FF 00 0F
93 0E 00 0F 93 01 30 00 63 18 DF 19 B7 00 FF 00 93 0E 00 0F 93 01 30 00 63 18 DF 19 B7 00 FF 00
93 80 F0 0F 13 FF F0 70 93 0E F0 00 93 01 40 00 93 80 F0 0F 13 FF F0 70 93 0E F0 00 93 01 40 00
63 1C DF 17 B7 F0 0F F0 93 80 F0 00 13 FF 00 0F 63 1C DF 17 B7 F0 0F F0 93 80 F0 00 13 FF 00 0F
93 0E 00 00 93 01 50 00 63 10 DF 17 B7 00 01 FF 93 0E 00 00 93 01 50 00 63 10 DF 17 B7 00 01 FF
93 80 00 F0 93 F0 00 0F 93 0E 00 00 93 01 60 00 93 80 00 F0 93 F0 00 0F 93 0E 00 00 93 01 60 00
63 94 D0 15 13 02 00 00 B7 10 F0 0F 93 80 00 FF 63 94 D0 15 13 02 00 00 B7 10 F0 0F 93 80 00 FF
13 FF F0 70 13 03 0F 00 13 02 12 00 93 02 20 00 13 FF F0 70 13 03 0F 00 13 02 12 00 93 02 20 00
E3 14 52 FE 93 0E 00 70 93 01 70 00 63 1E D3 11 E3 14 52 FE 93 0E 00 70 93 01 70 00 63 1E D3 11
13 02 00 00 B7 00 FF 00 93 80 F0 0F 13 FF 00 0F 13 02 00 00 B7 00 FF 00 93 80 F0 0F 13 FF 00 0F
13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00 13 00 00 00 13 03 0F 00 13 02 12 00 93 02 20 00
E3 12 52 FE 93 0E 00 0F 93 01 80 00 63 16 D3 0F E3 12 52 FE 93 0E 00 0F 93 01 80 00 63 16 D3 0F
13 02 00 00 B7 F0 0F F0 93 80 F0 00 13 FF F0 F0 13 02 00 00 B7 F0 0F F0 93 80 F0 00 13 FF F0 F0
13 00 00 00 13 00 00 00 13 03 0F 00 13 02 12 00 13 00 00 00 13 00 00 00 13 03 0F 00 13 02 12 00
93 02 20 00 E3 10 52 FE B7 FE 0F F0 93 8E FE 00 93 02 20 00 E3 10 52 FE B7 FE 0F F0 93 8E FE 00
93 01 90 00 63 1A D3 0B 13 02 00 00 B7 10 F0 0F 93 01 90 00 63 1A D3 0B 13 02 00 00 B7 10 F0 0F
93 80 00 FF 13 FF F0 70 13 02 12 00 93 02 20 00 93 80 00 FF 13 FF F0 70 13 02 12 00 93 02 20 00
E3 16 52 FE 93 0E 00 70 93 01 A0 00 63 16 DF 09 E3 16 52 FE 93 0E 00 70 93 01 A0 00 63 16 DF 09
13 02 00 00 B7 00 FF 00 93 80 F0 0F 13 00 00 00 13 02 00 00 B7 00 FF 00 93 80 F0 0F 13 00 00 00
13 FF 00 0F 13 02 12 00 93 02 20 00 E3 14 52 FE 13 FF 00 0F 13 02 12 00 93 02 20 00 E3 14 52 FE
93 0E 00 0F 93 01 B0 00 63 10 DF 07 13 02 00 00 93 0E 00 0F 93 01 B0 00 63 10 DF 07 13 02 00 00
B7 F0 0F F0 93 80 F0 00 13 00 00 00 13 00 00 00 B7 F0 0F F0 93 80 F0 00 13 00 00 00 13 00 00 00
13 FF F0 70 13 02 12 00 93 02 20 00 E3 12 52 FE 13 FF F0 70 13 02 12 00 93 02 20 00 E3 12 52 FE
93 0E F0 00 93 01 C0 00 63 18 DF 03 93 70 00 0F 93 0E F0 00 93 01 C0 00 63 18 DF 03 93 70 00 0F
93 0E 00 00 93 01 D0 00 63 90 D0 03 B7 00 FF 00 93 0E 00 00 93 01 D0 00 63 90 D0 03 B7 00 FF 00
93 80 F0 0F 13 F0 F0 70 93 0E 00 00 93 01 E0 00 93 80 F0 0F 13 F0 F0 70 93 0E 00 00 93 01 E0 00
63 14 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 14 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000240 @00000240
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-auipc Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-auipc.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-auipc.dump
View File

@ -30,15 +30,15 @@ Disassembly of section .text.init:
48: 00301863 bne zero,gp,58 <pass> 48: 00301863 bne zero,gp,58 <pass>
0000004c <fail>: 0000004c <fail>:
4c: 00100d13 li s10,1 4c: 00000d93 li s11,0
50: 00000d93 li s11,0 50: 00100d13 li s10,1
00000054 <loop_fail>: 00000054 <loop_fail>:
54: 0000006f j 54 <loop_fail> 54: 0000006f j 54 <loop_fail>
00000058 <pass>: 00000058 <pass>:
58: 00100d13 li s10,1 58: 00100d93 li s11,1
5c: 00100d93 li s11,1 5c: 00100d13 li s10,1
00000060 <loop_pass>: 00000060 <loop_pass>:
60: 0000006f j 60 <loop_pass> 60: 0000006f j 60 <loop_pass>
@ -51,3 +51,18 @@ Disassembly of section .tohost:
000000c0 <fromhost>: 000000c0 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

50
tests/isa/generated/rv32ui-p-auipc.mem Normal file
View File

@ -0,0 +1,50 @@
00000d13
00000d93
00002517
71c50513
004005ef
40b50533
00002eb7
710e8e93
00200193
03d51463
ffffe517
8fc50513
004005ef
40b50533
ffffeeb7
8f0e8e93
00300193
01d51463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

30
tests/isa/generated/rv32ui-p-auipc.verilog Normal file → Executable file
View File

@ -1,15 +1,15 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 17 25 00 00 13 05 C5 71 13 0D 00 00 93 0D 00 00 17 25 00 00 13 05 C5 71
EF 05 40 00 33 05 B5 40 B7 2E 00 00 93 8E 0E 71 EF 05 40 00 33 05 B5 40 B7 2E 00 00 93 8E 0E 71
93 01 20 00 63 14 D5 03 17 E5 FF FF 13 05 C5 8F 93 01 20 00 63 14 D5 03 17 E5 FF FF 13 05 C5 8F
EF 05 40 00 33 05 B5 40 B7 EE FF FF 93 8E 0E 8F EF 05 40 00 33 05 B5 40 B7 EE FF FF 93 8E 0E 8F
93 01 30 00 63 14 D5 01 63 18 30 00 13 0D 10 00 93 01 30 00 63 14 D5 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
@00000080 @00000080
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-beq Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-beq.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-beq.dump
View File

@ -225,15 +225,15 @@ Disassembly of section .text.init:
2c4: 00301863 bne zero,gp,2d4 <pass> 2c4: 00301863 bne zero,gp,2d4 <pass>
000002c8 <fail>: 000002c8 <fail>:
2c8: 00100d13 li s10,1 2c8: 00000d93 li s11,0
2cc: 00000d93 li s11,0 2cc: 00100d13 li s10,1
000002d0 <loop_fail>: 000002d0 <loop_fail>:
2d0: 0000006f j 2d0 <loop_fail> 2d0: 0000006f j 2d0 <loop_fail>
000002d4 <pass>: 000002d4 <pass>:
2d4: 00100d13 li s10,1 2d4: 00100d93 li s11,1
2d8: 00100d93 li s11,1 2d8: 00100d13 li s10,1
000002dc <loop_pass>: 000002dc <loop_pass>:
2dc: 0000006f j 2dc <loop_pass> 2dc: 0000006f j 2dc <loop_pass>
@ -246,3 +246,18 @@ Disassembly of section .tohost:
00000380 <fromhost>: 00000380 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

226
tests/isa/generated/rv32ui-p-beq.mem Normal file
View File

@ -0,0 +1,226 @@
00000d13
00000d93
00200193
00000093
00000113
00208663
2a301863
00301663
fe208ee3
2a301263
00300193
00100093
00100113
00208663
28301863
00301663
fe208ee3
28301263
00400193
fff00093
fff00113
00208663
26301863
00301663
fe208ee3
26301263
00500193
00000093
00100113
00208463
00301463
24301663
fe208ee3
00600193
00100093
00000113
00208463
00301463
22301863
fe208ee3
00700193
fff00093
00100113
00208463
00301463
20301a63
fe208ee3
00800193
00100093
fff00113
00208463
00301463
1e301c63
fe208ee3
00900193
00000213
00000093
fff00113
1e208063
00120213
00200293
fe5216e3
00a00193
00000213
00000093
fff00113
00000013
1a208e63
00120213
00200293
fe5214e3
00b00193
00000213
00000093
fff00113
00000013
00000013
18208a63
00120213
00200293
fe5212e3
00c00193
00000213
00000093
00000013
fff00113
16208863
00120213
00200293
fe5214e3
00d00193
00000213
00000093
00000013
fff00113
00000013
14208463
00120213
00200293
fe5212e3
00e00193
00000213
00000093
00000013
00000013
fff00113
12208063
00120213
00200293
fe5212e3
00f00193
00000213
00000093
fff00113
10208063
00120213
00200293
fe5216e3
01000193
00000213
00000093
fff00113
00000013
0c208e63
00120213
00200293
fe5214e3
01100193
00000213
00000093
fff00113
00000013
00000013
0a208a63
00120213
00200293
fe5212e3
01200193
00000213
00000093
00000013
fff00113
08208863
00120213
00200293
fe5214e3
01300193
00000213
00000093
00000013
fff00113
00000013
06208463
00120213
00200293
fe5212e3
01400193
00000213
00000093
00000013
00000013
fff00113
04208063
00120213
00200293
fe5212e3
00100093
00000a63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01500193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

112
tests/isa/generated/rv32ui-p-beq.verilog Normal file → Executable file
View File

@ -1,56 +1,56 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 00 00 63 86 20 00 63 18 30 2A 63 16 30 00 13 01 00 00 63 86 20 00 63 18 30 2A 63 16 30 00
E3 8E 20 FE 63 12 30 2A 93 01 30 00 93 00 10 00 E3 8E 20 FE 63 12 30 2A 93 01 30 00 93 00 10 00
13 01 10 00 63 86 20 00 63 18 30 28 63 16 30 00 13 01 10 00 63 86 20 00 63 18 30 28 63 16 30 00
E3 8E 20 FE 63 12 30 28 93 01 40 00 93 00 F0 FF E3 8E 20 FE 63 12 30 28 93 01 40 00 93 00 F0 FF
13 01 F0 FF 63 86 20 00 63 18 30 26 63 16 30 00 13 01 F0 FF 63 86 20 00 63 18 30 26 63 16 30 00
E3 8E 20 FE 63 12 30 26 93 01 50 00 93 00 00 00 E3 8E 20 FE 63 12 30 26 93 01 50 00 93 00 00 00
13 01 10 00 63 84 20 00 63 14 30 00 63 16 30 24 13 01 10 00 63 84 20 00 63 14 30 00 63 16 30 24
E3 8E 20 FE 93 01 60 00 93 00 10 00 13 01 00 00 E3 8E 20 FE 93 01 60 00 93 00 10 00 13 01 00 00
63 84 20 00 63 14 30 00 63 18 30 22 E3 8E 20 FE 63 84 20 00 63 14 30 00 63 18 30 22 E3 8E 20 FE
93 01 70 00 93 00 F0 FF 13 01 10 00 63 84 20 00 93 01 70 00 93 00 F0 FF 13 01 10 00 63 84 20 00
63 14 30 00 63 1A 30 20 E3 8E 20 FE 93 01 80 00 63 14 30 00 63 1A 30 20 E3 8E 20 FE 93 01 80 00
93 00 10 00 13 01 F0 FF 63 84 20 00 63 14 30 00 93 00 10 00 13 01 F0 FF 63 84 20 00 63 14 30 00
63 1C 30 1E E3 8E 20 FE 93 01 90 00 13 02 00 00 63 1C 30 1E E3 8E 20 FE 93 01 90 00 13 02 00 00
93 00 00 00 13 01 F0 FF 63 80 20 1E 13 02 12 00 93 00 00 00 13 01 F0 FF 63 80 20 1E 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 A0 00 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 A0 00 13 02 00 00
93 00 00 00 13 01 F0 FF 13 00 00 00 63 8E 20 1A 93 00 00 00 13 01 F0 FF 13 00 00 00 63 8E 20 1A
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 B0 00 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 B0 00
13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00 13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00
13 00 00 00 63 8A 20 18 13 02 12 00 93 02 20 00 13 00 00 00 63 8A 20 18 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 C0 00 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 C0 00 13 02 00 00 93 00 00 00
13 00 00 00 13 01 F0 FF 63 88 20 16 13 02 12 00 13 00 00 00 13 01 F0 FF 63 88 20 16 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 D0 00 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 D0 00 13 02 00 00
93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00 93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00
63 84 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE 63 84 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 E0 00 13 02 00 00 93 00 00 00 13 00 00 00 93 01 E0 00 13 02 00 00 93 00 00 00 13 00 00 00
13 00 00 00 13 01 F0 FF 63 80 20 12 13 02 12 00 13 00 00 00 13 01 F0 FF 63 80 20 12 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 F0 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 F0 00 13 02 00 00
93 00 00 00 13 01 F0 FF 63 80 20 10 13 02 12 00 93 00 00 00 13 01 F0 FF 63 80 20 10 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 00 01 13 02 00 00
93 00 00 00 13 01 F0 FF 13 00 00 00 63 8E 20 0C 93 00 00 00 13 01 F0 FF 13 00 00 00 63 8E 20 0C
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 10 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 10 01
13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00 13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00
13 00 00 00 63 8A 20 0A 13 02 12 00 93 02 20 00 13 00 00 00 63 8A 20 0A 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 20 01 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 20 01 13 02 00 00 93 00 00 00
13 00 00 00 13 01 F0 FF 63 88 20 08 13 02 12 00 13 00 00 00 13 01 F0 FF 63 88 20 08 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00
93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00 93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00
63 84 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE 63 84 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 40 01 13 02 00 00 93 00 00 00 13 00 00 00 93 01 40 01 13 02 00 00 93 00 00 00 13 00 00 00
13 00 00 00 13 01 F0 FF 63 80 20 04 13 02 12 00 13 00 00 00 13 01 F0 FF 63 80 20 04 13 02 12 00
93 02 20 00 E3 12 52 FE 93 00 10 00 63 0A 00 00 93 02 20 00 E3 12 52 FE 93 00 10 00 63 0A 00 00
93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 0E 30 00 93 01 50 01 93 80 10 00 93 80 10 00 93 0E 30 00 93 01 50 01
63 94 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 94 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000340 @00000340
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-bge Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-bge.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-bge.dump
View File

@ -255,15 +255,15 @@ Disassembly of section .text.init:
324: 00301863 bne zero,gp,334 <pass> 324: 00301863 bne zero,gp,334 <pass>
00000328 <fail>: 00000328 <fail>:
328: 00100d13 li s10,1 328: 00000d93 li s11,0
32c: 00000d93 li s11,0 32c: 00100d13 li s10,1
00000330 <loop_fail>: 00000330 <loop_fail>:
330: 0000006f j 330 <loop_fail> 330: 0000006f j 330 <loop_fail>
00000334 <pass>: 00000334 <pass>:
334: 00100d13 li s10,1 334: 00100d93 li s11,1
338: 00100d93 li s11,1 338: 00100d13 li s10,1
0000033c <loop_pass>: 0000033c <loop_pass>:
33c: 0000006f j 33c <loop_pass> 33c: 0000006f j 33c <loop_pass>
@ -277,3 +277,18 @@ Disassembly of section .tohost:
000003c0 <fromhost>: 000003c0 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

242
tests/isa/generated/rv32ui-p-bge.mem Normal file
View File

@ -0,0 +1,242 @@
00000d13
00000d93
00200193
00000093
00000113
0020d663
30301863
00301663
fe20dee3
30301263
00300193
00100093
00100113
0020d663
2e301863
00301663
fe20dee3
2e301263
00400193
fff00093
fff00113
0020d663
2c301863
00301663
fe20dee3
2c301263
00500193
00100093
00000113
0020d663
2a301863
00301663
fe20dee3
2a301263
00600193
00100093
fff00113
0020d663
28301863
00301663
fe20dee3
28301263
00700193
fff00093
ffe00113
0020d663
26301863
00301663
fe20dee3
26301263
00800193
00000093
00100113
0020d463
00301463
24301663
fe20dee3
00900193
fff00093
00100113
0020d463
00301463
22301863
fe20dee3
00a00193
ffe00093
fff00113
0020d463
00301463
20301a63
fe20dee3
00b00193
ffe00093
00100113
0020d463
00301463
1e301c63
fe20dee3
00c00193
00000213
fff00093
00000113
1e20d063
00120213
00200293
fe5216e3
00d00193
00000213
fff00093
00000113
00000013
1a20de63
00120213
00200293
fe5214e3
00e00193
00000213
fff00093
00000113
00000013
00000013
1820da63
00120213
00200293
fe5212e3
00f00193
00000213
fff00093
00000013
00000113
1620d863
00120213
00200293
fe5214e3
01000193
00000213
fff00093
00000013
00000113
00000013
1420d463
00120213
00200293
fe5212e3
01100193
00000213
fff00093
00000013
00000013
00000113
1220d063
00120213
00200293
fe5212e3
01200193
00000213
fff00093
00000113
1020d063
00120213
00200293
fe5216e3
01300193
00000213
fff00093
00000113
00000013
0c20de63
00120213
00200293
fe5214e3
01400193
00000213
fff00093
00000113
00000013
00000013
0a20da63
00120213
00200293
fe5212e3
01500193
00000213
fff00093
00000013
00000113
0820d863
00120213
00200293
fe5214e3
01600193
00000213
fff00093
00000013
00000113
00000013
0620d463
00120213
00200293
fe5212e3
01700193
00000213
fff00093
00000013
00000013
00000113
0420d063
00120213
00200293
fe5212e3
00100093
0000da63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01800193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

120
tests/isa/generated/rv32ui-p-bge.verilog Normal file → Executable file
View File

@ -1,60 +1,60 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 00 00 63 D6 20 00 63 18 30 30 63 16 30 00 13 01 00 00 63 D6 20 00 63 18 30 30 63 16 30 00
E3 DE 20 FE 63 12 30 30 93 01 30 00 93 00 10 00 E3 DE 20 FE 63 12 30 30 93 01 30 00 93 00 10 00
13 01 10 00 63 D6 20 00 63 18 30 2E 63 16 30 00 13 01 10 00 63 D6 20 00 63 18 30 2E 63 16 30 00
E3 DE 20 FE 63 12 30 2E 93 01 40 00 93 00 F0 FF E3 DE 20 FE 63 12 30 2E 93 01 40 00 93 00 F0 FF
13 01 F0 FF 63 D6 20 00 63 18 30 2C 63 16 30 00 13 01 F0 FF 63 D6 20 00 63 18 30 2C 63 16 30 00
E3 DE 20 FE 63 12 30 2C 93 01 50 00 93 00 10 00 E3 DE 20 FE 63 12 30 2C 93 01 50 00 93 00 10 00
13 01 00 00 63 D6 20 00 63 18 30 2A 63 16 30 00 13 01 00 00 63 D6 20 00 63 18 30 2A 63 16 30 00
E3 DE 20 FE 63 12 30 2A 93 01 60 00 93 00 10 00 E3 DE 20 FE 63 12 30 2A 93 01 60 00 93 00 10 00
13 01 F0 FF 63 D6 20 00 63 18 30 28 63 16 30 00 13 01 F0 FF 63 D6 20 00 63 18 30 28 63 16 30 00
E3 DE 20 FE 63 12 30 28 93 01 70 00 93 00 F0 FF E3 DE 20 FE 63 12 30 28 93 01 70 00 93 00 F0 FF
13 01 E0 FF 63 D6 20 00 63 18 30 26 63 16 30 00 13 01 E0 FF 63 D6 20 00 63 18 30 26 63 16 30 00
E3 DE 20 FE 63 12 30 26 93 01 80 00 93 00 00 00 E3 DE 20 FE 63 12 30 26 93 01 80 00 93 00 00 00
13 01 10 00 63 D4 20 00 63 14 30 00 63 16 30 24 13 01 10 00 63 D4 20 00 63 14 30 00 63 16 30 24
E3 DE 20 FE 93 01 90 00 93 00 F0 FF 13 01 10 00 E3 DE 20 FE 93 01 90 00 93 00 F0 FF 13 01 10 00
63 D4 20 00 63 14 30 00 63 18 30 22 E3 DE 20 FE 63 D4 20 00 63 14 30 00 63 18 30 22 E3 DE 20 FE
93 01 A0 00 93 00 E0 FF 13 01 F0 FF 63 D4 20 00 93 01 A0 00 93 00 E0 FF 13 01 F0 FF 63 D4 20 00
63 14 30 00 63 1A 30 20 E3 DE 20 FE 93 01 B0 00 63 14 30 00 63 1A 30 20 E3 DE 20 FE 93 01 B0 00
93 00 E0 FF 13 01 10 00 63 D4 20 00 63 14 30 00 93 00 E0 FF 13 01 10 00 63 D4 20 00 63 14 30 00
63 1C 30 1E E3 DE 20 FE 93 01 C0 00 13 02 00 00 63 1C 30 1E E3 DE 20 FE 93 01 C0 00 13 02 00 00
93 00 F0 FF 13 01 00 00 63 D0 20 1E 13 02 12 00 93 00 F0 FF 13 01 00 00 63 D0 20 1E 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 D0 00 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 D0 00 13 02 00 00
93 00 F0 FF 13 01 00 00 13 00 00 00 63 DE 20 1A 93 00 F0 FF 13 01 00 00 13 00 00 00 63 DE 20 1A
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 E0 00 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 E0 00
13 02 00 00 93 00 F0 FF 13 01 00 00 13 00 00 00 13 02 00 00 93 00 F0 FF 13 01 00 00 13 00 00 00
13 00 00 00 63 DA 20 18 13 02 12 00 93 02 20 00 13 00 00 00 63 DA 20 18 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 F0 00 13 02 00 00 93 00 F0 FF E3 12 52 FE 93 01 F0 00 13 02 00 00 93 00 F0 FF
13 00 00 00 13 01 00 00 63 D8 20 16 13 02 12 00 13 00 00 00 13 01 00 00 63 D8 20 16 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 00 01 13 02 00 00
93 00 F0 FF 13 00 00 00 13 01 00 00 13 00 00 00 93 00 F0 FF 13 00 00 00 13 01 00 00 13 00 00 00
63 D4 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE 63 D4 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 10 01 13 02 00 00 93 00 F0 FF 13 00 00 00 93 01 10 01 13 02 00 00 93 00 F0 FF 13 00 00 00
13 00 00 00 13 01 00 00 63 D0 20 12 13 02 12 00 13 00 00 00 13 01 00 00 63 D0 20 12 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 20 01 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 20 01 13 02 00 00
93 00 F0 FF 13 01 00 00 63 D0 20 10 13 02 12 00 93 00 F0 FF 13 01 00 00 63 D0 20 10 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 30 01 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 30 01 13 02 00 00
93 00 F0 FF 13 01 00 00 13 00 00 00 63 DE 20 0C 93 00 F0 FF 13 01 00 00 13 00 00 00 63 DE 20 0C
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 40 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 40 01
13 02 00 00 93 00 F0 FF 13 01 00 00 13 00 00 00 13 02 00 00 93 00 F0 FF 13 01 00 00 13 00 00 00
13 00 00 00 63 DA 20 0A 13 02 12 00 93 02 20 00 13 00 00 00 63 DA 20 0A 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 50 01 13 02 00 00 93 00 F0 FF E3 12 52 FE 93 01 50 01 13 02 00 00 93 00 F0 FF
13 00 00 00 13 01 00 00 63 D8 20 08 13 02 12 00 13 00 00 00 13 01 00 00 63 D8 20 08 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 60 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 60 01 13 02 00 00
93 00 F0 FF 13 00 00 00 13 01 00 00 13 00 00 00 93 00 F0 FF 13 00 00 00 13 01 00 00 13 00 00 00
63 D4 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE 63 D4 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 70 01 13 02 00 00 93 00 F0 FF 13 00 00 00 93 01 70 01 13 02 00 00 93 00 F0 FF 13 00 00 00
13 00 00 00 13 01 00 00 63 D0 20 04 13 02 12 00 13 00 00 00 13 01 00 00 63 D0 20 04 13 02 12 00
93 02 20 00 E3 12 52 FE 93 00 10 00 63 DA 00 00 93 02 20 00 E3 12 52 FE 93 00 10 00 63 DA 00 00
93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 0E 30 00 93 01 80 01 93 80 10 00 93 80 10 00 93 0E 30 00 93 01 80 01
63 94 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 94 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00
@00000380 @00000380
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-bgeu Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-bgeu.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-bgeu.dump
View File

@ -268,15 +268,15 @@ Disassembly of section .text.init:
358: 00301863 bne zero,gp,368 <pass> 358: 00301863 bne zero,gp,368 <pass>
0000035c <fail>: 0000035c <fail>:
35c: 00100d13 li s10,1 35c: 00000d93 li s11,0
360: 00000d93 li s11,0 360: 00100d13 li s10,1
00000364 <loop_fail>: 00000364 <loop_fail>:
364: 0000006f j 364 <loop_fail> 364: 0000006f j 364 <loop_fail>
00000368 <pass>: 00000368 <pass>:
368: 00100d13 li s10,1 368: 00100d93 li s11,1
36c: 00100d93 li s11,1 36c: 00100d13 li s10,1
00000370 <loop_pass>: 00000370 <loop_pass>:
370: 0000006f j 370 <loop_pass> 370: 0000006f j 370 <loop_pass>
@ -289,3 +289,18 @@ Disassembly of section .tohost:
00000400 <fromhost>: 00000400 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

258
tests/isa/generated/rv32ui-p-bgeu.mem Normal file
View File

@ -0,0 +1,258 @@
00000d13
00000d93
00200193
00000093
00000113
0020f663
34301263
00301663
fe20fee3
32301c63
00300193
00100093
00100113
0020f663
32301263
00301663
fe20fee3
30301c63
00400193
fff00093
fff00113
0020f663
30301263
00301663
fe20fee3
2e301c63
00500193
00100093
00000113
0020f663
2e301263
00301663
fe20fee3
2c301c63
00600193
fff00093
ffe00113
0020f663
2c301263
00301663
fe20fee3
2a301c63
00700193
fff00093
00000113
0020f663
2a301263
00301663
fe20fee3
28301c63
00800193
00000093
00100113
0020f463
00301463
28301063
fe20fee3
00900193
ffe00093
fff00113
0020f463
00301463
26301263
fe20fee3
00a00193
00000093
fff00113
0020f463
00301463
24301463
fe20fee3
00b00193
800000b7
fff08093
80000137
0020f463
00301463
22301463
fe20fee3
00c00193
00000213
f00000b7
fff08093
f0000137
2020f663
00120213
00200293
fe5214e3
00d00193
00000213
f00000b7
fff08093
f0000137
00000013
1e20f263
00120213
00200293
fe5212e3
00e00193
00000213
f00000b7
fff08093
f0000137
00000013
00000013
1a20fc63
00120213
00200293
fe5210e3
00f00193
00000213
f00000b7
fff08093
00000013
f0000137
1820f863
00120213
00200293
fe5212e3
01000193
00000213
f00000b7
fff08093
00000013
f0000137
00000013
1620f263
00120213
00200293
fe5210e3
01100193
00000213
f00000b7
fff08093
00000013
00000013
f0000137
1220fc63
00120213
00200293
fe5210e3
01200193
00000213
f00000b7
fff08093
f0000137
1020fa63
00120213
00200293
fe5214e3
01300193
00000213
f00000b7
fff08093
f0000137
00000013
0e20f663
00120213
00200293
fe5212e3
01400193
00000213
f00000b7
fff08093
f0000137
00000013
00000013
0c20f063
00120213
00200293
fe5210e3
01500193
00000213
f00000b7
fff08093
00000013
f0000137
0820fc63
00120213
00200293
fe5212e3
01600193
00000213
f00000b7
fff08093
00000013
f0000137
00000013
0620f663
00120213
00200293
fe5210e3
01700193
00000213
f00000b7
fff08093
00000013
00000013
f0000137
0420f063
00120213
00200293
fe5210e3
00100093
0000fa63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01800193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

128
tests/isa/generated/rv32ui-p-bgeu.verilog Normal file → Executable file
View File

@ -1,64 +1,64 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 00 00 63 F6 20 00 63 12 30 34 63 16 30 00 13 01 00 00 63 F6 20 00 63 12 30 34 63 16 30 00
E3 FE 20 FE 63 1C 30 32 93 01 30 00 93 00 10 00 E3 FE 20 FE 63 1C 30 32 93 01 30 00 93 00 10 00
13 01 10 00 63 F6 20 00 63 12 30 32 63 16 30 00 13 01 10 00 63 F6 20 00 63 12 30 32 63 16 30 00
E3 FE 20 FE 63 1C 30 30 93 01 40 00 93 00 F0 FF E3 FE 20 FE 63 1C 30 30 93 01 40 00 93 00 F0 FF
13 01 F0 FF 63 F6 20 00 63 12 30 30 63 16 30 00 13 01 F0 FF 63 F6 20 00 63 12 30 30 63 16 30 00
E3 FE 20 FE 63 1C 30 2E 93 01 50 00 93 00 10 00 E3 FE 20 FE 63 1C 30 2E 93 01 50 00 93 00 10 00
13 01 00 00 63 F6 20 00 63 12 30 2E 63 16 30 00 13 01 00 00 63 F6 20 00 63 12 30 2E 63 16 30 00
E3 FE 20 FE 63 1C 30 2C 93 01 60 00 93 00 F0 FF E3 FE 20 FE 63 1C 30 2C 93 01 60 00 93 00 F0 FF
13 01 E0 FF 63 F6 20 00 63 12 30 2C 63 16 30 00 13 01 E0 FF 63 F6 20 00 63 12 30 2C 63 16 30 00
E3 FE 20 FE 63 1C 30 2A 93 01 70 00 93 00 F0 FF E3 FE 20 FE 63 1C 30 2A 93 01 70 00 93 00 F0 FF
13 01 00 00 63 F6 20 00 63 12 30 2A 63 16 30 00 13 01 00 00 63 F6 20 00 63 12 30 2A 63 16 30 00
E3 FE 20 FE 63 1C 30 28 93 01 80 00 93 00 00 00 E3 FE 20 FE 63 1C 30 28 93 01 80 00 93 00 00 00
13 01 10 00 63 F4 20 00 63 14 30 00 63 10 30 28 13 01 10 00 63 F4 20 00 63 14 30 00 63 10 30 28
E3 FE 20 FE 93 01 90 00 93 00 E0 FF 13 01 F0 FF E3 FE 20 FE 93 01 90 00 93 00 E0 FF 13 01 F0 FF
63 F4 20 00 63 14 30 00 63 12 30 26 E3 FE 20 FE 63 F4 20 00 63 14 30 00 63 12 30 26 E3 FE 20 FE
93 01 A0 00 93 00 00 00 13 01 F0 FF 63 F4 20 00 93 01 A0 00 93 00 00 00 13 01 F0 FF 63 F4 20 00
63 14 30 00 63 14 30 24 E3 FE 20 FE 93 01 B0 00 63 14 30 00 63 14 30 24 E3 FE 20 FE 93 01 B0 00
B7 00 00 80 93 80 F0 FF 37 01 00 80 63 F4 20 00 B7 00 00 80 93 80 F0 FF 37 01 00 80 63 F4 20 00
63 14 30 00 63 14 30 22 E3 FE 20 FE 93 01 C0 00 63 14 30 00 63 14 30 22 E3 FE 20 FE 93 01 C0 00
13 02 00 00 B7 00 00 F0 93 80 F0 FF 37 01 00 F0 13 02 00 00 B7 00 00 F0 93 80 F0 FF 37 01 00 F0
63 F6 20 20 13 02 12 00 93 02 20 00 E3 14 52 FE 63 F6 20 20 13 02 12 00 93 02 20 00 E3 14 52 FE
93 01 D0 00 13 02 00 00 B7 00 00 F0 93 80 F0 FF 93 01 D0 00 13 02 00 00 B7 00 00 F0 93 80 F0 FF
37 01 00 F0 13 00 00 00 63 F2 20 1E 13 02 12 00 37 01 00 F0 13 00 00 00 63 F2 20 1E 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 E0 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 E0 00 13 02 00 00
B7 00 00 F0 93 80 F0 FF 37 01 00 F0 13 00 00 00 B7 00 00 F0 93 80 F0 FF 37 01 00 F0 13 00 00 00
13 00 00 00 63 FC 20 1A 13 02 12 00 93 02 20 00 13 00 00 00 63 FC 20 1A 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 F0 00 13 02 00 00 B7 00 00 F0 E3 10 52 FE 93 01 F0 00 13 02 00 00 B7 00 00 F0
93 80 F0 FF 13 00 00 00 37 01 00 F0 63 F8 20 18 93 80 F0 FF 13 00 00 00 37 01 00 F0 63 F8 20 18
13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 00 01 13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 00 01
13 02 00 00 B7 00 00 F0 93 80 F0 FF 13 00 00 00 13 02 00 00 B7 00 00 F0 93 80 F0 FF 13 00 00 00
37 01 00 F0 13 00 00 00 63 F2 20 16 13 02 12 00 37 01 00 F0 13 00 00 00 63 F2 20 16 13 02 12 00
93 02 20 00 E3 10 52 FE 93 01 10 01 13 02 00 00 93 02 20 00 E3 10 52 FE 93 01 10 01 13 02 00 00
B7 00 00 F0 93 80 F0 FF 13 00 00 00 13 00 00 00 B7 00 00 F0 93 80 F0 FF 13 00 00 00 13 00 00 00
37 01 00 F0 63 FC 20 12 13 02 12 00 93 02 20 00 37 01 00 F0 63 FC 20 12 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 20 01 13 02 00 00 B7 00 00 F0 E3 10 52 FE 93 01 20 01 13 02 00 00 B7 00 00 F0
93 80 F0 FF 37 01 00 F0 63 FA 20 10 13 02 12 00 93 80 F0 FF 37 01 00 F0 63 FA 20 10 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00
B7 00 00 F0 93 80 F0 FF 37 01 00 F0 13 00 00 00 B7 00 00 F0 93 80 F0 FF 37 01 00 F0 13 00 00 00
63 F6 20 0E 13 02 12 00 93 02 20 00 E3 12 52 FE 63 F6 20 0E 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 40 01 13 02 00 00 B7 00 00 F0 93 80 F0 FF 93 01 40 01 13 02 00 00 B7 00 00 F0 93 80 F0 FF
37 01 00 F0 13 00 00 00 13 00 00 00 63 F0 20 0C 37 01 00 F0 13 00 00 00 13 00 00 00 63 F0 20 0C
13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 50 01 13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 50 01
13 02 00 00 B7 00 00 F0 93 80 F0 FF 13 00 00 00 13 02 00 00 B7 00 00 F0 93 80 F0 FF 13 00 00 00
37 01 00 F0 63 FC 20 08 13 02 12 00 93 02 20 00 37 01 00 F0 63 FC 20 08 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 60 01 13 02 00 00 B7 00 00 F0 E3 12 52 FE 93 01 60 01 13 02 00 00 B7 00 00 F0
93 80 F0 FF 13 00 00 00 37 01 00 F0 13 00 00 00 93 80 F0 FF 13 00 00 00 37 01 00 F0 13 00 00 00
63 F6 20 06 13 02 12 00 93 02 20 00 E3 10 52 FE 63 F6 20 06 13 02 12 00 93 02 20 00 E3 10 52 FE
93 01 70 01 13 02 00 00 B7 00 00 F0 93 80 F0 FF 93 01 70 01 13 02 00 00 B7 00 00 F0 93 80 F0 FF
13 00 00 00 13 00 00 00 37 01 00 F0 63 F0 20 04 13 00 00 00 13 00 00 00 37 01 00 F0 63 F0 20 04
13 02 12 00 93 02 20 00 E3 10 52 FE 93 00 10 00 13 02 12 00 93 02 20 00 E3 10 52 FE 93 00 10 00
63 FA 00 00 93 80 10 00 93 80 10 00 93 80 10 00 63 FA 00 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00 93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00
93 01 80 01 63 94 D0 01 63 18 30 00 13 0D 10 00 93 01 80 01 63 94 D0 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@000003C0 @000003C0
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-blt Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-blt.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-blt.dump
View File

@ -225,15 +225,15 @@ Disassembly of section .text.init:
2c4: 00301863 bne zero,gp,2d4 <pass> 2c4: 00301863 bne zero,gp,2d4 <pass>
000002c8 <fail>: 000002c8 <fail>:
2c8: 00100d13 li s10,1 2c8: 00000d93 li s11,0
2cc: 00000d93 li s11,0 2cc: 00100d13 li s10,1
000002d0 <loop_fail>: 000002d0 <loop_fail>:
2d0: 0000006f j 2d0 <loop_fail> 2d0: 0000006f j 2d0 <loop_fail>
000002d4 <pass>: 000002d4 <pass>:
2d4: 00100d13 li s10,1 2d4: 00100d93 li s11,1
2d8: 00100d93 li s11,1 2d8: 00100d13 li s10,1
000002dc <loop_pass>: 000002dc <loop_pass>:
2dc: 0000006f j 2dc <loop_pass> 2dc: 0000006f j 2dc <loop_pass>
@ -246,3 +246,18 @@ Disassembly of section .tohost:
00000380 <fromhost>: 00000380 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

226
tests/isa/generated/rv32ui-p-blt.mem Normal file
View File

@ -0,0 +1,226 @@
00000d13
00000d93
00200193
00000093
00100113
0020c663
2a301863
00301663
fe20cee3
2a301263
00300193
fff00093
00100113
0020c663
28301863
00301663
fe20cee3
28301263
00400193
ffe00093
fff00113
0020c663
26301863
00301663
fe20cee3
26301263
00500193
00100093
00000113
0020c463
00301463
24301663
fe20cee3
00600193
00100093
fff00113
0020c463
00301463
22301863
fe20cee3
00700193
fff00093
ffe00113
0020c463
00301463
20301a63
fe20cee3
00800193
00100093
ffe00113
0020c463
00301463
1e301c63
fe20cee3
00900193
00000213
00000093
fff00113
1e20c063
00120213
00200293
fe5216e3
00a00193
00000213
00000093
fff00113
00000013
1a20ce63
00120213
00200293
fe5214e3
00b00193
00000213
00000093
fff00113
00000013
00000013
1820ca63
00120213
00200293
fe5212e3
00c00193
00000213
00000093
00000013
fff00113
1620c863
00120213
00200293
fe5214e3
00d00193
00000213
00000093
00000013
fff00113
00000013
1420c463
00120213
00200293
fe5212e3
00e00193
00000213
00000093
00000013
00000013
fff00113
1220c063
00120213
00200293
fe5212e3
00f00193
00000213
00000093
fff00113
1020c063
00120213
00200293
fe5216e3
01000193
00000213
00000093
fff00113
00000013
0c20ce63
00120213
00200293
fe5214e3
01100193
00000213
00000093
fff00113
00000013
00000013
0a20ca63
00120213
00200293
fe5212e3
01200193
00000213
00000093
00000013
fff00113
0820c863
00120213
00200293
fe5214e3
01300193
00000213
00000093
00000013
fff00113
00000013
0620c463
00120213
00200293
fe5212e3
01400193
00000213
00000093
00000013
00000013
fff00113
0420c063
00120213
00200293
fe5212e3
00100093
00104a63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01500193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

112
tests/isa/generated/rv32ui-p-blt.verilog Normal file → Executable file
View File

@ -1,56 +1,56 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 10 00 63 C6 20 00 63 18 30 2A 63 16 30 00 13 01 10 00 63 C6 20 00 63 18 30 2A 63 16 30 00
E3 CE 20 FE 63 12 30 2A 93 01 30 00 93 00 F0 FF E3 CE 20 FE 63 12 30 2A 93 01 30 00 93 00 F0 FF
13 01 10 00 63 C6 20 00 63 18 30 28 63 16 30 00 13 01 10 00 63 C6 20 00 63 18 30 28 63 16 30 00
E3 CE 20 FE 63 12 30 28 93 01 40 00 93 00 E0 FF E3 CE 20 FE 63 12 30 28 93 01 40 00 93 00 E0 FF
13 01 F0 FF 63 C6 20 00 63 18 30 26 63 16 30 00 13 01 F0 FF 63 C6 20 00 63 18 30 26 63 16 30 00
E3 CE 20 FE 63 12 30 26 93 01 50 00 93 00 10 00 E3 CE 20 FE 63 12 30 26 93 01 50 00 93 00 10 00
13 01 00 00 63 C4 20 00 63 14 30 00 63 16 30 24 13 01 00 00 63 C4 20 00 63 14 30 00 63 16 30 24
E3 CE 20 FE 93 01 60 00 93 00 10 00 13 01 F0 FF E3 CE 20 FE 93 01 60 00 93 00 10 00 13 01 F0 FF
63 C4 20 00 63 14 30 00 63 18 30 22 E3 CE 20 FE 63 C4 20 00 63 14 30 00 63 18 30 22 E3 CE 20 FE
93 01 70 00 93 00 F0 FF 13 01 E0 FF 63 C4 20 00 93 01 70 00 93 00 F0 FF 13 01 E0 FF 63 C4 20 00
63 14 30 00 63 1A 30 20 E3 CE 20 FE 93 01 80 00 63 14 30 00 63 1A 30 20 E3 CE 20 FE 93 01 80 00
93 00 10 00 13 01 E0 FF 63 C4 20 00 63 14 30 00 93 00 10 00 13 01 E0 FF 63 C4 20 00 63 14 30 00
63 1C 30 1E E3 CE 20 FE 93 01 90 00 13 02 00 00 63 1C 30 1E E3 CE 20 FE 93 01 90 00 13 02 00 00
93 00 00 00 13 01 F0 FF 63 C0 20 1E 13 02 12 00 93 00 00 00 13 01 F0 FF 63 C0 20 1E 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 A0 00 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 A0 00 13 02 00 00
93 00 00 00 13 01 F0 FF 13 00 00 00 63 CE 20 1A 93 00 00 00 13 01 F0 FF 13 00 00 00 63 CE 20 1A
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 B0 00 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 B0 00
13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00 13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00
13 00 00 00 63 CA 20 18 13 02 12 00 93 02 20 00 13 00 00 00 63 CA 20 18 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 C0 00 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 C0 00 13 02 00 00 93 00 00 00
13 00 00 00 13 01 F0 FF 63 C8 20 16 13 02 12 00 13 00 00 00 13 01 F0 FF 63 C8 20 16 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 D0 00 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 D0 00 13 02 00 00
93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00 93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00
63 C4 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE 63 C4 20 14 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 E0 00 13 02 00 00 93 00 00 00 13 00 00 00 93 01 E0 00 13 02 00 00 93 00 00 00 13 00 00 00
13 00 00 00 13 01 F0 FF 63 C0 20 12 13 02 12 00 13 00 00 00 13 01 F0 FF 63 C0 20 12 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 F0 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 F0 00 13 02 00 00
93 00 00 00 13 01 F0 FF 63 C0 20 10 13 02 12 00 93 00 00 00 13 01 F0 FF 63 C0 20 10 13 02 12 00
93 02 20 00 E3 16 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 16 52 FE 93 01 00 01 13 02 00 00
93 00 00 00 13 01 F0 FF 13 00 00 00 63 CE 20 0C 93 00 00 00 13 01 F0 FF 13 00 00 00 63 CE 20 0C
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 10 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 10 01
13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00 13 02 00 00 93 00 00 00 13 01 F0 FF 13 00 00 00
13 00 00 00 63 CA 20 0A 13 02 12 00 93 02 20 00 13 00 00 00 63 CA 20 0A 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 20 01 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 20 01 13 02 00 00 93 00 00 00
13 00 00 00 13 01 F0 FF 63 C8 20 08 13 02 12 00 13 00 00 00 13 01 F0 FF 63 C8 20 08 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 00 00
93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00 93 00 00 00 13 00 00 00 13 01 F0 FF 13 00 00 00
63 C4 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE 63 C4 20 06 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 40 01 13 02 00 00 93 00 00 00 13 00 00 00 93 01 40 01 13 02 00 00 93 00 00 00 13 00 00 00
13 00 00 00 13 01 F0 FF 63 C0 20 04 13 02 12 00 13 00 00 00 13 01 F0 FF 63 C0 20 04 13 02 12 00
93 02 20 00 E3 12 52 FE 93 00 10 00 63 4A 10 00 93 02 20 00 E3 12 52 FE 93 00 10 00 63 4A 10 00
93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 0E 30 00 93 01 50 01 93 80 10 00 93 80 10 00 93 0E 30 00 93 01 50 01
63 94 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 94 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000340 @00000340
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-bltu Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-bltu.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-bltu.dump
View File

@ -238,15 +238,15 @@ Disassembly of section .text.init:
2f8: 00301863 bne zero,gp,308 <pass> 2f8: 00301863 bne zero,gp,308 <pass>
000002fc <fail>: 000002fc <fail>:
2fc: 00100d13 li s10,1 2fc: 00000d93 li s11,0
300: 00000d93 li s11,0 300: 00100d13 li s10,1
00000304 <loop_fail>: 00000304 <loop_fail>:
304: 0000006f j 304 <loop_fail> 304: 0000006f j 304 <loop_fail>
00000308 <pass>: 00000308 <pass>:
308: 00100d13 li s10,1 308: 00100d93 li s11,1
30c: 00100d93 li s11,1 30c: 00100d13 li s10,1
00000310 <loop_pass>: 00000310 <loop_pass>:
310: 0000006f j 310 <loop_pass> 310: 0000006f j 310 <loop_pass>
@ -259,3 +259,18 @@ Disassembly of section .tohost:
000003c0 <fromhost>: 000003c0 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

242
tests/isa/generated/rv32ui-p-bltu.mem Normal file
View File

@ -0,0 +1,242 @@
00000d13
00000d93
00200193
00000093
00100113
0020e663
2e301263
00301663
fe20eee3
2c301c63
00300193
ffe00093
fff00113
0020e663
2c301263
00301663
fe20eee3
2a301c63
00400193
00000093
fff00113
0020e663
2a301263
00301663
fe20eee3
28301c63
00500193
00100093
00000113
0020e463
00301463
28301063
fe20eee3
00600193
fff00093
ffe00113
0020e463
00301463
26301263
fe20eee3
00700193
fff00093
00000113
0020e463
00301463
24301463
fe20eee3
00800193
800000b7
80000137
fff10113
0020e463
00301463
22301463
fe20eee3
00900193
00000213
f00000b7
f0000137
fff10113
2020e663
00120213
00200293
fe5214e3
00a00193
00000213
f00000b7
f0000137
fff10113
00000013
1e20e263
00120213
00200293
fe5212e3
00b00193
00000213
f00000b7
f0000137
fff10113
00000013
00000013
1a20ec63
00120213
00200293
fe5210e3
00c00193
00000213
f00000b7
00000013
f0000137
fff10113
1820e863
00120213
00200293
fe5212e3
00d00193
00000213
f00000b7
00000013
f0000137
fff10113
00000013
1620e263
00120213
00200293
fe5210e3
00e00193
00000213
f00000b7
00000013
00000013
f0000137
fff10113
1220ec63
00120213
00200293
fe5210e3
00f00193
00000213
f00000b7
f0000137
fff10113
1020ea63
00120213
00200293
fe5214e3
01000193
00000213
f00000b7
f0000137
fff10113
00000013
0e20e663
00120213
00200293
fe5212e3
01100193
00000213
f00000b7
f0000137
fff10113
00000013
00000013
0c20e063
00120213
00200293
fe5210e3
01200193
00000213
f00000b7
00000013
f0000137
fff10113
0820ec63
00120213
00200293
fe5212e3
01300193
00000213
f00000b7
00000013
f0000137
fff10113
00000013
0620e663
00120213
00200293
fe5210e3
01400193
00000213
f00000b7
00000013
00000013
f0000137
fff10113
0420e063
00120213
00200293
fe5210e3
00100093
00106a63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01500193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

120
tests/isa/generated/rv32ui-p-bltu.verilog Normal file → Executable file
View File

@ -1,60 +1,60 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 10 00 63 E6 20 00 63 12 30 2E 63 16 30 00 13 01 10 00 63 E6 20 00 63 12 30 2E 63 16 30 00
E3 EE 20 FE 63 1C 30 2C 93 01 30 00 93 00 E0 FF E3 EE 20 FE 63 1C 30 2C 93 01 30 00 93 00 E0 FF
13 01 F0 FF 63 E6 20 00 63 12 30 2C 63 16 30 00 13 01 F0 FF 63 E6 20 00 63 12 30 2C 63 16 30 00
E3 EE 20 FE 63 1C 30 2A 93 01 40 00 93 00 00 00 E3 EE 20 FE 63 1C 30 2A 93 01 40 00 93 00 00 00
13 01 F0 FF 63 E6 20 00 63 12 30 2A 63 16 30 00 13 01 F0 FF 63 E6 20 00 63 12 30 2A 63 16 30 00
E3 EE 20 FE 63 1C 30 28 93 01 50 00 93 00 10 00 E3 EE 20 FE 63 1C 30 28 93 01 50 00 93 00 10 00
13 01 00 00 63 E4 20 00 63 14 30 00 63 10 30 28 13 01 00 00 63 E4 20 00 63 14 30 00 63 10 30 28
E3 EE 20 FE 93 01 60 00 93 00 F0 FF 13 01 E0 FF E3 EE 20 FE 93 01 60 00 93 00 F0 FF 13 01 E0 FF
63 E4 20 00 63 14 30 00 63 12 30 26 E3 EE 20 FE 63 E4 20 00 63 14 30 00 63 12 30 26 E3 EE 20 FE
93 01 70 00 93 00 F0 FF 13 01 00 00 63 E4 20 00 93 01 70 00 93 00 F0 FF 13 01 00 00 63 E4 20 00
63 14 30 00 63 14 30 24 E3 EE 20 FE 93 01 80 00 63 14 30 00 63 14 30 24 E3 EE 20 FE 93 01 80 00
B7 00 00 80 37 01 00 80 13 01 F1 FF 63 E4 20 00 B7 00 00 80 37 01 00 80 13 01 F1 FF 63 E4 20 00
63 14 30 00 63 14 30 22 E3 EE 20 FE 93 01 90 00 63 14 30 00 63 14 30 22 E3 EE 20 FE 93 01 90 00
13 02 00 00 B7 00 00 F0 37 01 00 F0 13 01 F1 FF 13 02 00 00 B7 00 00 F0 37 01 00 F0 13 01 F1 FF
63 E6 20 20 13 02 12 00 93 02 20 00 E3 14 52 FE 63 E6 20 20 13 02 12 00 93 02 20 00 E3 14 52 FE
93 01 A0 00 13 02 00 00 B7 00 00 F0 37 01 00 F0 93 01 A0 00 13 02 00 00 B7 00 00 F0 37 01 00 F0
13 01 F1 FF 13 00 00 00 63 E2 20 1E 13 02 12 00 13 01 F1 FF 13 00 00 00 63 E2 20 1E 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 B0 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 B0 00 13 02 00 00
B7 00 00 F0 37 01 00 F0 13 01 F1 FF 13 00 00 00 B7 00 00 F0 37 01 00 F0 13 01 F1 FF 13 00 00 00
13 00 00 00 63 EC 20 1A 13 02 12 00 93 02 20 00 13 00 00 00 63 EC 20 1A 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 C0 00 13 02 00 00 B7 00 00 F0 E3 10 52 FE 93 01 C0 00 13 02 00 00 B7 00 00 F0
13 00 00 00 37 01 00 F0 13 01 F1 FF 63 E8 20 18 13 00 00 00 37 01 00 F0 13 01 F1 FF 63 E8 20 18
13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 D0 00 13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 D0 00
13 02 00 00 B7 00 00 F0 13 00 00 00 37 01 00 F0 13 02 00 00 B7 00 00 F0 13 00 00 00 37 01 00 F0
13 01 F1 FF 13 00 00 00 63 E2 20 16 13 02 12 00 13 01 F1 FF 13 00 00 00 63 E2 20 16 13 02 12 00
93 02 20 00 E3 10 52 FE 93 01 E0 00 13 02 00 00 93 02 20 00 E3 10 52 FE 93 01 E0 00 13 02 00 00
B7 00 00 F0 13 00 00 00 13 00 00 00 37 01 00 F0 B7 00 00 F0 13 00 00 00 13 00 00 00 37 01 00 F0
13 01 F1 FF 63 EC 20 12 13 02 12 00 93 02 20 00 13 01 F1 FF 63 EC 20 12 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 F0 00 13 02 00 00 B7 00 00 F0 E3 10 52 FE 93 01 F0 00 13 02 00 00 B7 00 00 F0
37 01 00 F0 13 01 F1 FF 63 EA 20 10 13 02 12 00 37 01 00 F0 13 01 F1 FF 63 EA 20 10 13 02 12 00
93 02 20 00 E3 14 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 14 52 FE 93 01 00 01 13 02 00 00
B7 00 00 F0 37 01 00 F0 13 01 F1 FF 13 00 00 00 B7 00 00 F0 37 01 00 F0 13 01 F1 FF 13 00 00 00
63 E6 20 0E 13 02 12 00 93 02 20 00 E3 12 52 FE 63 E6 20 0E 13 02 12 00 93 02 20 00 E3 12 52 FE
93 01 10 01 13 02 00 00 B7 00 00 F0 37 01 00 F0 93 01 10 01 13 02 00 00 B7 00 00 F0 37 01 00 F0
13 01 F1 FF 13 00 00 00 13 00 00 00 63 E0 20 0C 13 01 F1 FF 13 00 00 00 13 00 00 00 63 E0 20 0C
13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 20 01 13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 20 01
13 02 00 00 B7 00 00 F0 13 00 00 00 37 01 00 F0 13 02 00 00 B7 00 00 F0 13 00 00 00 37 01 00 F0
13 01 F1 FF 63 EC 20 08 13 02 12 00 93 02 20 00 13 01 F1 FF 63 EC 20 08 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 30 01 13 02 00 00 B7 00 00 F0 E3 12 52 FE 93 01 30 01 13 02 00 00 B7 00 00 F0
13 00 00 00 37 01 00 F0 13 01 F1 FF 13 00 00 00 13 00 00 00 37 01 00 F0 13 01 F1 FF 13 00 00 00
63 E6 20 06 13 02 12 00 93 02 20 00 E3 10 52 FE 63 E6 20 06 13 02 12 00 93 02 20 00 E3 10 52 FE
93 01 40 01 13 02 00 00 B7 00 00 F0 13 00 00 00 93 01 40 01 13 02 00 00 B7 00 00 F0 13 00 00 00
13 00 00 00 37 01 00 F0 13 01 F1 FF 63 E0 20 04 13 00 00 00 37 01 00 F0 13 01 F1 FF 63 E0 20 04
13 02 12 00 93 02 20 00 E3 10 52 FE 93 00 10 00 13 02 12 00 93 02 20 00 E3 10 52 FE 93 00 10 00
63 6A 10 00 93 80 10 00 93 80 10 00 93 80 10 00 63 6A 10 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00 93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00
93 01 50 01 63 94 D0 01 63 18 30 00 13 0D 10 00 93 01 50 01 63 94 D0 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000380 @00000380
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-bne Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-bne.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-bne.dump
View File

@ -226,15 +226,15 @@ Disassembly of section .text.init:
2c8: 00301863 bne zero,gp,2d8 <pass> 2c8: 00301863 bne zero,gp,2d8 <pass>
000002cc <fail>: 000002cc <fail>:
2cc: 00100d13 li s10,1 2cc: 00000d93 li s11,0
2d0: 00000d93 li s11,0 2d0: 00100d13 li s10,1
000002d4 <loop_fail>: 000002d4 <loop_fail>:
2d4: 0000006f j 2d4 <loop_fail> 2d4: 0000006f j 2d4 <loop_fail>
000002d8 <pass>: 000002d8 <pass>:
2d8: 00100d13 li s10,1 2d8: 00100d93 li s11,1
2dc: 00100d93 li s11,1 2dc: 00100d13 li s10,1
000002e0 <loop_pass>: 000002e0 <loop_pass>:
2e0: 0000006f j 2e0 <loop_pass> 2e0: 0000006f j 2e0 <loop_pass>
@ -247,3 +247,18 @@ Disassembly of section .tohost:
00000380 <fromhost>: 00000380 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

226
tests/isa/generated/rv32ui-p-bne.mem Normal file
View File

@ -0,0 +1,226 @@
00000d13
00000d93
00200193
00000093
00100113
00209663
2a301a63
00301663
fe209ee3
2a301463
00300193
00100093
00000113
00209663
28301a63
00301663
fe209ee3
28301463
00400193
fff00093
00100113
00209663
26301a63
00301663
fe209ee3
26301463
00500193
00100093
fff00113
00209663
24301a63
00301663
fe209ee3
24301463
00600193
00000093
00000113
00209463
00301463
22301863
fe209ee3
00700193
00100093
00100113
00209463
00301463
20301a63
fe209ee3
00800193
fff00093
fff00113
00209463
00301463
1e301c63
fe209ee3
00900193
00000213
00000093
00000113
1e209063
00120213
00200293
fe5216e3
00a00193
00000213
00000093
00000113
00000013
1a209e63
00120213
00200293
fe5214e3
00b00193
00000213
00000093
00000113
00000013
00000013
18209a63
00120213
00200293
fe5212e3
00c00193
00000213
00000093
00000013
00000113
16209863
00120213
00200293
fe5214e3
00d00193
00000213
00000093
00000013
00000113
00000013
14209463
00120213
00200293
fe5212e3
00e00193
00000213
00000093
00000013
00000013
00000113
12209063
00120213
00200293
fe5212e3
00f00193
00000213
00000093
00000113
10209063
00120213
00200293
fe5216e3
01000193
00000213
00000093
00000113
00000013
0c209e63
00120213
00200293
fe5214e3
01100193
00000213
00000093
00000113
00000013
00000013
0a209a63
00120213
00200293
fe5212e3
01200193
00000213
00000093
00000013
00000113
08209863
00120213
00200293
fe5214e3
01300193
00000213
00000093
00000013
00000113
00000013
06209463
00120213
00200293
fe5212e3
01400193
00000213
00000093
00000013
00000013
00000113
04209063
00120213
00200293
fe5212e3
00100093
00009a63
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
01500193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

112
tests/isa/generated/rv32ui-p-bne.verilog Normal file → Executable file
View File

@ -1,56 +1,56 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
13 01 10 00 63 96 20 00 63 1A 30 2A 63 16 30 00 13 01 10 00 63 96 20 00 63 1A 30 2A 63 16 30 00
E3 9E 20 FE 63 14 30 2A 93 01 30 00 93 00 10 00 E3 9E 20 FE 63 14 30 2A 93 01 30 00 93 00 10 00
13 01 00 00 63 96 20 00 63 1A 30 28 63 16 30 00 13 01 00 00 63 96 20 00 63 1A 30 28 63 16 30 00
E3 9E 20 FE 63 14 30 28 93 01 40 00 93 00 F0 FF E3 9E 20 FE 63 14 30 28 93 01 40 00 93 00 F0 FF
13 01 10 00 63 96 20 00 63 1A 30 26 63 16 30 00 13 01 10 00 63 96 20 00 63 1A 30 26 63 16 30 00
E3 9E 20 FE 63 14 30 26 93 01 50 00 93 00 10 00 E3 9E 20 FE 63 14 30 26 93 01 50 00 93 00 10 00
13 01 F0 FF 63 96 20 00 63 1A 30 24 63 16 30 00 13 01 F0 FF 63 96 20 00 63 1A 30 24 63 16 30 00
E3 9E 20 FE 63 14 30 24 93 01 60 00 93 00 00 00 E3 9E 20 FE 63 14 30 24 93 01 60 00 93 00 00 00
13 01 00 00 63 94 20 00 63 14 30 00 63 18 30 22 13 01 00 00 63 94 20 00 63 14 30 00 63 18 30 22
E3 9E 20 FE 93 01 70 00 93 00 10 00 13 01 10 00 E3 9E 20 FE 93 01 70 00 93 00 10 00 13 01 10 00
63 94 20 00 63 14 30 00 63 1A 30 20 E3 9E 20 FE 63 94 20 00 63 14 30 00 63 1A 30 20 E3 9E 20 FE
93 01 80 00 93 00 F0 FF 13 01 F0 FF 63 94 20 00 93 01 80 00 93 00 F0 FF 13 01 F0 FF 63 94 20 00
63 14 30 00 63 1C 30 1E E3 9E 20 FE 93 01 90 00 63 14 30 00 63 1C 30 1E E3 9E 20 FE 93 01 90 00
13 02 00 00 93 00 00 00 13 01 00 00 63 90 20 1E 13 02 00 00 93 00 00 00 13 01 00 00 63 90 20 1E
13 02 12 00 93 02 20 00 E3 16 52 FE 93 01 A0 00 13 02 12 00 93 02 20 00 E3 16 52 FE 93 01 A0 00
13 02 00 00 93 00 00 00 13 01 00 00 13 00 00 00 13 02 00 00 93 00 00 00 13 01 00 00 13 00 00 00
63 9E 20 1A 13 02 12 00 93 02 20 00 E3 14 52 FE 63 9E 20 1A 13 02 12 00 93 02 20 00 E3 14 52 FE
93 01 B0 00 13 02 00 00 93 00 00 00 13 01 00 00 93 01 B0 00 13 02 00 00 93 00 00 00 13 01 00 00
13 00 00 00 13 00 00 00 63 9A 20 18 13 02 12 00 13 00 00 00 13 00 00 00 63 9A 20 18 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 C0 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 C0 00 13 02 00 00
93 00 00 00 13 00 00 00 13 01 00 00 63 98 20 16 93 00 00 00 13 00 00 00 13 01 00 00 63 98 20 16
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 D0 00 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 D0 00
13 02 00 00 93 00 00 00 13 00 00 00 13 01 00 00 13 02 00 00 93 00 00 00 13 00 00 00 13 01 00 00
13 00 00 00 63 94 20 14 13 02 12 00 93 02 20 00 13 00 00 00 63 94 20 14 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 E0 00 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 E0 00 13 02 00 00 93 00 00 00
13 00 00 00 13 00 00 00 13 01 00 00 63 90 20 12 13 00 00 00 13 00 00 00 13 01 00 00 63 90 20 12
13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 F0 00 13 02 12 00 93 02 20 00 E3 12 52 FE 93 01 F0 00
13 02 00 00 93 00 00 00 13 01 00 00 63 90 20 10 13 02 00 00 93 00 00 00 13 01 00 00 63 90 20 10
13 02 12 00 93 02 20 00 E3 16 52 FE 93 01 00 01 13 02 12 00 93 02 20 00 E3 16 52 FE 93 01 00 01
13 02 00 00 93 00 00 00 13 01 00 00 13 00 00 00 13 02 00 00 93 00 00 00 13 01 00 00 13 00 00 00
63 9E 20 0C 13 02 12 00 93 02 20 00 E3 14 52 FE 63 9E 20 0C 13 02 12 00 93 02 20 00 E3 14 52 FE
93 01 10 01 13 02 00 00 93 00 00 00 13 01 00 00 93 01 10 01 13 02 00 00 93 00 00 00 13 01 00 00
13 00 00 00 13 00 00 00 63 9A 20 0A 13 02 12 00 13 00 00 00 13 00 00 00 63 9A 20 0A 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 20 01 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 20 01 13 02 00 00
93 00 00 00 13 00 00 00 13 01 00 00 63 98 20 08 93 00 00 00 13 00 00 00 13 01 00 00 63 98 20 08
13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 30 01 13 02 12 00 93 02 20 00 E3 14 52 FE 93 01 30 01
13 02 00 00 93 00 00 00 13 00 00 00 13 01 00 00 13 02 00 00 93 00 00 00 13 00 00 00 13 01 00 00
13 00 00 00 63 94 20 06 13 02 12 00 93 02 20 00 13 00 00 00 63 94 20 06 13 02 12 00 93 02 20 00
E3 12 52 FE 93 01 40 01 13 02 00 00 93 00 00 00 E3 12 52 FE 93 01 40 01 13 02 00 00 93 00 00 00
13 00 00 00 13 00 00 00 13 01 00 00 63 90 20 04 13 00 00 00 13 00 00 00 13 01 00 00 63 90 20 04
13 02 12 00 93 02 20 00 E3 12 52 FE 93 00 10 00 13 02 12 00 93 02 20 00 E3 12 52 FE 93 00 10 00
63 9A 00 00 93 80 10 00 93 80 10 00 93 80 10 00 63 9A 00 00 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00 93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00
93 01 50 01 63 94 D0 01 63 18 30 00 13 0D 10 00 93 01 50 01 63 94 D0 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000340 @00000340
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-fence_i Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-fence_i.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-fence_i.dump
View File

@ -65,15 +65,15 @@ Disassembly of section .text.init:
d4: 00301863 bne zero,gp,e4 <pass> d4: 00301863 bne zero,gp,e4 <pass>
000000d8 <fail>: 000000d8 <fail>:
d8: 00100d13 li s10,1 d8: 00000d93 li s11,0
dc: 00000d93 li s11,0 dc: 00100d13 li s10,1
000000e0 <loop_fail>: 000000e0 <loop_fail>:
e0: 0000006f j e0 <loop_fail> e0: 0000006f j e0 <loop_fail>
000000e4 <pass>: 000000e4 <pass>:
e4: 00100d13 li s10,1 e4: 00100d93 li s11,1
e8: 00100d93 li s11,1 e8: 00100d13 li s10,1
000000ec <loop_pass>: 000000ec <loop_pass>:
ec: 0000006f j ec <loop_pass> ec: 0000006f j ec <loop_pass>
@ -92,3 +92,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <_start+0x14>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

1058
tests/isa/generated/rv32ui-p-fence_i.mem Normal file
View File

File diff suppressed because it is too large Load Diff

56
tests/isa/generated/rv32ui-p-fence_i.verilog Normal file → Executable file
View File

@ -1,28 +1,28 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 06 F0 06 17 15 00 00 13 0D 00 00 93 0D 00 00 93 06 F0 06 17 15 00 00
03 15 45 FF 97 15 00 00 83 95 E5 FE 13 00 00 00 03 15 45 FF 97 15 00 00 83 95 E5 FE 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
97 02 00 00 23 9A A2 00 97 02 00 00 23 97 B2 00 97 02 00 00 23 9A A2 00 97 02 00 00 23 97 B2 00
0F 10 00 00 93 86 E6 0D 13 00 00 00 93 0E C0 1B 0F 10 00 00 93 86 E6 0D 13 00 00 00 93 0E C0 1B
93 01 20 00 63 9A D6 07 13 07 40 06 13 07 F7 FF 93 01 20 00 63 9A D6 07 13 07 40 06 13 07 F7 FF
E3 1E 07 FE 97 02 00 00 23 96 A2 04 97 02 00 00 E3 1E 07 FE 97 02 00 00 23 96 A2 04 97 02 00 00
23 93 B2 04 0F 10 00 00 13 00 00 00 13 00 00 00 23 93 B2 04 0F 10 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
93 86 B6 22 13 00 00 00 93 0E 90 30 93 01 30 00 93 86 B6 22 13 00 00 00 93 0E 90 30 93 01 30 00
63 94 D6 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 94 D6 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
@00001000 @00001000
93 86 D6 14 00 00 00 00 00 00 00 00 00 00 00 00 93 86 D6 14 00 00 00 00 00 00 00 00 00 00 00 00
@00001040 @00001040
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-jal Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-jal.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-jal.dump
View File

@ -38,15 +38,15 @@ Disassembly of section .text.init:
58: 00301863 bne zero,gp,68 <pass> 58: 00301863 bne zero,gp,68 <pass>
0000005c <fail>: 0000005c <fail>:
5c: 00100d13 li s10,1 5c: 00000d93 li s11,0
60: 00000d93 li s11,0 60: 00100d13 li s10,1
00000064 <loop_fail>: 00000064 <loop_fail>:
64: 0000006f j 64 <loop_fail> 64: 0000006f j 64 <loop_fail>
00000068 <pass>: 00000068 <pass>:
68: 00100d13 li s10,1 68: 00100d93 li s11,1
6c: 00100d93 li s11,1 6c: 00100d13 li s10,1
00000070 <loop_pass>: 00000070 <loop_pass>:
70: 0000006f j 70 <loop_pass> 70: 0000006f j 70 <loop_pass>
@ -59,3 +59,18 @@ Disassembly of section .tohost:
00000100 <fromhost>: 00000100 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <linkaddr_2>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

66
tests/isa/generated/rv32ui-p-jal.mem Normal file
View File

@ -0,0 +1,66 @@
00000d13
00000d93
00200193
00000093
0100026f
00000013
00000013
0400006f
00000117
ff410113
02411a63
00100093
0140006f
00108093
00108093
00108093
00108093
00108093
00108093
00300e93
00300193
01d09463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

32
tests/isa/generated/rv32ui-p-jal.verilog Normal file → Executable file
View File

@ -1,16 +1,16 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 00 00 00
6F 02 00 01 13 00 00 00 13 00 00 00 6F 00 00 04 6F 02 00 01 13 00 00 00 13 00 00 00 6F 00 00 04
17 01 00 00 13 01 41 FF 63 1A 41 02 93 00 10 00 17 01 00 00 13 01 41 FF 63 1A 41 02 93 00 10 00
6F 00 40 01 93 80 10 00 93 80 10 00 93 80 10 00 6F 00 40 01 93 80 10 00 93 80 10 00 93 80 10 00
93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00 93 80 10 00 93 80 10 00 93 80 10 00 93 0E 30 00
93 01 30 00 63 94 D0 01 63 18 30 00 13 0D 10 00 93 01 30 00 63 94 D0 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@000000C0 @000000C0
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-jalr Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-jalr.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-jalr.dump
View File

@ -76,15 +76,15 @@ Disassembly of section .text.init:
d8: 00301863 bne zero,gp,e8 <pass> d8: 00301863 bne zero,gp,e8 <pass>
000000dc <fail>: 000000dc <fail>:
dc: 00100d13 li s10,1 dc: 00000d93 li s11,0
e0: 00000d93 li s11,0 e0: 00100d13 li s10,1
000000e4 <loop_fail>: 000000e4 <loop_fail>:
e4: 0000006f j e4 <loop_fail> e4: 0000006f j e4 <loop_fail>
000000e8 <pass>: 000000e8 <pass>:
e8: 00100d13 li s10,1 e8: 00100d93 li s11,1
ec: 00100d93 li s11,1 ec: 00100d13 li s10,1
000000f0 <loop_pass>: 000000f0 <loop_pass>:
f0: 0000006f j f0 <loop_pass> f0: 0000006f j f0 <loop_pass>
@ -97,3 +97,18 @@ Disassembly of section .tohost:
00000180 <fromhost>: 00000180 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

98
tests/isa/generated/rv32ui-p-jalr.mem Normal file
View File

@ -0,0 +1,98 @@
00000d13
00000d93
00200193
00000293
00000317
01030313
000302e7
0c00006f
00000317
ffc30313
0a629a63
00400193
00000213
00000317
01030313
000309e7
08301e63
00120213
00200293
fe5214e3
00500193
00000213
00000317
01430313
00000013
000309e7
06301a63
00120213
00200293
fe5212e3
00600193
00000213
00000317
01830313
00000013
00000013
000309e7
04301463
00120213
00200293
fe5210e3
00100293
00000317
01c30313
ffc30067
00128293
00128293
00128293
00128293
00128293
00128293
00400e93
00700193
01d29463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

48
tests/isa/generated/rv32ui-p-jalr.verilog Normal file → Executable file
View File

@ -1,24 +1,24 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 93 01 20 00 93 02 00 00 13 0D 00 00 93 0D 00 00 93 01 20 00 93 02 00 00
17 03 00 00 13 03 03 01 E7 02 03 00 6F 00 00 0C 17 03 00 00 13 03 03 01 E7 02 03 00 6F 00 00 0C
17 03 00 00 13 03 C3 FF 63 9A 62 0A 93 01 40 00 17 03 00 00 13 03 C3 FF 63 9A 62 0A 93 01 40 00
13 02 00 00 17 03 00 00 13 03 03 01 E7 09 03 00 13 02 00 00 17 03 00 00 13 03 03 01 E7 09 03 00
63 1E 30 08 13 02 12 00 93 02 20 00 E3 14 52 FE 63 1E 30 08 13 02 12 00 93 02 20 00 E3 14 52 FE
93 01 50 00 13 02 00 00 17 03 00 00 13 03 43 01 93 01 50 00 13 02 00 00 17 03 00 00 13 03 43 01
13 00 00 00 E7 09 03 00 63 1A 30 06 13 02 12 00 13 00 00 00 E7 09 03 00 63 1A 30 06 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 60 00 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 60 00 13 02 00 00
17 03 00 00 13 03 83 01 13 00 00 00 13 00 00 00 17 03 00 00 13 03 83 01 13 00 00 00 13 00 00 00
E7 09 03 00 63 14 30 04 13 02 12 00 93 02 20 00 E7 09 03 00 63 14 30 04 13 02 12 00 93 02 20 00
E3 10 52 FE 93 02 10 00 17 03 00 00 13 03 C3 01 E3 10 52 FE 93 02 10 00 17 03 00 00 13 03 C3 01
67 00 C3 FF 93 82 12 00 93 82 12 00 93 82 12 00 67 00 C3 FF 93 82 12 00 93 82 12 00 93 82 12 00
93 82 12 00 93 82 12 00 93 82 12 00 93 0E 40 00 93 82 12 00 93 82 12 00 93 82 12 00 93 0E 40 00
93 01 70 00 63 94 D2 01 63 18 30 00 13 0D 10 00 93 01 70 00 63 94 D2 01 63 18 30 00 93 0D 00 00
93 0D 00 00 6F 00 00 00 13 0D 10 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 93 0D 10 00 13 0D 10 00
6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 6F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00000140 @00000140
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lb Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lb.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lb.dump
View File

@ -192,15 +192,15 @@ Disassembly of section .text.init:
250: 00301863 bne zero,gp,260 <pass> 250: 00301863 bne zero,gp,260 <pass>
00000254 <fail>: 00000254 <fail>:
254: 00100d13 li s10,1 254: 00000d93 li s11,0
258: 00000d93 li s11,0 258: 00100d13 li s10,1
0000025c <loop_fail>: 0000025c <loop_fail>:
25c: 0000006f j 25c <loop_fail> 25c: 0000006f j 25c <loop_fail>
00000260 <pass>: 00000260 <pass>:
260: 00100d13 li s10,1 260: 00100d93 li s11,1
264: 00100d93 li s11,1 264: 00100d13 li s10,1
00000268 <loop_pass>: 00000268 <loop_pass>:
268: 0000006f j 268 <loop_pass> 268: 0000006f j 268 <loop_pass>
@ -228,3 +228,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

1058
tests/isa/generated/rv32ui-p-lb.mem Normal file
View File

File diff suppressed because it is too large Load Diff

100
tests/isa/generated/rv32ui-p-lb.verilog Normal file → Executable file
View File

@ -1,50 +1,50 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF 13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF
03 8F 00 00 93 0E F0 FF 93 01 20 00 63 1C DF 23 03 8F 00 00 93 0E F0 FF 93 01 20 00 63 1C DF 23
97 10 00 00 93 80 00 FE 03 8F 10 00 93 0E 00 00 97 10 00 00 93 80 00 FE 03 8F 10 00 93 0E 00 00
93 01 30 00 63 10 DF 23 97 10 00 00 93 80 80 FC 93 01 30 00 63 10 DF 23 97 10 00 00 93 80 80 FC
03 8F 20 00 93 0E 00 FF 93 01 40 00 63 14 DF 21 03 8F 20 00 93 0E 00 FF 93 01 40 00 63 14 DF 21
97 10 00 00 93 80 00 FB 03 8F 30 00 93 0E F0 00 97 10 00 00 93 80 00 FB 03 8F 30 00 93 0E F0 00
93 01 50 00 63 18 DF 1F 97 10 00 00 93 80 B0 F9 93 01 50 00 63 18 DF 1F 97 10 00 00 93 80 B0 F9
03 8F D0 FF 93 0E F0 FF 93 01 60 00 63 1C DF 1D 03 8F D0 FF 93 0E F0 FF 93 01 60 00 63 1C DF 1D
97 10 00 00 93 80 30 F8 03 8F E0 FF 93 0E 00 00 97 10 00 00 93 80 30 F8 03 8F E0 FF 93 0E 00 00
93 01 70 00 63 10 DF 1D 97 10 00 00 93 80 B0 F6 93 01 70 00 63 10 DF 1D 97 10 00 00 93 80 B0 F6
03 8F F0 FF 93 0E 00 FF 93 01 80 00 63 14 DF 1B 03 8F F0 FF 93 0E 00 FF 93 01 80 00 63 14 DF 1B
97 10 00 00 93 80 30 F5 03 8F 00 00 93 0E F0 00 97 10 00 00 93 80 30 F5 03 8F 00 00 93 0E F0 00
93 01 90 00 63 18 DF 19 97 10 00 00 93 80 80 F3 93 01 90 00 63 18 DF 19 97 10 00 00 93 80 80 F3
93 80 00 FE 83 82 00 02 93 0E F0 FF 93 01 A0 00 93 80 00 FE 83 82 00 02 93 0E F0 FF 93 01 A0 00
63 9A D2 17 97 10 00 00 93 80 C0 F1 93 80 A0 FF 63 9A D2 17 97 10 00 00 93 80 C0 F1 93 80 A0 FF
83 82 70 00 93 0E 00 00 93 01 B0 00 63 9C D2 15 83 82 70 00 93 0E 00 00 93 01 B0 00 63 9C D2 15
93 01 C0 00 13 02 00 00 97 10 00 00 93 80 90 EF 93 01 C0 00 13 02 00 00 97 10 00 00 93 80 90 EF
03 8F 10 00 13 03 0F 00 93 0E 00 FF 63 1C D3 13 03 8F 10 00 13 03 0F 00 93 0E 00 FF 63 1C D3 13
13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 D0 00 13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 D0 00
13 02 00 00 97 10 00 00 93 80 E0 EC 03 8F 10 00 13 02 00 00 97 10 00 00 93 80 E0 EC 03 8F 10 00
13 00 00 00 13 03 0F 00 93 0E F0 00 63 14 D3 11 13 00 00 00 13 03 0F 00 93 0E F0 00 63 14 D3 11
13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 E0 00 13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 E0 00
13 02 00 00 97 10 00 00 93 80 C0 E9 03 8F 10 00 13 02 00 00 97 10 00 00 93 80 C0 E9 03 8F 10 00
13 00 00 00 13 00 00 00 13 03 0F 00 93 0E 00 00 13 00 00 00 13 00 00 00 13 03 0F 00 93 0E 00 00
63 1A D3 0D 13 02 12 00 93 02 20 00 E3 1C 52 FC 63 1A D3 0D 13 02 12 00 93 02 20 00 E3 1C 52 FC
93 01 F0 00 13 02 00 00 97 10 00 00 93 80 90 E6 93 01 F0 00 13 02 00 00 97 10 00 00 93 80 90 E6
03 8F 10 00 93 0E 00 FF 63 16 DF 0B 13 02 12 00 03 8F 10 00 93 0E 00 FF 63 16 DF 0B 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 00 01 13 02 00 00
97 10 00 00 93 80 20 E4 13 00 00 00 03 8F 10 00 97 10 00 00 93 80 20 E4 13 00 00 00 03 8F 10 00
93 0E F0 00 63 10 DF 09 13 02 12 00 93 02 20 00 93 0E F0 00 63 10 DF 09 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 10 01 13 02 00 00 97 10 00 00 E3 10 52 FE 93 01 10 01 13 02 00 00 97 10 00 00
93 80 40 E1 13 00 00 00 13 00 00 00 03 8F 10 00 93 80 40 E1 13 00 00 00 13 00 00 00 03 8F 10 00
93 0E 00 00 63 18 DF 05 13 02 12 00 93 02 20 00 93 0E 00 00 63 18 DF 05 13 02 12 00 93 02 20 00
E3 1E 52 FC 97 12 00 00 93 82 C2 DE 03 81 02 00 E3 1E 52 FC 97 12 00 00 93 82 C2 DE 03 81 02 00
13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03 13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03
97 12 00 00 93 82 02 DD 03 81 02 00 13 00 00 00 97 12 00 00 93 82 02 DD 03 81 02 00 13 00 00 00
13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01 13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01
63 18 30 00 13 0D 10 00 93 0D 00 00 6F 00 00 00 63 18 30 00 93 0D 00 00 13 0D 10 00 6F 00 00 00
13 0D 10 00 93 0D 10 00 6F 00 00 00 00 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00001000 @00001000
FF 00 F0 0F 00 00 00 00 00 00 00 00 00 00 00 00 FF 00 F0 0F 00 00 00 00 00 00 00 00 00 00 00 00
@00001040 @00001040
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lbu Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lbu.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lbu.dump
View File

@ -192,15 +192,15 @@ Disassembly of section .text.init:
250: 00301863 bne zero,gp,260 <pass> 250: 00301863 bne zero,gp,260 <pass>
00000254 <fail>: 00000254 <fail>:
254: 00100d13 li s10,1 254: 00000d93 li s11,0
258: 00000d93 li s11,0 258: 00100d13 li s10,1
0000025c <loop_fail>: 0000025c <loop_fail>:
25c: 0000006f j 25c <loop_fail> 25c: 0000006f j 25c <loop_fail>
00000260 <pass>: 00000260 <pass>:
260: 00100d13 li s10,1 260: 00100d93 li s11,1
264: 00100d93 li s11,1 264: 00100d13 li s10,1
00000268 <loop_pass>: 00000268 <loop_pass>:
268: 0000006f j 268 <loop_pass> 268: 0000006f j 268 <loop_pass>
@ -228,3 +228,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

1058
tests/isa/generated/rv32ui-p-lbu.mem Normal file
View File

File diff suppressed because it is too large Load Diff

100
tests/isa/generated/rv32ui-p-lbu.verilog Normal file → Executable file
View File

@ -1,50 +1,50 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF 13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF
03 CF 00 00 93 0E F0 0F 93 01 20 00 63 1C DF 23 03 CF 00 00 93 0E F0 0F 93 01 20 00 63 1C DF 23
97 10 00 00 93 80 00 FE 03 CF 10 00 93 0E 00 00 97 10 00 00 93 80 00 FE 03 CF 10 00 93 0E 00 00
93 01 30 00 63 10 DF 23 97 10 00 00 93 80 80 FC 93 01 30 00 63 10 DF 23 97 10 00 00 93 80 80 FC
03 CF 20 00 93 0E 00 0F 93 01 40 00 63 14 DF 21 03 CF 20 00 93 0E 00 0F 93 01 40 00 63 14 DF 21
97 10 00 00 93 80 00 FB 03 CF 30 00 93 0E F0 00 97 10 00 00 93 80 00 FB 03 CF 30 00 93 0E F0 00
93 01 50 00 63 18 DF 1F 97 10 00 00 93 80 B0 F9 93 01 50 00 63 18 DF 1F 97 10 00 00 93 80 B0 F9
03 CF D0 FF 93 0E F0 0F 93 01 60 00 63 1C DF 1D 03 CF D0 FF 93 0E F0 0F 93 01 60 00 63 1C DF 1D
97 10 00 00 93 80 30 F8 03 CF E0 FF 93 0E 00 00 97 10 00 00 93 80 30 F8 03 CF E0 FF 93 0E 00 00
93 01 70 00 63 10 DF 1D 97 10 00 00 93 80 B0 F6 93 01 70 00 63 10 DF 1D 97 10 00 00 93 80 B0 F6
03 CF F0 FF 93 0E 00 0F 93 01 80 00 63 14 DF 1B 03 CF F0 FF 93 0E 00 0F 93 01 80 00 63 14 DF 1B
97 10 00 00 93 80 30 F5 03 CF 00 00 93 0E F0 00 97 10 00 00 93 80 30 F5 03 CF 00 00 93 0E F0 00
93 01 90 00 63 18 DF 19 97 10 00 00 93 80 80 F3 93 01 90 00 63 18 DF 19 97 10 00 00 93 80 80 F3
93 80 00 FE 83 C2 00 02 93 0E F0 0F 93 01 A0 00 93 80 00 FE 83 C2 00 02 93 0E F0 0F 93 01 A0 00
63 9A D2 17 97 10 00 00 93 80 C0 F1 93 80 A0 FF 63 9A D2 17 97 10 00 00 93 80 C0 F1 93 80 A0 FF
83 C2 70 00 93 0E 00 00 93 01 B0 00 63 9C D2 15 83 C2 70 00 93 0E 00 00 93 01 B0 00 63 9C D2 15
93 01 C0 00 13 02 00 00 97 10 00 00 93 80 90 EF 93 01 C0 00 13 02 00 00 97 10 00 00 93 80 90 EF
03 CF 10 00 13 03 0F 00 93 0E 00 0F 63 1C D3 13 03 CF 10 00 13 03 0F 00 93 0E 00 0F 63 1C D3 13
13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 D0 00 13 02 12 00 93 02 20 00 E3 10 52 FE 93 01 D0 00
13 02 00 00 97 10 00 00 93 80 E0 EC 03 CF 10 00 13 02 00 00 97 10 00 00 93 80 E0 EC 03 CF 10 00
13 00 00 00 13 03 0F 00 93 0E F0 00 63 14 D3 11 13 00 00 00 13 03 0F 00 93 0E F0 00 63 14 D3 11
13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 E0 00 13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 E0 00
13 02 00 00 97 10 00 00 93 80 C0 E9 03 CF 10 00 13 02 00 00 97 10 00 00 93 80 C0 E9 03 CF 10 00
13 00 00 00 13 00 00 00 13 03 0F 00 93 0E 00 00 13 00 00 00 13 00 00 00 13 03 0F 00 93 0E 00 00
63 1A D3 0D 13 02 12 00 93 02 20 00 E3 1C 52 FC 63 1A D3 0D 13 02 12 00 93 02 20 00 E3 1C 52 FC
93 01 F0 00 13 02 00 00 97 10 00 00 93 80 90 E6 93 01 F0 00 13 02 00 00 97 10 00 00 93 80 90 E6
03 CF 10 00 93 0E 00 0F 63 16 DF 0B 13 02 12 00 03 CF 10 00 93 0E 00 0F 63 16 DF 0B 13 02 12 00
93 02 20 00 E3 12 52 FE 93 01 00 01 13 02 00 00 93 02 20 00 E3 12 52 FE 93 01 00 01 13 02 00 00
97 10 00 00 93 80 20 E4 13 00 00 00 03 CF 10 00 97 10 00 00 93 80 20 E4 13 00 00 00 03 CF 10 00
93 0E F0 00 63 10 DF 09 13 02 12 00 93 02 20 00 93 0E F0 00 63 10 DF 09 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 10 01 13 02 00 00 97 10 00 00 E3 10 52 FE 93 01 10 01 13 02 00 00 97 10 00 00
93 80 40 E1 13 00 00 00 13 00 00 00 03 CF 10 00 93 80 40 E1 13 00 00 00 13 00 00 00 03 CF 10 00
93 0E 00 00 63 18 DF 05 13 02 12 00 93 02 20 00 93 0E 00 00 63 18 DF 05 13 02 12 00 93 02 20 00
E3 1E 52 FC 97 12 00 00 93 82 C2 DE 03 C1 02 00 E3 1E 52 FC 97 12 00 00 93 82 C2 DE 03 C1 02 00
13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03 13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03
97 12 00 00 93 82 02 DD 03 C1 02 00 13 00 00 00 97 12 00 00 93 82 02 DD 03 C1 02 00 13 00 00 00
13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01 13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01
63 18 30 00 13 0D 10 00 93 0D 00 00 6F 00 00 00 63 18 30 00 93 0D 00 00 13 0D 10 00 6F 00 00 00
13 0D 10 00 93 0D 10 00 6F 00 00 00 00 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00001000 @00001000
FF 00 F0 0F 00 00 00 00 00 00 00 00 00 00 00 00 FF 00 F0 0F 00 00 00 00 00 00 00 00 00 00 00 00
@00001040 @00001040
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lh Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lh.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lh.dump
View File

@ -200,15 +200,15 @@ Disassembly of section .text.init:
270: 00301863 bne zero,gp,280 <pass> 270: 00301863 bne zero,gp,280 <pass>
00000274 <fail>: 00000274 <fail>:
274: 00100d13 li s10,1 274: 00000d93 li s11,0
278: 00000d93 li s11,0 278: 00100d13 li s10,1
0000027c <loop_fail>: 0000027c <loop_fail>:
27c: 0000006f j 27c <loop_fail> 27c: 0000006f j 27c <loop_fail>
00000280 <pass>: 00000280 <pass>:
280: 00100d13 li s10,1 280: 00100d93 li s11,1
284: 00100d93 li s11,1 284: 00100d13 li s10,1
00000288 <loop_pass>: 00000288 <loop_pass>:
288: 0000006f j 288 <loop_pass> 288: 0000006f j 288 <loop_pass>
@ -238,3 +238,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

1058
tests/isa/generated/rv32ui-p-lh.mem Normal file
View File

File diff suppressed because it is too large Load Diff

108
tests/isa/generated/rv32ui-p-lh.verilog Normal file → Executable file
View File

@ -1,54 +1,54 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF 13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF
03 9F 00 00 93 0E F0 0F 93 01 20 00 63 1C DF 25 03 9F 00 00 93 0E F0 0F 93 01 20 00 63 1C DF 25
97 10 00 00 93 80 00 FE 03 9F 20 00 93 0E 00 F0 97 10 00 00 93 80 00 FE 03 9F 20 00 93 0E 00 F0
93 01 30 00 63 10 DF 25 97 10 00 00 93 80 80 FC 93 01 30 00 63 10 DF 25 97 10 00 00 93 80 80 FC
03 9F 40 00 B7 1E 00 00 93 8E 0E FF 93 01 40 00 03 9F 40 00 B7 1E 00 00 93 8E 0E FF 93 01 40 00
63 12 DF 23 97 10 00 00 93 80 C0 FA 03 9F 60 00 63 12 DF 23 97 10 00 00 93 80 C0 FA 03 9F 60 00
B7 FE FF FF 93 8E FE 00 93 01 50 00 63 14 DF 21 B7 FE FF FF 93 8E FE 00 93 01 50 00 63 14 DF 21
97 10 00 00 93 80 60 F9 03 9F A0 FF 93 0E F0 0F 97 10 00 00 93 80 60 F9 03 9F A0 FF 93 0E F0 0F
93 01 60 00 63 18 DF 1F 97 10 00 00 93 80 E0 F7 93 01 60 00 63 18 DF 1F 97 10 00 00 93 80 E0 F7
03 9F C0 FF 93 0E 00 F0 93 01 70 00 63 1C DF 1D 03 9F C0 FF 93 0E 00 F0 93 01 70 00 63 1C DF 1D
97 10 00 00 93 80 60 F6 03 9F E0 FF B7 1E 00 00 97 10 00 00 93 80 60 F6 03 9F E0 FF B7 1E 00 00
93 8E 0E FF 93 01 80 00 63 1E DF 1B 97 10 00 00 93 8E 0E FF 93 01 80 00 63 1E DF 1B 97 10 00 00
93 80 A0 F4 03 9F 00 00 B7 FE FF FF 93 8E FE 00 93 80 A0 F4 03 9F 00 00 B7 FE FF FF 93 8E FE 00
93 01 90 00 63 10 DF 1B 97 10 00 00 93 80 80 F2 93 01 90 00 63 10 DF 1B 97 10 00 00 93 80 80 F2
93 80 00 FE 83 92 00 02 93 0E F0 0F 93 01 A0 00 93 80 00 FE 83 92 00 02 93 0E F0 0F 93 01 A0 00
63 92 D2 19 97 10 00 00 93 80 C0 F0 93 80 B0 FF 63 92 D2 19 97 10 00 00 93 80 C0 F0 93 80 B0 FF
83 92 70 00 93 0E 00 F0 93 01 B0 00 63 94 D2 17 83 92 70 00 93 0E 00 F0 93 01 B0 00 63 94 D2 17
93 01 C0 00 13 02 00 00 97 10 00 00 93 80 A0 EE 93 01 C0 00 13 02 00 00 97 10 00 00 93 80 A0 EE
03 9F 20 00 13 03 0F 00 B7 1E 00 00 93 8E 0E FF 03 9F 20 00 13 03 0F 00 B7 1E 00 00 93 8E 0E FF
63 12 D3 15 13 02 12 00 93 02 20 00 E3 1E 52 FC 63 12 D3 15 13 02 12 00 93 02 20 00 E3 1E 52 FC
93 01 D0 00 13 02 00 00 97 10 00 00 93 80 C0 EB 93 01 D0 00 13 02 00 00 97 10 00 00 93 80 C0 EB
03 9F 20 00 13 00 00 00 13 03 0F 00 B7 FE FF FF 03 9F 20 00 13 00 00 00 13 03 0F 00 B7 FE FF FF
93 8E FE 00 63 18 D3 11 13 02 12 00 93 02 20 00 93 8E FE 00 63 18 D3 11 13 02 12 00 93 02 20 00
E3 1C 52 FC 93 01 E0 00 13 02 00 00 97 10 00 00 E3 1C 52 FC 93 01 E0 00 13 02 00 00 97 10 00 00
93 80 40 E8 03 9F 20 00 13 00 00 00 13 00 00 00 93 80 40 E8 03 9F 20 00 13 00 00 00 13 00 00 00
13 03 0F 00 93 0E 00 F0 63 1E D3 0D 13 02 12 00 13 03 0F 00 93 0E 00 F0 63 1E D3 0D 13 02 12 00
93 02 20 00 E3 1C 52 FC 93 01 F0 00 13 02 00 00 93 02 20 00 E3 1C 52 FC 93 01 F0 00 13 02 00 00
97 10 00 00 93 80 20 E5 03 9F 20 00 B7 1E 00 00 97 10 00 00 93 80 20 E5 03 9F 20 00 B7 1E 00 00
93 8E 0E FF 63 18 DF 0B 13 02 12 00 93 02 20 00 93 8E 0E FF 63 18 DF 0B 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 00 01 13 02 00 00 97 10 00 00 E3 10 52 FE 93 01 00 01 13 02 00 00 97 10 00 00
93 80 80 E2 13 00 00 00 03 9F 20 00 B7 FE FF FF 93 80 80 E2 13 00 00 00 03 9F 20 00 B7 FE FF FF
93 8E FE 00 63 10 DF 09 13 02 12 00 93 02 20 00 93 8E FE 00 63 10 DF 09 13 02 12 00 93 02 20 00
E3 1E 52 FC 93 01 10 01 13 02 00 00 97 10 00 00 E3 1E 52 FC 93 01 10 01 13 02 00 00 97 10 00 00
93 80 40 DF 13 00 00 00 13 00 00 00 03 9F 20 00 93 80 40 DF 13 00 00 00 13 00 00 00 03 9F 20 00
93 0E 00 F0 63 18 DF 05 13 02 12 00 93 02 20 00 93 0E 00 F0 63 18 DF 05 13 02 12 00 93 02 20 00
E3 1E 52 FC 97 12 00 00 93 82 C2 DC 03 91 02 00 E3 1E 52 FC 97 12 00 00 93 82 C2 DC 03 91 02 00
13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03 13 01 20 00 93 0E 20 00 93 01 20 01 63 14 D1 03
97 12 00 00 93 82 02 DB 03 91 02 00 13 00 00 00 97 12 00 00 93 82 02 DB 03 91 02 00 13 00 00 00
13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01 13 01 20 00 93 0E 20 00 93 01 30 01 63 14 D1 01
63 18 30 00 13 0D 10 00 93 0D 00 00 6F 00 00 00 63 18 30 00 93 0D 00 00 13 0D 10 00 6F 00 00 00
13 0D 10 00 93 0D 10 00 6F 00 00 00 00 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00001000 @00001000
FF 00 00 FF F0 0F 0F F0 00 00 00 00 00 00 00 00 FF 00 00 FF F0 0F 0F F0 00 00 00 00 00 00 00 00
@00001040 @00001040
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lhu Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lhu.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lhu.dump
View File

@ -205,15 +205,15 @@ Disassembly of section .text.init:
284: 00301863 bne zero,gp,294 <pass> 284: 00301863 bne zero,gp,294 <pass>
00000288 <fail>: 00000288 <fail>:
288: 00100d13 li s10,1 288: 00000d93 li s11,0
28c: 00000d93 li s11,0 28c: 00100d13 li s10,1
00000290 <loop_fail>: 00000290 <loop_fail>:
290: 0000006f j 290 <loop_fail> 290: 0000006f j 290 <loop_fail>
00000294 <pass>: 00000294 <pass>:
294: 00100d13 li s10,1 294: 00100d93 li s11,1
298: 00100d93 li s11,1 298: 00100d13 li s10,1
0000029c <loop_pass>: 0000029c <loop_pass>:
29c: 0000006f j 29c <loop_pass> 29c: 0000006f j 29c <loop_pass>
@ -243,3 +243,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

1058
tests/isa/generated/rv32ui-p-lhu.mem Normal file
View File

File diff suppressed because it is too large Load Diff

108
tests/isa/generated/rv32ui-p-lhu.verilog Normal file → Executable file
View File

@ -1,54 +1,54 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF 13 0D 00 00 93 0D 00 00 97 10 00 00 93 80 80 FF
03 DF 00 00 93 0E F0 0F 93 01 20 00 63 16 DF 27 03 DF 00 00 93 0E F0 0F 93 01 20 00 63 16 DF 27
97 10 00 00 93 80 00 FE 03 DF 20 00 B7 0E 01 00 97 10 00 00 93 80 00 FE 03 DF 20 00 B7 0E 01 00
93 8E 0E F0 93 01 30 00 63 18 DF 25 97 10 00 00 93 8E 0E F0 93 01 30 00 63 18 DF 25 97 10 00 00
93 80 40 FC 03 DF 40 00 B7 1E 00 00 93 8E 0E FF 93 80 40 FC 03 DF 40 00 B7 1E 00 00 93 8E 0E FF
93 01 40 00 63 1A DF 23 97 10 00 00 93 80 80 FA 93 01 40 00 63 1A DF 23 97 10 00 00 93 80 80 FA
03 DF 60 00 B7 FE 00 00 93 8E FE 00 93 01 50 00 03 DF 60 00 B7 FE 00 00 93 8E FE 00 93 01 50 00
63 1C DF 21 97 10 00 00 93 80 20 F9 03 DF A0 FF 63 1C DF 21 97 10 00 00 93 80 20 F9 03 DF A0 FF
93 0E F0 0F 93 01 60 00 63 10 DF 21 97 10 00 00 93 0E F0 0F 93 01 60 00 63 10 DF 21 97 10 00 00
93 80 A0 F7 03 DF C0 FF B7 0E 01 00 93 8E 0E F0 93 80 A0 F7 03 DF C0 FF B7 0E 01 00 93 8E 0E F0
93 01 70 00 63 12 DF 1F 97 10 00 00 93 80 E0 F5 93 01 70 00 63 12 DF 1F 97 10 00 00 93 80 E0 F5
03 DF E0 FF B7 1E 00 00 93 8E 0E FF 93 01 80 00 03 DF E0 FF B7 1E 00 00 93 8E 0E FF 93 01 80 00
63 14 DF 1D 97 10 00 00 93 80 20 F4 03 DF 00 00 63 14 DF 1D 97 10 00 00 93 80 20 F4 03 DF 00 00
B7 FE 00 00 93 8E FE 00 93 01 90 00 63 16 DF 1B B7 FE 00 00 93 8E FE 00 93 01 90 00 63 16 DF 1B
97 10 00 00 93 80 00 F2 93 80 00 FE 83 D2 00 02 97 10 00 00 93 80 00 F2 93 80 00 FE 83 D2 00 02
93 0E F0 0F 93 01 A0 00 63 98 D2 19 97 10 00 00 93 0E F0 0F 93 01 A0 00 63 98 D2 19 97 10 00 00
93 80 40 F0 93 80 B0 FF 83 D2 70 00 B7 0E 01 00 93 80 40 F0 93 80 B0 FF 83 D2 70 00 B7 0E 01 00
93 8E 0E F0 93 01 B0 00 63 98 D2 17 93 01 C0 00 93 8E 0E F0 93 01 B0 00 63 98 D2 17 93 01 C0 00
13 02 00 00 97 10 00 00 93 80 E0 ED 03 DF 20 00 13 02 00 00 97 10 00 00 93 80 E0 ED 03 DF 20 00
13 03 0F 00 B7 1E 00 00 93 8E 0E FF 63 16 D3 15 13 03 0F 00 B7 1E 00 00 93 8E 0E FF 63 16 D3 15
13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 D0 00 13 02 12 00 93 02 20 00 E3 1E 52 FC 93 01 D0 00
13 02 00 00 97 10 00 00 93 80 00 EB 03 DF 20 00 13 02 00 00 97 10 00 00 93 80 00 EB 03 DF 20 00
13 00 00 00 13 03 0F 00 B7 FE 00 00 93 8E FE 00 13 00 00 00 13 03 0F 00 B7 FE 00 00 93 8E FE 00
63 1C D3 11 13 02 12 00 93 02 20 00 E3 1C 52 FC 63 1C D3 11 13 02 12 00 93 02 20 00 E3 1C 52 FC
93 01 E0 00 13 02 00 00 97 10 00 00 93 80 80 E7 93 01 E0 00 13 02 00 00 97 10 00 00 93 80 80 E7
03 DF 20 00 13 00 00 00 13 00 00 00 13 03 0F 00 03 DF 20 00 13 00 00 00 13 00 00 00 13 03 0F 00
B7 0E 01 00 93 8E 0E F0 63 10 D3 0F 13 02 12 00 B7 0E 01 00 93 8E 0E F0 63 10 D3 0F 13 02 12 00
93 02 20 00 E3 1A 52 FC 93 01 F0 00 13 02 00 00 93 02 20 00 E3 1A 52 FC 93 01 F0 00 13 02 00 00
97 10 00 00 93 80 20 E4 03 DF 20 00 B7 1E 00 00 97 10 00 00 93 80 20 E4 03 DF 20 00 B7 1E 00 00
93 8E 0E FF 63 1A DF 0B 13 02 12 00 93 02 20 00 93 8E 0E FF 63 1A DF 0B 13 02 12 00 93 02 20 00
E3 10 52 FE 93 01 00 01 13 02 00 00 97 10 00 00 E3 10 52 FE 93 01 00 01 13 02 00 00 97 10 00 00
93 80 80 E1 13 00 00 00 03 DF 20 00 B7 FE 00 00 93 80 80 E1 13 00 00 00 03 DF 20 00 B7 FE 00 00
93 8E FE 00 63 12 DF 09 13 02 12 00 93 02 20 00 93 8E FE 00 63 12 DF 09 13 02 12 00 93 02 20 00
E3 1E 52 FC 93 01 10 01 13 02 00 00 97 10 00 00 E3 1E 52 FC 93 01 10 01 13 02 00 00 97 10 00 00
93 80 40 DE 13 00 00 00 13 00 00 00 03 DF 20 00 93 80 40 DE 13 00 00 00 13 00 00 00 03 DF 20 00
B7 0E 01 00 93 8E 0E F0 63 18 DF 05 13 02 12 00 B7 0E 01 00 93 8E 0E F0 63 18 DF 05 13 02 12 00
93 02 20 00 E3 1C 52 FC 97 12 00 00 93 82 82 DB 93 02 20 00 E3 1C 52 FC 97 12 00 00 93 82 82 DB
03 D1 02 00 13 01 20 00 93 0E 20 00 93 01 20 01 03 D1 02 00 13 01 20 00 93 0E 20 00 93 01 20 01
63 14 D1 03 97 12 00 00 93 82 C2 D9 03 D1 02 00 63 14 D1 03 97 12 00 00 93 82 C2 D9 03 D1 02 00
13 00 00 00 13 01 20 00 93 0E 20 00 93 01 30 01 13 00 00 00 13 01 20 00 93 0E 20 00 93 01 30 01
63 14 D1 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 14 D1 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
@00001000 @00001000
FF 00 00 FF F0 0F 0F F0 00 00 00 00 00 00 00 00 FF 00 00 FF F0 0F 0F F0 00 00 00 00 00 00 00 00
@00001040 @00001040
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lui Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lui.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lui.dump
View File

@ -43,15 +43,15 @@ Disassembly of section .text.init:
64: 00301863 bne zero,gp,74 <pass> 64: 00301863 bne zero,gp,74 <pass>
00000068 <fail>: 00000068 <fail>:
68: 00100d13 li s10,1 68: 00000d93 li s11,0
6c: 00000d93 li s11,0 6c: 00100d13 li s10,1
00000070 <loop_fail>: 00000070 <loop_fail>:
70: 0000006f j 70 <loop_fail> 70: 0000006f j 70 <loop_fail>
00000074 <pass>: 00000074 <pass>:
74: 00100d13 li s10,1 74: 00100d93 li s11,1
78: 00100d93 li s11,1 78: 00100d13 li s10,1
0000007c <loop_pass>: 0000007c <loop_pass>:
7c: 0000006f j 7c <loop_pass> 7c: 0000006f j 7c <loop_pass>
@ -65,3 +65,18 @@ Disassembly of section .tohost:
00000100 <fromhost>: 00000100 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

66
tests/isa/generated/rv32ui-p-lui.mem Normal file
View File

@ -0,0 +1,66 @@
00000d13
00000d93
000000b7
00000e93
00200193
05d09a63
fffff0b7
4010d093
80000e93
00300193
05d09063
7ffff0b7
4140d093
7ff00e93
00400193
03d09663
800000b7
4140d093
80000e93
00500193
01d09c63
80000037
00000e93
00600193
01d01463
00301863
00000d93
00100d13
0000006f
00100d93
00100d13
0000006f
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000

32
tests/isa/generated/rv32ui-p-lui.verilog Normal file → Executable file
View File

@ -1,16 +1,16 @@
@00000000 @00000000
13 0D 00 00 93 0D 00 00 B7 00 00 00 93 0E 00 00 13 0D 00 00 93 0D 00 00 B7 00 00 00 93 0E 00 00
93 01 20 00 63 9A D0 05 B7 F0 FF FF 93 D0 10 40 93 01 20 00 63 9A D0 05 B7 F0 FF FF 93 D0 10 40
93 0E 00 80 93 01 30 00 63 90 D0 05 B7 F0 FF 7F 93 0E 00 80 93 01 30 00 63 90 D0 05 B7 F0 FF 7F
93 D0 40 41 93 0E F0 7F 93 01 40 00 63 96 D0 03 93 D0 40 41 93 0E F0 7F 93 01 40 00 63 96 D0 03
B7 00 00 80 93 D0 40 41 93 0E 00 80 93 01 50 00 B7 00 00 80 93 D0 40 41 93 0E 00 80 93 01 50 00
63 9C D0 01 37 00 00 80 93 0E 00 00 93 01 60 00 63 9C D0 01 37 00 00 80 93 0E 00 00 93 01 60 00
63 14 D0 01 63 18 30 00 13 0D 10 00 93 0D 00 00 63 14 D0 01 63 18 30 00 93 0D 00 00 13 0D 10 00
6F 00 00 00 13 0D 10 00 93 0D 10 00 6F 00 00 00 6F 00 00 00 93 0D 10 00 13 0D 10 00 6F 00 00 00
00 00 00 00 00 00 00 00
@000000C0 @000000C0
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

BIN
tests/isa/generated/rv32ui-p-lw Normal file → Executable file
View File

Binary file not shown.

BIN
tests/isa/generated/rv32ui-p-lw.bin Normal file → Executable file
View File

Binary file not shown.

23
tests/isa/generated/rv32ui-p-lw.dump
View File

@ -208,15 +208,15 @@ Disassembly of section .text.init:
290: 00301863 bne zero,gp,2a0 <pass> 290: 00301863 bne zero,gp,2a0 <pass>
00000294 <fail>: 00000294 <fail>:
294: 00100d13 li s10,1 294: 00000d93 li s11,0
298: 00000d93 li s11,0 298: 00100d13 li s10,1
0000029c <loop_fail>: 0000029c <loop_fail>:
29c: 0000006f j 29c <loop_fail> 29c: 0000006f j 29c <loop_fail>
000002a0 <pass>: 000002a0 <pass>:
2a0: 00100d13 li s10,1 2a0: 00100d93 li s11,1
2a4: 00100d93 li s11,1 2a4: 00100d13 li s10,1
000002a8 <loop_pass>: 000002a8 <loop_pass>:
2a8: 0000006f j 2a8 <loop_pass> 2a8: 0000006f j 2a8 <loop_pass>
@ -246,3 +246,18 @@ Disassembly of section .tohost:
00001080 <fromhost>: 00001080 <fromhost>:
... ...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1941 addi s2,s2,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <test_2+0xc>
c: 0000000f fence unknown,unknown
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8

Some files were not shown because too many files have changed in this diff Show More