add clint hold input signal
Signed-off-by: liangkangnan <liangkangnan@163.com>pull/1/head
parent
db8a65ebf4
commit
43aca8195c
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@ -33,6 +33,9 @@ module ctrl(
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// from jtag
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input wire jtag_halt_flag_i,
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// from clint
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input wire hold_flag_clint_i,
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output reg[`Hold_Flag_Bus] hold_flag_o,
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// to pc_reg
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@ -53,7 +56,7 @@ module ctrl(
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// 默认不暂停
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hold_flag_o <= `Hold_None;
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// 按优先级处理不同模块的请求
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if (jump_flag_i == `JumpEnable || hold_flag_ex_i == `HoldEnable) begin
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if (jump_flag_i == `JumpEnable || hold_flag_ex_i == `HoldEnable || hold_flag_clint_i == `HoldEnable) begin
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// 暂停整条流水线
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hold_flag_o <= `Hold_Id;
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end else if (hold_flag_rib_i == `HoldEnable) begin
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