From 22e6866deac71bf78b97969a1f82d418cc34f94f Mon Sep 17 00:00:00 2001 From: liangkangnan Date: Thu, 23 Sep 2021 09:45:48 +0800 Subject: [PATCH] sdk:examples:spi_master: add quad fast read Signed-off-by: liangkangnan --- sdk/examples/spi_master/flash_n25q.c | 12 ++++++++---- sdk/examples/spi_master/flash_n25q.h | 4 ++-- sdk/examples/spi_master/main.c | 15 +++++---------- 3 files changed, 15 insertions(+), 16 deletions(-) diff --git a/sdk/examples/spi_master/flash_n25q.c b/sdk/examples/spi_master/flash_n25q.c index 997e743..68a95ca 100644 --- a/sdk/examples/spi_master/flash_n25q.c +++ b/sdk/examples/spi_master/flash_n25q.c @@ -28,7 +28,7 @@ void flash_n25q_init(uint16_t clk_div) } // 写使能 -// 擦除或者编程操作之前必须先发送写使能命令 +// 擦除或者编程或者写寄存器之前必须先发送写使能命令 void flash_n25q_write_enable(uint8_t en) { uint8_t cmd; @@ -215,18 +215,22 @@ void flash_n25q_set_dummy_clock_cycles(uint8_t num) { uint8_t data; + flash_n25q_write_enable(1); + data = flash_n25q_read_reg(CMD_READ_VOL_CONF_REG); data &= ~(0xf << 4); data |= num << 4; flash_n25q_write_reg(CMD_WRITE_VOL_CONF_REG, data); + + flash_n25q_write_enable(0); } -void flash_n25q_quad_fast_read(uint32_t addr, uint8_t data[], uint32_t len) +void flash_n25q_quad_output_fast_read(uint32_t addr, uint8_t data[], uint32_t len) { uint8_t tran_addr[3]; uint8_t cmd, i; - cmd = CMD_4_4_4_FAST_READ; + cmd = CMD_QUAD_OUTPUT_FAST_READ; tran_addr[0] = (addr >> 16) & 0xff; tran_addr[1] = (addr >> 8) & 0xff; @@ -235,7 +239,7 @@ void flash_n25q_quad_fast_read(uint32_t addr, uint8_t data[], uint32_t len) spi0_set_ss_level(0); spi0_master_write_bytes(&cmd, 1); spi0_master_write_bytes(tran_addr, 3); - for (i = 0; i < DUMMY_CNT_4_4_4; i++) + for (i = 0; i < (DUMMY_CNT >> 1); i++) spi0_master_read_bytes(data, 1); spi0_reset_rxfifo(); spi0_master_read_bytes(data, len); diff --git a/sdk/examples/spi_master/flash_n25q.h b/sdk/examples/spi_master/flash_n25q.h index 90b3715..c12040f 100644 --- a/sdk/examples/spi_master/flash_n25q.h +++ b/sdk/examples/spi_master/flash_n25q.h @@ -33,7 +33,7 @@ #define CMD_READ_NONVOL_CONF_REG (0xB5) -#define DUMMY_CNT_4_4_4 (0x7) +#define DUMMY_CNT (0xa) typedef struct { @@ -58,7 +58,7 @@ uint8_t flash_n25q_read_enhanced_volatile_conf_reg(); void flash_n25q_write_enhanced_volatile_conf_reg(uint8_t data); void flash_n25q_enable_quad_mode(uint8_t en); void flash_n25q_set_dummy_clock_cycles(uint8_t num); -void flash_n25q_quad_fast_read(uint32_t addr, uint8_t data[], uint32_t len); +void flash_n25q_quad_output_fast_read(uint32_t addr, uint8_t data[], uint32_t len); uint8_t flash_n25q_read_nonvolatile_conf_reg(); #endif diff --git a/sdk/examples/spi_master/main.c b/sdk/examples/spi_master/main.c index b8c9902..6374cde 100644 --- a/sdk/examples/spi_master/main.c +++ b/sdk/examples/spi_master/main.c @@ -61,6 +61,8 @@ int main() for (i = 0; i < BUFFER_SIZE; i++) xprintf("0x%x\n", read_data[i]); + + flash_n25q_set_dummy_clock_cycles(DUMMY_CNT); // 使能N25Q QSPI模式 flash_n25q_enable_quad_mode(1); // 使能SPI控制器QSPI模式 @@ -70,19 +72,12 @@ int main() xprintf("manf id = 0x%2x\n", id.manf_id); xprintf("mem type = 0x%2x\n", id.mem_type); xprintf("mem cap = 0x%2x\n", id.mem_cap); - // 失能N25Q QSPI模式 - flash_n25q_enable_quad_mode(0); - -/* - flash_n25q_set_dummy_clock_cycles(DUMMY_CNT_4_4_4 << 1); - flash_n25q_enable_quad_mode(1); - spi0_set_spi_mode(SPI_MODE_QUAD); - flash_n25q_quad_fast_read(N25Q_PAGE_TO_ADDR(1), read_data, BUFFER_SIZE); + flash_n25q_quad_output_fast_read(N25Q_PAGE_TO_ADDR(1), read_data, BUFFER_SIZE); xprintf("fast read data: \n"); for (i = 0; i < BUFFER_SIZE; i++) xprintf("0x%x\n", read_data[i]); - + // 失能N25Q QSPI模式 flash_n25q_enable_quad_mode(0); -*/ + while (1); }