2021-07-10 06:49:36 +00:00
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// See LICENSE for license details.
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#ifndef __RISCV_TEST_H
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#define __RISCV_TEST_H
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#ifndef __riscv_xlen
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#define __riscv_xlen 32
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#endif
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//-----------------------------------------------------------------------
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// Begin Macro
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//-----------------------------------------------------------------------
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#define RVTEST_RV64U \
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.macro init; \
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.endm
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#define RVTEST_RV64UF \
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.macro init; \
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RVTEST_FP_ENABLE; \
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.endm
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#define RVTEST_RV32U \
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.macro init; \
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.endm
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#define RVTEST_RV32UF \
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.macro init; \
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RVTEST_FP_ENABLE; \
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.endm
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#define RVTEST_RV64M \
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.macro init; \
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RVTEST_ENABLE_MACHINE; \
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.endm
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#define RVTEST_RV64S \
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.macro init; \
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RVTEST_ENABLE_SUPERVISOR; \
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.endm
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#define RVTEST_RV32M \
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.macro init; \
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RVTEST_ENABLE_MACHINE; \
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.endm
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#define RVTEST_RV32S \
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.macro init; \
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RVTEST_ENABLE_SUPERVISOR; \
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.endm
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#if __riscv_xlen == 64
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# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1:
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#else
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# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1:
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#endif
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#define INIT_PMP \
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la t0, 1f; \
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csrw mtvec, t0; \
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li t0, -1; /* Set up a PMP to permit all accesses */ \
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csrw pmpaddr0, t0; \
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li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \
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csrw pmpcfg0, t0; \
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.align 2; \
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1:
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#define INIT_SPTBR \
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la t0, 1f; \
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csrw mtvec, t0; \
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csrwi sptbr, 0; \
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.align 2; \
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1:
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#define DELEGATE_NO_TRAPS \
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la t0, 1f; \
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csrw mtvec, t0; \
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csrwi medeleg, 0; \
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csrwi mideleg, 0; \
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csrwi mie, 0; \
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.align 2; \
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1:
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#define RVTEST_ENABLE_SUPERVISOR \
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li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \
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csrs mstatus, a0; \
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li a0, SIP_SSIP | SIP_STIP; \
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csrs mideleg, a0; \
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#define RVTEST_ENABLE_MACHINE \
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li a0, MSTATUS_MPP; \
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csrs mstatus, a0; \
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#define RVTEST_FP_ENABLE \
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li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \
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csrs mstatus, a0; \
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csrwi fcsr, 0
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#define RISCV_MULTICORE_DISABLE \
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csrr a0, mhartid; \
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1: bnez a0, 1b
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#define EXTRA_TVEC_USER
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#define EXTRA_TVEC_MACHINE
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#define EXTRA_INIT
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#define EXTRA_INIT_TIMER
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#define INTERRUPT_HANDLER j other_exception /* No interrupts should occur */
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#define RVTEST_CODE_BEGIN \
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.section .text.init; \
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.align 6; \
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.globl _start; \
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_start: \
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csrrwi x0, sstatus, 0x0;
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//-----------------------------------------------------------------------
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// End Macro
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//-----------------------------------------------------------------------
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#define RVTEST_CODE_END
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//-----------------------------------------------------------------------
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// Pass/Fail Macro
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//-----------------------------------------------------------------------
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#define RVTEST_PASS \
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csrrwi x0, sstatus, 0x3; \
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loop_pass: \
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j loop_pass
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#define TESTNUM gp
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#define RVTEST_FAIL \
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csrrwi x0, sstatus, 0x1; \
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loop_fail: \
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j loop_fail
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//-----------------------------------------------------------------------
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// Data Section Macro
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//-----------------------------------------------------------------------
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#define EXTRA_DATA
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#define RVTEST_DATA_BEGIN \
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EXTRA_DATA \
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.pushsection .tohost,"aw",@progbits; \
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.align 6; .global tohost; tohost: .dword 0; \
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.align 6; .global fromhost; fromhost: .dword 0; \
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.popsection; \
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.align 4; .global begin_signature; begin_signature:
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#define RVTEST_DATA_END .align 4; .global end_signature; end_signature:
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#endif
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