tinyriscv/tests/riscv-compliance/build_generated/rv32Zicsr/I-CSRRW-01.elf.objdump

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/home/ubuntu/tinyriscv/tests/riscv-compliance/build_generated/rv32Zicsr/I-CSRRW-01.elf: file format elf32-littleriscv
Disassembly of section .text.init:
00000000 <_start>:
0: 0480006f j 48 <reset_vector>
00000004 <trap_vector>:
4: 34202f73 csrr t5,mcause
8: 00800f93 li t6,8
c: 03ff0863 beq t5,t6,3c <write_tohost>
10: 00900f93 li t6,9
14: 03ff0463 beq t5,t6,3c <write_tohost>
18: 00b00f93 li t6,11
1c: 03ff0063 beq t5,t6,3c <write_tohost>
20: 00000f13 li t5,0
24: 000f0463 beqz t5,2c <trap_vector+0x28>
28: 000f0067 jr t5
2c: 34202f73 csrr t5,mcause
30: 000f5463 bgez t5,38 <handle_exception>
34: 0040006f j 38 <handle_exception>
00000038 <handle_exception>:
38: 5391e193 ori gp,gp,1337
0000003c <write_tohost>:
3c: 00001f17 auipc t5,0x1
40: fc3f2223 sw gp,-60(t5) # 1000 <tohost>
44: ff9ff06f j 3c <write_tohost>
00000048 <reset_vector>:
48: 00000193 li gp,0
4c: 00000297 auipc t0,0x0
50: fb828293 addi t0,t0,-72 # 4 <trap_vector>
54: 30529073 csrw mtvec,t0
58: 30005073 csrwi mstatus,0
5c: 00000297 auipc t0,0x0
60: 02028293 addi t0,t0,32 # 7c <begin_testcode>
64: 34129073 csrw mepc,t0
68: 00000293 li t0,0
6c: 20000337 lui t1,0x20000
70: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
74: 00532023 sw t0,0(t1)
78: 30200073 mret
0000007c <begin_testcode>:
7c: 00002797 auipc a5,0x2
80: f8478793 addi a5,a5,-124 # 2000 <begin_signature>
84: 00100093 li ra,1
88: 00000193 li gp,0
8c: fff00293 li t0,-1
90: 80000db7 lui s11,0x80000
94: fffd8d93 addi s11,s11,-1 # 7fffffff <_end+0x7fffddfb>
98: 80000eb7 lui t4,0x80000
9c: 34001073 csrw mscratch,zero
a0: 34009173 csrrw sp,mscratch,ra
a4: 34019273 csrrw tp,mscratch,gp
a8: 34029373 csrrw t1,mscratch,t0
ac: 340d9e73 csrrw t3,mscratch,s11
b0: 340e9f73 csrrw t5,mscratch,t4
b4: 34001ff3 csrrw t6,mscratch,zero
b8: 0027a023 sw sp,0(a5)
bc: 0047a223 sw tp,4(a5)
c0: 0067a423 sw t1,8(a5)
c4: 01c7a623 sw t3,12(a5)
c8: 01e7a823 sw t5,16(a5)
cc: 01f7aa23 sw t6,20(a5)
d0: 00002d17 auipc s10,0x2
d4: f48d0d13 addi s10,s10,-184 # 2018 <test_B_res>
d8: 123450b7 lui ra,0x12345
dc: 67808093 addi ra,ra,1656 # 12345678 <_end+0x12343474>
e0: 9abce137 lui sp,0x9abce
e4: ef010113 addi sp,sp,-272 # 9abcdef0 <_end+0x9abcbcec>
e8: 34009073 csrw mscratch,ra
ec: 340111f3 csrrw gp,mscratch,sp
f0: 34019273 csrrw tp,mscratch,gp
f4: 340212f3 csrrw t0,mscratch,tp
f8: 34001373 csrrw t1,mscratch,zero
fc: 003d2023 sw gp,0(s10)
100: 004d2223 sw tp,4(s10)
104: 005d2423 sw t0,8(s10)
108: 006d2623 sw t1,12(s10)
10c: 00002097 auipc ra,0x2
110: f1c08093 addi ra,ra,-228 # 2028 <test_C_res>
114: 42727137 lui sp,0x42727
118: e6f10113 addi sp,sp,-401 # 42726e6f <_end+0x42724c6b>
11c: 34011073 csrw mscratch,sp
120: 34001073 csrw mscratch,zero
124: 0000a023 sw zero,0(ra)
128: 00002117 auipc sp,0x2
12c: f0410113 addi sp,sp,-252 # 202c <test_D_res>
130: f7ff9db7 lui s11,0xf7ff9
134: 818d8d93 addi s11,s11,-2024 # f7ff8818 <_end+0xf7ff6614>
138: 340d9073 csrw mscratch,s11
13c: 34001073 csrw mscratch,zero
140: 34001073 csrw mscratch,zero
144: 340012f3 csrrw t0,mscratch,zero
148: 00012023 sw zero,0(sp)
14c: 00512223 sw t0,4(sp)
150: 00002117 auipc sp,0x2
154: ee410113 addi sp,sp,-284 # 2034 <test_E_res>
158: 321653b7 lui t2,0x32165
15c: 49838393 addi t2,t2,1176 # 32165498 <_end+0x32163294>
160: 14726337 lui t1,0x14726
164: 83630313 addi t1,t1,-1994 # 14725836 <_end+0x14723632>
168: 963852b7 lui t0,0x96385
16c: 27428293 addi t0,t0,628 # 96385274 <_end+0x96383070>
170: 34031073 csrw mscratch,t1
174: 340292f3 csrrw t0,mscratch,t0
178: 340393f3 csrrw t2,mscratch,t2
17c: 34001473 csrrw s0,mscratch,zero
180: 00512023 sw t0,0(sp)
184: 00712223 sw t2,4(sp)
188: 00812423 sw s0,8(sp)
18c: 00002297 auipc t0,0x2
190: e7428293 addi t0,t0,-396 # 2000 <begin_signature>
194: 20000337 lui t1,0x20000
198: 00830313 addi t1,t1,8 # 20000008 <_end+0x1fffde04>
19c: 00532023 sw t0,0(t1)
1a0: 00002297 auipc t0,0x2
1a4: ea028293 addi t0,t0,-352 # 2040 <end_signature>
1a8: 20000337 lui t1,0x20000
1ac: 00c30313 addi t1,t1,12 # 2000000c <_end+0x1fffde08>
1b0: 00532023 sw t0,0(t1)
1b4: 00100293 li t0,1
1b8: 20000337 lui t1,0x20000
1bc: 01030313 addi t1,t1,16 # 20000010 <_end+0x1fffde0c>
1c0: 00532023 sw t0,0(t1)
1c4: 00000013 nop
1c8: 00100193 li gp,1
1cc: 00000073 ecall
000001d0 <end_testcode>:
1d0: c0001073 unimp
...
Disassembly of section .tohost:
00001000 <tohost>:
...
00001100 <fromhost>:
...
Disassembly of section .data:
00002000 <begin_signature>:
2000: ffff 0xffff
2002: ffff 0xffff
2004: ffff 0xffff
2006: ffff 0xffff
2008: ffff 0xffff
200a: ffff 0xffff
200c: ffff 0xffff
200e: ffff 0xffff
2010: ffff 0xffff
2012: ffff 0xffff
2014: ffff 0xffff
2016: ffff 0xffff
00002018 <test_B_res>:
2018: ffff 0xffff
201a: ffff 0xffff
201c: ffff 0xffff
201e: ffff 0xffff
2020: ffff 0xffff
2022: ffff 0xffff
2024: ffff 0xffff
2026: ffff 0xffff
00002028 <test_C_res>:
2028: ffff 0xffff
202a: ffff 0xffff
0000202c <test_D_res>:
202c: ffff 0xffff
202e: ffff 0xffff
2030: ffff 0xffff
2032: ffff 0xffff
00002034 <test_E_res>:
2034: ffff 0xffff
2036: ffff 0xffff
2038: ffff 0xffff
203a: ffff 0xffff
203c: ffff 0xffff
203e: ffff 0xffff
00002040 <end_signature>:
...
00002100 <begin_regstate>:
2100: 0080 addi s0,sp,64
...
00002200 <end_regstate>:
2200: 0004 0x4
...
Disassembly of section .riscv.attributes:
00000000 <.riscv.attributes>:
0: 1d41 addi s10,s10,-16
2: 0000 unimp
4: 7200 flw fs0,32(a2)
6: 7369 lui t1,0xffffa
8: 01007663 bgeu zero,a6,14 <trap_vector+0x10>
c: 00000013 nop
10: 7205 lui tp,0xfffe1
12: 3376 fld ft6,376(sp)
14: 6932 flw fs2,12(sp)
16: 7032 flw ft0,44(sp)
18: 0030 addi a2,sp,8
1a: 0108 addi a0,sp,128
1c: 0b0a slli s6,s6,0x2