68 lines
1.8 KiB
INI
68 lines
1.8 KiB
INI
#
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# Freescale Kinetis KL25 devices
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#
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#
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# KL25 devices support both JTAG and SWD transports.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME kl25
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0bc11477
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_CHIPNAME.cpu
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# It is important that "kinetis mdm check_security" is called for
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# 'examine-end' event and not 'eximine-start'. Calling it in 'examine-start'
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# causes "kinetis mdm check_security" to fail the first time openocd
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# calls it when it tries to connect after the CPU has been power-cycled.
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$_CHIPNAME.cpu configure -event examine-end {
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kinetis mdm check_security
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}
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
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# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
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# specifies up to 1MHz for VLPR mode.
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adapter_khz 1000
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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$_TARGETNAME configure -event reset-init {
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# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
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# specifies up to 24MHz for run mode; Table 17 of Sub-Family Data
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# Sheet rev4 lists 25MHz as the maximum frequency.
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adapter_khz 24000
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}
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