77 lines
1.9 KiB
INI
77 lines
1.9 KiB
INI
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME pic32mx
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0x30938053
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}
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# default working area is 16384
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
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#
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# At reset the pic32mx does not allow code execution from RAM
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# we have to setup the BMX registers to allow this.
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# One limitation is that we loose the first 2k of RAM.
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#
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global _PIC32MX_DATASIZE
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global _PIC32MX_PROGSIZE
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set _PIC32MX_DATASIZE 0x800
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set _PIC32MX_PROGSIZE [expr ($_WORKAREASIZE - $_PIC32MX_DATASIZE)]
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$_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size $_PIC32MX_PROGSIZE -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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#
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# from reset the pic32 cannot execute code in ram - enable ram execution
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# minimum offset from start of ram is 2k
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#
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global _PIC32MX_DATASIZE
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global _PIC32MX_PROGSIZE
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# BMXCON
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mww 0xbf882000 0x001f0040
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# BMXDKPBA: 2k kernel data @ 0xa0000800
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mww 0xbf882010 $_PIC32MX_DATASIZE
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# BMXDUDBA: 16k kernel program @ 0xa0000800
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mww 0xbf882020 $_PIC32MX_PROGSIZE
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# BMXDUPBA: 0k user program
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mww 0xbf882030 $_PIC32MX_PROGSIZE
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}
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME pic32mx 0x1fc00000 0 0 0 $_TARGETNAME
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME pic32mx 0x1d000000 0 0 0 $_TARGETNAME
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# For more information about the configuration files, take a look at:
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# openocd.texi
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