69 lines
1.8 KiB
INI
69 lines
1.8 KiB
INI
# TI OMAP3530
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# http://focus.ti.com/docs/prod/folders/print/omap3530.html
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# Other OMAP3 chips remove DSP and/or the OpenGL support
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME omap3530
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}
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# ICEpick-C ... used to route Cortex, DSP, and more not shown here
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source [find target/icepick.cfg]
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# Subsidiary TAP: C64x+ DSP ... must enable via ICEpick
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jtag newtap $_CHIPNAME dsp -irlen 38 -ircapture 0x25 -irmask 0x3f -disable
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# Subsidiary TAP: CoreSight Debug Access Port (DAP)
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if { [info exists DAP_TAPID ] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x0b6d602f
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}
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf \
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-expected-id $_DAP_TAPID -disable
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jtag configure $_CHIPNAME.dap -event tap-enable \
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"icepick_c_tapenable $_CHIPNAME.jrc 3"
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# Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
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if { [info exists JRC_TAPID ] } {
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set _JRC_TAPID $JRC_TAPID
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} else {
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set _JRC_TAPID 0x0b7ae02f
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}
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jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \
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-expected-id $_JRC_TAPID
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jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
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# GDB target: Cortex-A8, using DAP
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target create omap3.cpu cortex_a8 -chain-position $_CHIPNAME.dap
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# FIXME much of this should be in reset event handlers
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proc omap3_dbginit { } {
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reset
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sleep 500
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jtag tapenable omap3530.dap
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targets
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# sleep 1000
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# dap apsel 1
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# sleep 1000
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# dap apsel 1
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# dap info 1
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# 0xd401.0000 - ETM
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# 0xd401.1000 - Cortex-A8
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# 0xd401.9000 - TPIU (traceport)
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# 0xd401.b000 - ETB
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# 0xd401.d000 - DAPCTL
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omap3.cpu mww 0x54011FB0 0xC5ACCE55
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omap3.cpu mdw 0x54011314
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omap3.cpu mdw 0x54011314
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# omap3.cpu mdw 0x54011080
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omap3.cpu mww 0x5401d030 0x00002000
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}
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