tinyriscv-openocd/tcl/target/klx.cfg

63 lines
1.7 KiB
INI

#
# NXP (former Freescale) Kinetis KL series devices
# Also used for Cortex-M0+ equipped members of KVx and KE1xZ series
#
source [find target/swj-dp.tcl]
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME klx
}
# Work-area is a space in RAM used for flash programming
# By default use 1KiB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x400
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0bc11477
}
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.cpu
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.pflash
flash bank $_FLASHNAME kinetis 0 0 0 0 $_TARGETNAME
kinetis create_banks
# Table 5-1. Clock Summary of KL25 Sub-Family Reference Manual
# specifies up to 1MHz for VLPR mode and up to 24MHz for run mode;
# Table 17 of Sub-Family Data Sheet rev4 lists 25MHz as the maximum frequency.
adapter_khz 1000
reset_config srst_nogate
if {![using_hla]} {
# Detect secured MCU or boot lock-up in RESET/WDOG loop
$_CHIPNAME.cpu configure -event examine-start {
kinetis mdm check_security
}
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
# Disable watchdog not to disturb OpenOCD algorithms running on MCU
# (e.g. armv7m_checksum_memory() in verify_image)
# Flash driver also disables watchdog before FTFA flash programming.
$_TARGETNAME configure -event reset-init {
kinetis disable_wdog
}