Steven Stallion 4ab75a3634 esirisc: support eSi-RISC targets ... eSi-RISC is a highly configurable microprocessor architecture for embedded systems provided by EnSilica. This patch adds support for 32-bit targets and also includes an internal flash driver and uC/OS-III RTOS support. This is a non-traditional target and required a number of additional changes to support non-linear register numbers and the 'p' packet in RTOS support for proper integration into EnSilica's GDB port. Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4660 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>		2018-10-16 11:58:24 +01:00
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manual	doc: fix several typos within manual documents	2018-05-09 11:43:23 +01:00
Makefile.am	Convert to non-recursive make	2016-12-08 16:23:10 +00:00
fdl.texi	- update openocd.texi to fdl 1.2	2008-02-29 18:10:46 +00:00
openocd.1	docs: update incorrect urls	2013-03-28 23:24:40 +00:00
openocd.texi	esirisc: support eSi-RISC targets	2018-10-16 11:58:24 +01:00