Bohdan Tymkiv c100832971 psoc6: Run flash algorithm asynchronously to improve performance ... Existing psoc6 driver starts flash algorithm for each Flash row. This is suboptimal from performance point of view, starting/stopping flash algorithm for each row adds significant overhead. This change starts flash algorithm and leaves it running asynchronously while driver performs flash operations. Performance gain is 170...250% depending on probe: flash write_image img_256k.bin | w/o this change | with this change | ----------------------------------|-----------------|------------------| KitProg2/CMSIS-DAP, SWD @ 1 MHz | 4 KiB/s | 10 KiB/s | J-Link Ultra, SWD @ 1 MHz | 17 KiB/s | 31 KiB/s | J-Link Ultra, SWD @ 4 MHz | 33 KiB/s | 57 KiB/s | Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com> Reviewed-on: http://openocd.zylin.com/4472 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>		2018-05-08 15:21:49 -07:00
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board	board: add configuration for stm32f103c8 "Blue Pill"	2018-05-08 15:21:49 -07:00
chip	Fix a typo.	2013-07-07 13:00:59 +00:00
cpld	xilinx-xcu: add Xilinx Ultrascale tap data	2018-03-30 10:07:49 +01:00
cpu/arm	Move TCL script files -- Step 2 of 2:	2009-05-27 06:49:24 +00:00
fpga	xilinx-dna.cfg: generic tools for reading Xilinx Device DNA	2018-03-30 16:22:42 +01:00
interface	jtag: drivers: add support for FT232R sync bitbang JTAG interfaces	2018-03-13 08:47:46 +00:00
target	psoc6: Run flash algorithm asynchronously to improve performance	2018-05-08 15:21:49 -07:00
test	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00
tools	tcl/board: add Linksys WAG200G config	2016-10-17 09:16:33 +01:00
bitsbytes.tcl	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00
mem_helper.tcl	tcl: add mrb command to mem_helper.tcl	2016-07-17 22:36:47 +01:00
memory.tcl	target: add "phys" argument to mem2array, array2mem	2016-08-09 14:32:12 +01:00
mmr_helpers.tcl	TCL scripts: replace "puts" with "echo"	2010-11-09 08:12:51 +01:00