50 lines
1.7 KiB
INI
50 lines
1.7 KiB
INI
# TI/Luminary Stellaris LM3S chip family
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lm3s
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}
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# CPU TAP ID 0x1ba00477 for early Sandstorm parts
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# CPU TAP ID 0x2ba00477 for later SandStorm parts, e.g. lm3s811 Rev C2
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# CPU TAP ID 0x3ba00477 for Cortex-M3 r1p2 (on Fury, DustDevil)
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# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest)
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# ... we'll ignore the JTAG version field, rather than list every
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# chip revision that turns up.
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
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-expected-id $_CPUTAPID -ignore-version
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# The "lm3s" variant uses a software reset rather than SRST.
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# This stops the debug registers from being cleared; it works
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# around an erratum which should be fixed in later silicon.
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu \
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-variant lm3s
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# 8K working area at base of ram, not backed up
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#
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# NOTE: you may need or want to reconfigure the work area;
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# some parts have just 6K, and you may want to use other
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# addresses (at end of mem not beginning) or back it up.
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
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# JTAG speed ... slow enough to work with a 12 MHz RC oscillator;
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# LM3S parts don't support RTCK
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#
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# NOTE: this may be increased by a reset-init handler, after it
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# configures and enables the PLL. Or you might need to decrease
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# this, if you're using a slower clock.
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adapter_khz 500
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$_TARGETNAME configure -event reset-start {adapter_khz 500}
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# flash configuration ... autodetects sizes, autoprobed
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flash bank $_CHIPNAME.flash stellaris 0 0 0 0 $_TARGETNAME
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