217 lines
6.0 KiB
INI
217 lines
6.0 KiB
INI
# script for Cypress PSoC 4 devices
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#
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# PSoC 4 devices support SWD transports only.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME psoc4
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0bb11477
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME psoc4 0 0 0 0 $_TARGETNAME
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adapter_khz 1500
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# Reset, bloody PSoC 4 reset
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#
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# 1) XRES (nSRST) resets also SWD DP so SWD line reset and DP reinit is needed.
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# High level adapter stops working after SRST and needs OpenOCD restart.
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# If your hw does not use SRST for other circuits, use sysresetreq instead
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#
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# 2) PSoC 4 executes initialization code from system ROM after reset.
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# This code subsequently jumps to user flash reset vector address.
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# Unfortunately the system ROM code is protected from reading and debugging.
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# Protection breaks vector catch VC_CORERESET used for "reset halt" by cortex_m.
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#
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# Cypress uses TEST_MODE flag to loop CPU in system ROM before executing code
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# from user flash. Programming specifications states that TEST_MODE flag must be
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# set in time frame 400 usec delayed about 1 msec from reset.
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#
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# OpenOCD have no standard way how to set TEST_MODE in specified time frame.
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# As a workaround the TEST_MODE flag is set before reset instead.
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# It worked for the oldest family PSoC4100/4200 even though it is not guaranteed
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# by specification.
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#
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# Newer families like PSoC 4000, 4100M, 4200M, 4100L, 4200L and PSoC 4 BLE
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# clear TEST_MODE flag during device reset so workaround is not possible.
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# Use a KitProg adapter for theese devices or "reset halt" will not stop
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# before executing user code.
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#
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# 3) SWD cannot be connected during system initialization after reset.
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# This might be a reason for unconnecting ST-Link v2 when deasserting reset.
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# As a workaround arp_reset deassert is not called for hla
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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proc psoc4_get_family_id {} {
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set err [catch "mem2array romtable_pid 32 0xF0000FE0 3"]
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if { $err } {
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return 0
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}
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if { [expr $romtable_pid(0) & 0xffffff00 ]
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|| [expr $romtable_pid(1) & 0xffffff00 ]
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|| [expr $romtable_pid(2) & 0xffffff00 ] } {
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echo "Unexpected data in ROMTABLE"
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return 0
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}
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set designer_id [expr (( $romtable_pid(1) & 0xf0 ) >> 4) | (( $romtable_pid(2) & 0xf ) << 4 ) ]
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if { $designer_id != 0xb4 } {
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echo [format "ROMTABLE Designer ID 0x%02x is not Cypress" $designer_id]
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return 0
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}
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set family_id [expr ( $romtable_pid(0) & 0xff ) | (( $romtable_pid(1) & 0xf ) << 8 ) ]
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return $family_id
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}
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proc ocd_process_reset_inner { MODE } {
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global PSOC4_USE_ACQUIRE PSOC4_TEST_MODE_WORKAROUND
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global _TARGETNAME
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if { 0 != [string compare $_TARGETNAME [target names]] } {
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return -code error "PSoC 4 reset can handle only one $_TARGETNAME target";
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}
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set t $_TARGETNAME
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# If this target must be halted...
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set halt -1
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if { 0 == [string compare $MODE halt] } {
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set halt 1
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}
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if { 0 == [string compare $MODE init] } {
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set halt 1;
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}
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if { 0 == [string compare $MODE run ] } {
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set halt 0;
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}
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if { $halt < 0 } {
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return -code error "Invalid mode: $MODE, must be one of: halt, init, or run";
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}
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if { ! [info exists PSOC4_USE_ACQUIRE] } {
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if { 0 == [string compare [adapter_name] kitprog ] } {
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set PSOC4_USE_ACQUIRE 1
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} else {
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set PSOC4_USE_ACQUIRE 0
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}
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}
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if { $PSOC4_USE_ACQUIRE } {
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set PSOC4_TEST_MODE_WORKAROUND 0
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} elseif { ! [info exists PSOC4_TEST_MODE_WORKAROUND] } {
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if { [psoc4_get_family_id] == 0x93 } {
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set PSOC4_TEST_MODE_WORKAROUND 1
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} else {
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set PSOC4_TEST_MODE_WORKAROUND 0
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}
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}
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#$t invoke-event reset-start
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$t invoke-event reset-assert-pre
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if { $halt && $PSOC4_USE_ACQUIRE } {
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catch { [adapter_name] acquire_psoc }
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$t arp_examine
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} else {
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if { $PSOC4_TEST_MODE_WORKAROUND } {
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set TEST_MODE 0x40030014
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if { $halt == 1 } {
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catch { mww $TEST_MODE 0x80000000 }
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} else {
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catch { mww $TEST_MODE 0 }
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}
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}
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$t arp_reset assert 0
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}
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$t invoke-event reset-assert-post
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$t invoke-event reset-deassert-pre
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if {![using_hla]} { # workaround ST-Link v2 fails and forcing reconnect
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$t arp_reset deassert 0
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}
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$t invoke-event reset-deassert-post
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# Pass 1 - Now wait for any halt (requested as part of reset
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# assert/deassert) to happen. Ideally it takes effect without
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# first executing any instructions.
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if { $halt } {
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# Now PSoC CPU should loop in system ROM
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$t arp_waitstate running 200
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$t arp_halt
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# Catch, but ignore any errors.
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catch { $t arp_waitstate halted 1000 }
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# Did we succeed?
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set s [$t curstate]
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if { 0 != [string compare $s "halted" ] } {
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return -code error [format "TARGET: %s - Not halted" $t]
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}
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# Check if PSoC CPU is stopped in system ROM
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set pc [reg pc]
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regsub {pc[^:]*: } $pc "" pc
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if { $pc < 0x10000000 || $pc > 0x1000ffff } {
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set hint ""
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set family_id [psoc4_get_family_id]
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if { $family_id == 0x93 } {
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set hint ", use 'reset_config none'"
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} elseif { $family_id > 0x93 } {
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set hint ", use a KitProg adapter"
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}
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return -code error [format "TARGET: %s - Not halted in system ROM%s" $t $hint]
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}
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# Set registers to reset vector values
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mem2array value 32 0 2
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reg pc [expr $value(1) & 0xfffffffe ]
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reg msp $value(0)
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if { $PSOC4_TEST_MODE_WORKAROUND } {
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catch { mww $TEST_MODE 0 }
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}
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}
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#Pass 2 - if needed "init"
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if { 0 == [string compare init $MODE] } {
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set err [catch "$t arp_waitstate halted 5000"]
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# Did it halt?
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if { $err == 0 } {
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$t invoke-event reset-init
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}
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}
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$t invoke-event reset-end
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}
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