113 lines
3.1 KiB
INI
113 lines
3.1 KiB
INI
source [find target/icepick.cfg]
|
|
|
|
if { [info exists CHIPNAME] } {
|
|
set _CHIPNAME $CHIPNAME
|
|
} else {
|
|
set _CHIPNAME am335x
|
|
}
|
|
|
|
# set the taps to be enabled by default. this can be overridden
|
|
# by setting DEFAULT_TAPS in a separate configuration file
|
|
# or directly on the command line.
|
|
if { [info exists DEFAULT_TAPS] } {
|
|
set _DEFAULT_TAPS "$DEFAULT_TAPS"
|
|
} else {
|
|
set _DEFAULT_TAPS "$_CHIPNAME.tap"
|
|
}
|
|
|
|
#
|
|
# Main DAP
|
|
#
|
|
if { [info exists DAP_TAPID] } {
|
|
set _DAP_TAPID $DAP_TAPID
|
|
} else {
|
|
set _DAP_TAPID 0x4b6b902f
|
|
}
|
|
jtag newtap $_CHIPNAME tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
|
|
jtag configure $_CHIPNAME.tap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12 0"
|
|
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap
|
|
|
|
#
|
|
# M3 DAP
|
|
#
|
|
if { [info exists M3_DAP_TAPID] } {
|
|
set _M3_DAP_TAPID $M3_DAP_TAPID
|
|
} else {
|
|
set _M3_DAP_TAPID 0x4b6b902f
|
|
}
|
|
jtag newtap $_CHIPNAME m3_tap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
|
|
jtag configure $_CHIPNAME.m3_tap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0"
|
|
dap create $_CHIPNAME.m3_dap -chain-position $_CHIPNAME.m3_tap
|
|
|
|
#
|
|
# ICEpick-D (JTAG route controller)
|
|
#
|
|
if { [info exists JRC_TAPID] } {
|
|
set _JRC_TAPID $JRC_TAPID
|
|
} else {
|
|
set _JRC_TAPID 0x0b94402f
|
|
}
|
|
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
|
|
jtag configure $_CHIPNAME.jrc -event setup {
|
|
global _DEFAULT_TAPS
|
|
enable_default_taps $_DEFAULT_TAPS
|
|
}
|
|
# some TCK tycles are required to activate the DEBUG power domain
|
|
jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100"
|
|
|
|
#
|
|
# helper function that enables all taps passed as argument
|
|
#
|
|
proc enable_default_taps { taps } {
|
|
foreach tap $taps {
|
|
jtag tapenable $tap
|
|
}
|
|
}
|
|
|
|
#
|
|
# Cortex-M3 target
|
|
#
|
|
set _TARGETNAME_2 $_CHIPNAME.m3
|
|
target create $_TARGETNAME_2 cortex_m -dap $_CHIPNAME.m3_dap
|
|
|
|
#
|
|
# Cortex-A8 target
|
|
#
|
|
set _TARGETNAME $_CHIPNAME.cpu
|
|
target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -dbgbase 0x80001000
|
|
|
|
# SRAM: 64K at 0x4030.0000; use the first 16K
|
|
$_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x4000
|
|
|
|
|
|
# when putting the target into 'reset halt', we need to disable the watchdog as
|
|
# it would otherwise trigger while we're in JTAG
|
|
# FIXME: unify with target/am437x.cfg
|
|
source [find mem_helper.tcl]
|
|
set WDT1_BASE_ADDR 0x44e35000
|
|
set WDT1_W_PEND_WSPR [expr $WDT1_BASE_ADDR + 0x0034]
|
|
set WDT1_WSPR [expr $WDT1_BASE_ADDR + 0x0048]
|
|
proc disable_watchdog { } {
|
|
global WDT1_WSPR
|
|
global WDT1_W_PEND_WSPR
|
|
global _TARGETNAME
|
|
|
|
set curstate [$_TARGETNAME curstate]
|
|
|
|
if { [string compare $curstate halted] == 0 } {
|
|
set WDT_DISABLE_SEQ1 0xaaaa
|
|
set WDT_DISABLE_SEQ2 0x5555
|
|
|
|
mww phys $WDT1_WSPR $WDT_DISABLE_SEQ1
|
|
|
|
# Empty body to make sure this executes as fast as possible.
|
|
# We don't want any delays here otherwise romcode might start
|
|
# executing and end up changing state of certain IPs.
|
|
while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
|
|
|
|
mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
|
|
while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
|
|
}
|
|
}
|
|
$_TARGETNAME configure -event reset-end { disable_watchdog }
|