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tinyriscv
Author | SHA1 | Date |
---|---|---|
liangkangnan | 0463f8d773 | |
liangkangnan | 916fcb01cb | |
liangkangnan | 9bbbaf9bad | |
liangkangnan | e5a97681ea | |
liangkangnan | 76b7bb357b | |
liangkangnan | 26b7b3c917 | |
liangkangnan | 66f480322a | |
liangkangnan | e2b555e287 | |
liangkangnan | a610f377c9 | |
liangkangnan | 65ff1f1dd2 | |
Blue Liang | c94bf74155 | |
Blue Liang | 3cc6fe00af | |
liangkangnan | eefff456ca | |
Tim Newsome | 97fb3f4bd4 | |
Tommy Murphy | 95a8cd9b5d | |
Tim Newsome | 4f9e2d7171 | |
Tim Newsome | 1524487a13 | |
Alistair Francis | 62af8d3c10 | |
Tim Newsome | fcdb5d64ec | |
Tim Newsome | 0c3e50a06a | |
Tim Newsome | 55dd7e83ca | |
Tim Newsome | e6e281197f | |
Tim Newsome | 2e9aad8914 | |
Tim Newsome | 464407cfd2 | |
Tim Newsome | cbb15587dc | |
Tim Newsome | 3967f48843 | |
Tim Newsome | 60eccb2967 | |
Tim Newsome | 5b2426a4b2 | |
Jonathan Tinkham | 548790fefc | |
Tim Newsome | f6f30fb148 | |
Tim Newsome | 54e5d2533c | |
Tim Newsome | 1ae21b3874 | |
Tim Newsome | 1449af5bdb | |
Tim Newsome | 95462a8a35 | |
Tim Newsome | 7cb8843794 | |
Tim Newsome | 2f456abd55 | |
Tim Newsome | 69e6891434 | |
Jan Matyas | fcea4f79ba | |
Tim Newsome | 8b8db033ee | |
Hsiangkai | 2c3f099b73 | |
Hsiangkai | 9886f77374 | |
bluew | aec5cca15b | |
Tim Newsome | 780d8e4d3e | |
Tim Newsome | 50d0c2f67c | |
Jan Matyas | e03dd199e0 | |
Tim Newsome | de00906ebd | |
Jan Matyas | 739d16d503 | |
Tim Newsome | e944de422e | |
Greg Savin | b7bd3f8d47 | |
Tim Newsome | f93ede5401 | |
Tim Newsome | 20804cb4d2 | |
Tim Newsome | 0409bf9b24 | |
Tim Newsome | 885260505a | |
Tim Newsome | 91d00468b6 | |
Tim Newsome | 3b4fcf471f | |
Tim Newsome | 7c82a7b9d5 | |
Tim Newsome | f9bc528478 | |
Tim Newsome | 1107dc7e3f | |
Tim Newsome | 53b87ddfc5 | |
Tim Newsome | 9aac179cf2 | |
Tim Newsome | bbdc28e0f5 | |
darius-bluespec | 20fc862b15 | |
Seth LaForge | 3110092720 | |
Christopher Head | 31a3324b68 | |
Marc Schink | 181d594205 | |
Tim Newsome | bf1e201336 | |
Marc Schink | 85a460d5a3 | |
Khem Raj | 101345270b | |
Greg Savin | c5bb7fb230 | |
Tim Newsome | 11e6127401 | |
Tim Newsome | 274be9587f | |
Tarek BOCHKATI | 09eb941cb8 | |
Tarek BOCHKATI | 5b06b88af8 | |
Caleb Szalacinski | 5a235226f0 | |
Han Hartgers | 642a9310ca | |
Seth LaForge | 844c82934e | |
Tim Newsome | 24d59cfb90 | |
Tim Newsome | 30b93b8661 | |
Tim Newsome | 0819541366 | |
Tim Newsome | 5173ddf75e | |
dave-estes-syzexion | cd7eea6d76 | |
Tim Newsome | efce094b40 | |
Tarek BOCHKATI | 16496488d1 | |
Marc Schink | 320f7517c4 | |
Andreas Fritiofson | 7a93c9e087 | |
Tim Newsome | 7eaf60f1b5 | |
Nils Wistoff | 239a515a9c | |
Tim Newsome | 09016bcb6e | |
Tim Newsome | 9b34f8ca3c | |
Tim Newsome | 6983eda0e9 | |
Tim Newsome | c5dee66a71 | |
Tim Newsome | 8f2d2c27e8 | |
Marc Schink | 263deb3802 | |
Tim Newsome | 91faf1a573 | |
Antonio Borneo | 6ea43726a8 | |
Antonio Borneo | a521d93b7a | |
Christopher Head | 77a8914b7f | |
Kevin Gillespie | 23b6aa9bf8 | |
jhjung81 | 86cc07a757 | |
Tim Newsome | bb03f79bde | |
Marc Schink | 42cee465c2 | |
Marc Schink | 56de276d91 | |
Marc Schink | 0d47d85ff5 | |
Marc Schink | 1f1558e74b | |
Omair Javaid | ae449bb5f9 | |
Omair Javaid | bc94ca241a | |
Tim Newsome | c05ad1a92a | |
Antonio Borneo | 4dbcb1e79d | |
Antonio Borneo | 18f4ef0f5e | |
Antonio Borneo | 9879f9bf04 | |
Antonio Borneo | 1af83682e0 | |
Tarek BOCHKATI | e6990bdd00 | |
Tilman Sauerbeck | 8ed19a2e29 | |
Christopher Head | b6fa208759 | |
Tomas Vanek | 20396e56b7 | |
Michael Schwingen | 7a27423e31 | |
Antonio Borneo | 48478967db | |
Daniel Goehring | 88728abee1 | |
Florian Fainelli | f935f39cda | |
Florian Fainelli | eeabbd58c0 | |
Florian Fainelli | 604dded6f1 | |
Florian Fainelli | ba11adb833 | |
Antonio Borneo | 6f87df80fe | |
Marc Schink | c8184bac20 | |
Tomas Vanek | 215f14bec8 | |
Antonio Borneo | 159f11fefc | |
Antonio Borneo | 0cba5b4ea3 | |
Antonio Borneo | 02cd1e39cc | |
Antonio Borneo | e5177a5ad4 | |
Antonio Borneo | e26910fdad | |
Antonio Borneo | 7cddeb0af2 | |
Andreas Fritiofson | 8b9560349f | |
Bohdan Tymkiv | eea508d9af | |
Oleksij Rempel | 85ed41d210 | |
Marc Schink | 9655da5aed | |
Oleksij Rempel | 37ad15bcb3 | |
Marc Schink | cbf99d2df3 | |
Leonard Crestez | 2288394b45 | |
Tomas Vanek | 51ef02a5d1 | |
Antonio Borneo | 9ce5e8bc26 | |
Antonio Borneo | 545a3de09b | |
Antonio Borneo | f9bd26dfe0 | |
Tarek BOCHKATI | 5b768b0d39 | |
Antonio Borneo | f912649968 | |
Antonio Borneo | 5fbf4d4cc3 | |
Christopher Head | 39504a695f | |
Steven Stallion | 11e5f02276 | |
Marek Vasut | af952850b5 | |
Marek Vasut | 82e3a0e7cf | |
Marek Vasut | 5b053ffd43 | |
Antonio Borneo | 2b78f65aa9 | |
Marc Schink | e162200ab2 | |
Jan Matyas | 04ebb43f93 | |
Antonio Borneo | ea45029829 | |
Jan Matyas | b3d4c97b9f | |
Megan Wachs | 6dab4c70c8 | |
Marc Schink | 4f9ad16610 | |
Antonio Borneo | 92b582ed62 | |
Antonio Borneo | c826746068 | |
Antonio Borneo | 31c67cc830 | |
Antonio Borneo | 3605cb9625 | |
Antonio Borneo | 83af3d992e | |
Antonio Borneo | 24bfdf53fd | |
Antonio Borneo | 9eea9cce3f | |
Paul Fertser | 6da0512092 | |
Paul Fertser | 0840414f0e | |
Paul Fertser | a72561ba91 | |
Paul Fertser | 7f260f5009 | |
Paul Fertser | 2caa3455ad | |
Paul Fertser | 585fcea14a | |
Antonio Borneo | 6cb5ba6f11 | |
Paul Fertser | 6916550938 | |
Paul Fertser | 7060286175 | |
Paul Fertser | 3f8f7352d2 | |
Paul Fertser | fd66dfb61d | |
Paul Fertser | 20184ea861 | |
Paul Fertser | fa765f1374 | |
Paul Fertser | eaa70635dc | |
Paul Fertser | d50e92e7f7 | |
Paul Fertser | 5a330d1d74 | |
Paul Fertser | 0f488acbba | |
Paul Fertser | 105cfac552 | |
Paul Fertser | 95caf7714d | |
Paul Fertser | 54ecec2e85 | |
Paul Fertser | cff570b22f | |
Paul Fertser | c867806f0d | |
Paul Fertser | c779387279 | |
Paul Fertser | 32470a973f | |
Paul Fertser | 7b164d21ba | |
Paul Fertser | 42bc2051aa | |
Paul Fertser | 07632ab94c | |
Paul Fertser | c734202dc8 | |
Paul Fertser | 2f3ab89a78 | |
Paul Fertser | 6a453e5cf0 | |
Paul Fertser | c104617584 | |
Paul Fertser | fce3b698fb | |
Paul Fertser | d06b952376 | |
Paul Fertser | 30de1bfda4 | |
Paul Fertser | 962267ba1a | |
Paul Fertser | dae5a32c05 | |
Antonio Borneo | ce6340d8ce | |
Antonio Borneo | 79a92d467d | |
Antonio Borneo | b3ce5a0ae5 | |
Antonio Borneo | 74cd25a4d3 | |
Antonio Borneo | 84cfb727df | |
Tomas Vanek | 5e027407e3 | |
Tomas Vanek | 1ce51507a1 | |
Christopher Head | 250185c096 | |
Tarek BOCHKATI | 7ee618692f | |
Tomas Vanek | f78a7046a9 | |
Tim Newsome | bbdb820c82 | |
Leonard Crestez | c63c73c743 | |
Leonard Crestez | 23836fc5be | |
Leonard Crestez | b13055069c | |
Leonard Crestez | 537bbefcbd | |
Antonio Borneo | ae4b2720a4 | |
Tommy Vestermark | 83515b60c9 | |
Alexander Kurz | 33281a87b6 | |
Antonio Borneo | f9986394dc | |
Antonio Borneo | d870ecf5ff | |
Antonio Borneo | d3a9e535d5 | |
Christopher Head | a4ac56152d | |
Mete Balci | 5b263d7b0c | |
Marc Schink | d5936dc688 | |
Christopher Head | 6aae614cc2 | |
Antonio Borneo | 6f04bc1568 | |
Leonard Crestez | 38d053d11b | |
Leonard Crestez | 3b291a369c | |
Leonard Crestez | 55d53fb64c | |
Leonard Crestez | 2fc82eae3c | |
Leonard Crestez | 84e3f63a8c | |
Christopher Head | ca7ba6b58d | |
Christopher Head | 487710da6d | |
Tomas Vanek | 1f4596cc46 | |
Rocco Marco Guglielmi | a3dc54d2d3 | |
Antonio Borneo | c19de41a0f | |
Antonio Borneo | b61e454869 | |
Antonio Borneo | b6ea92247d | |
Antonio Borneo | fcfbb1792c | |
Antonio Borneo | 6e9571164b | |
Antonio Borneo | 80ca927ebc | |
Antonio Borneo | 3d59e0f612 | |
Antonio Borneo | 84ca4995ad | |
Antonio Borneo | f9056d222c | |
Antonio Borneo | 57962f4d1c | |
Antonio Borneo | a5a882c5c8 | |
Antonio Borneo | c239ee020b | |
Antonio Borneo | 04354fbc59 | |
Antonio Borneo | 69ba2a677b | |
Antonio Borneo | a18c1f289d | |
Antonio Borneo | a5fe9d6e24 | |
Antonio Borneo | d303a2864d | |
Antonio Borneo | 6949b5393d | |
Paul Fertser | 92c50fda2b | |
Peter Lawrence | 5202d82a95 | |
Mete Balci | 0627e4686a | |
Tomas Vanek | 07da3b3913 | |
Antonio Borneo | 076802606a |
|
@ -99,3 +99,5 @@ TAGS
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# ctags tag files
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tags
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release/
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|
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@ -1,3 +1,3 @@
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[submodule "jimtcl"]
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path = jimtcl
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url = https://github.com/msteveb/jimtcl
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url = https://gitee.com/liangkangnan/jimtcl
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|
|
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@ -64,7 +64,7 @@ script:
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# so this should work fine most of the time, and be a lot better than not
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# checking at all.
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- git diff -U20 HEAD~40 |
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filterdiff -x "b/src/jtag/drivers/libjaylink/*" -x "b/tools/git2cl/*" |
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filterdiff -x "a/src/jtag/drivers/libjaylink/*" -x "a/tools/git2cl/*" |
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./tools/scripts/checkpatch.pl --no-signoff -
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- ./bootstrap && ./configure --enable-remote-bitbang --enable-jtag_vpi $CONFIGURE_ARGS && make
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- file src/$EXECUTABLE
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|
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6
HACKING
6
HACKING
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@ -103,7 +103,7 @@ patch:
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Now every time OpenOCD is run, coverage info in your build directory is
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updated. Running `gcov src/path/file.c` will generate a report.
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Please consider performing these additonal checks where appropriate
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Please consider performing these additional checks where appropriate
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(especially Clang Static Analyzer for big portions of new code) and
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mention the results (e.g. "Valgrind-clean, no new Clang analyzer
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warnings") in the commit message.
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@ -174,7 +174,7 @@ wget http://openocd.zylin.com/tools/hooks/commit-msg
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mv commit-msg .git/hooks
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chmod +x .git/hooks/commit-msg
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@endcode
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\note A script exists to simplify the two items above. execute:
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\note A script exists to simplify the two items above. Execute:
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@code
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tools/initial.sh <username>
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@endcode
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@ -186,7 +186,7 @@ git config --global user.email "john@smith.org"
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@endcode
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-# Work on your patches. Split the work into
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multiple small patches that can be reviewed and
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applied seperately and safely to the OpenOCD
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applied separately and safely to the OpenOCD
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repository.
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@code
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while(!done) {
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2
README
2
README
|
@ -118,7 +118,7 @@ Debug targets
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ARM11, ARM7, ARM9, AVR32, Cortex-A, Cortex-R, Cortex-M, LS102x-SAP,
|
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Feroceon/Dragonite, DSP563xx, DSP5680xx, EnSilica eSi-RISC, FA526, MIPS
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EJTAG, NDS32, XScale, Intel Quark.
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EJTAG, NDS32, RISC-V, XScale, Intel Quark.
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|
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Flash drivers
|
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-------------
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|
|
|
@ -0,0 +1,55 @@
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# 编译Windows版本
|
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|
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## 1.安装msys2
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|
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到[msys2官网](https://www.msys2.org/)下载安装最新的64位版本,安装完成后打开mingw-32bit窗口,执行以下命令安装依赖:
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`pacman -S autoconf automake pkg-config libtool binutils gcc git make mingw-w64-i686-toolchain mingw-w64-i686-libusb mingw-w64-i686-hidapi mingw-w64-i686-libftdi`
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## 2.下载源码
|
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下载本项目的所有代码到msys2的某个目录下:
|
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|
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`git clone --recursive https://gitee.com/liangkangnan/tinyriscv-openocd.git`
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## 3.编译源码
|
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|
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### 3.1第一次编译或者重新编译
|
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|
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在项目的根目录下,执行以下命令:
|
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|
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`./rebuild.sh`
|
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|
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### 3.2打包openocd.exe
|
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|
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编译完成后就可以打包了,执行以下命令进行打包:
|
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|
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`./release.sh`
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|
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打包后的文件在根目录下的release目录里,可以把整个release目录拷贝到电脑的其他目录下使用。
|
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|
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### 3.3修改源码后编译
|
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|
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修改源码后,只需要执行make命令即可编译。
|
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|
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`make`
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|
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编译完可以按照步骤3.2进行打包。
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# 编译Linux版本
|
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|
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以ubuntu系统为例。
|
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|
||||
## 1.安装依赖
|
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|
||||
`sudo apt-get install autoconf automake pkg-config libtool libusb-dev libusb-1.0-0-dev libhidapi-dev`
|
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|
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## 2.编译
|
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|
||||
```
|
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./bootstrap
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./configure --enable-remote-bitbang --enable-cmsis-dap --enable-ftdi
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make
|
||||
```
|
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|
||||
编译完成后会在src/目录下生成openocd可执行文件。
|
1
TODO
1
TODO
|
@ -365,7 +365,6 @@ to complete:
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- committing to git
|
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- Review Users' Guide for documentation errors or omissions
|
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- "capture" and "ocd_find" commands
|
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- "ocd_" prefix on various stuff
|
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- Update Developer's Manual (doxygen output)
|
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- Add documentation describing the architecture of each module
|
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- Provide more Technical Primers to bootstrap contributor knowledge
|
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|
|
17
configure.ac
17
configure.ac
|
@ -111,7 +111,7 @@ m4_define([ADAPTER_OPT], [m4_translit(ADAPTER_ARG($1), [_], [-])])
|
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m4_define([USB1_ADAPTERS],
|
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[[[ftdi], [MPSSE mode of FTDI based devices], [FTDI]],
|
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[[ftdi_oscan1], [cJTAG OSCAN1 tunneled thru MPSSE], [FTDI_OSCAN1]],
|
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[[stlink], [ST-Link JTAG Programmer], [HLADAPTER_STLINK]],
|
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[[stlink], [ST-Link Programmer], [HLADAPTER_STLINK]],
|
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[[ti_icdi], [TI ICDI JTAG Programmer], [HLADAPTER_ICDI]],
|
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[[ulink], [Keil ULINK JTAG Programmer], [ULINK]],
|
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[[usb_blaster_2], [Altera USB-Blaster II Compatible], [USB_BLASTER_2]],
|
||||
|
@ -173,7 +173,6 @@ AC_ARG_ENABLE([werror],
|
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[gcc_werror=$enableval], [gcc_werror=$gcc_warnings])
|
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|
||||
# set default verbose options, overridden by following options
|
||||
debug_jtag_io=no
|
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debug_usb_io=no
|
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debug_usb_comms=no
|
||||
|
||||
|
@ -181,16 +180,10 @@ AC_ARG_ENABLE([verbose],
|
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AS_HELP_STRING([--enable-verbose],
|
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[Enable verbose JTAG I/O messages (for debugging).]),
|
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[
|
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debug_jtag_io=$enableval
|
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debug_usb_io=$enableval
|
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debug_usb_comms=$enableval
|
||||
], [])
|
||||
|
||||
AC_ARG_ENABLE([verbose_jtag_io],
|
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AS_HELP_STRING([--enable-verbose-jtag-io],
|
||||
[Enable verbose JTAG I/O messages (for debugging).]),
|
||||
[debug_jtag_io=$enableval], [])
|
||||
|
||||
AC_ARG_ENABLE([verbose_usb_io],
|
||||
AS_HELP_STRING([--enable-verbose-usb-io],
|
||||
[Enable verbose USB I/O messages (for debugging)]),
|
||||
|
@ -201,12 +194,6 @@ AC_ARG_ENABLE([verbose_usb_comms],
|
|||
[Enable verbose USB communication messages (for debugging)]),
|
||||
[debug_usb_comms=$enableval], [])
|
||||
|
||||
AC_MSG_CHECKING([whether to enable verbose JTAG I/O messages]);
|
||||
AC_MSG_RESULT([$debug_jtag_io])
|
||||
AS_IF([test "x$debug_jtag_io" = "xyes"], [
|
||||
AC_DEFINE([_DEBUG_JTAG_IO_],[1], [Print verbose JTAG I/O messages])
|
||||
])
|
||||
|
||||
AC_MSG_CHECKING([whether to enable verbose USB I/O messages]);
|
||||
AC_MSG_RESULT([$debug_usb_io])
|
||||
AS_IF([test "x$debug_usb_io" = "xyes"], [
|
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|
@ -776,7 +763,7 @@ AS_IF([test "x${gcc_werror}" = "xyes"], [
|
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GCC_WARNINGS="${GCC_WARNINGS} -Werror"
|
||||
])
|
||||
|
||||
# overide default gcc cflags
|
||||
# override default gcc cflags
|
||||
AS_IF([test "x$gcc_warnings" = "xyes"], [
|
||||
AC_SUBST([GCC_WARNINGS], [$GCC_WARNINGS])
|
||||
])
|
||||
|
|
|
@ -109,6 +109,8 @@ ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1015", MODE="660", GROUP="plugdev",
|
|||
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1016", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1017", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1018", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1051", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
ATTRS{idVendor}=="1366", ATTRS{idProduct}=="1061", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
|
||||
# Raisonance RLink
|
||||
ATTRS{idVendor}=="138e", ATTRS{idProduct}=="9000", MODE="660", GROUP="plugdev", TAG+="uaccess"
|
||||
|
|
|
@ -6,25 +6,41 @@ ARM_OBJCOPY ?= $(ARM_CROSS_COMPILE)objcopy
|
|||
|
||||
ARM_AFLAGS = -EL
|
||||
|
||||
RISCV_CROSS_COMPILE ?= riscv64-unknown-elf-
|
||||
RISCV_CC ?= $(RISCV_CROSS_COMPILE)gcc
|
||||
RISCV_OBJCOPY ?= $(RISCV_CROSS_COMPILE)objcopy
|
||||
RISCV32_CFLAGS = -march=rv32e -mabi=ilp32e -nostdlib -nostartfiles -Os -fPIC
|
||||
RISCV64_CFLAGS = -march=rv64i -mabi=lp64 -nostdlib -nostartfiles -Os -fPIC
|
||||
|
||||
all: arm riscv
|
||||
|
||||
arm: armv4_5_crc.inc armv7m_crc.inc
|
||||
|
||||
riscv: riscv32_crc.inc riscv64_crc.inc
|
||||
|
||||
armv4_5_%.elf: armv4_5_%.s
|
||||
$(ARM_AS) $(ARM_AFLAGS) $< -o $@
|
||||
|
||||
armv4_5_%.bin: armv4_5_%.elf
|
||||
$(ARM_OBJCOPY) -Obinary $< $@
|
||||
|
||||
armv4_5_%.inc: armv4_5_%.bin
|
||||
$(BIN2C) < $< > $@
|
||||
|
||||
armv7m_%.elf: armv7m_%.s
|
||||
$(ARM_AS) $(ARM_AFLAGS) $< -o $@
|
||||
|
||||
armv7m_%.bin: armv7m_%.elf
|
||||
$(ARM_OBJCOPY) -Obinary $< $@
|
||||
|
||||
armv7m_%.inc: armv7m_%.bin
|
||||
%.inc: %.bin
|
||||
$(BIN2C) < $< > $@
|
||||
|
||||
riscv32_%.elf: riscv_%.c
|
||||
$(RISCV_CC) $(RISCV32_CFLAGS) $< -o $@
|
||||
|
||||
riscv64_%.elf: riscv_%.c
|
||||
$(RISCV_CC) $(RISCV64_CFLAGS) $< -o $@
|
||||
|
||||
riscv%.bin: riscv%.elf
|
||||
$(RISCV_OBJCOPY) -Obinary $< $@
|
||||
|
||||
clean:
|
||||
-rm -f *.elf *.bin *.inc
|
||||
|
|
|
@ -0,0 +1,70 @@
|
|||
/* Autogenerated with ../../../src/helper/bin2char.sh */
|
||||
0xb3,0x05,0xb5,0x00,0x93,0x07,0xf0,0xff,0x17,0x07,0x00,0x00,0x13,0x07,0x47,0x04,
|
||||
0x63,0x1a,0xb5,0x00,0x13,0x85,0x07,0x00,0x73,0x00,0x10,0x00,0x13,0x85,0x07,0x00,
|
||||
0x67,0x80,0x00,0x00,0x03,0x46,0x05,0x00,0x93,0x96,0x87,0x00,0x93,0xd7,0x87,0x01,
|
||||
0xb3,0xc7,0xc7,0x00,0x93,0x97,0x27,0x00,0xb3,0x07,0xf7,0x00,0x83,0xa7,0x07,0x00,
|
||||
0x13,0x05,0x15,0x00,0xb3,0xc7,0xf6,0x00,0x6f,0xf0,0x9f,0xfc,0x00,0x00,0x00,0x00,
|
||||
0xb7,0x1d,0xc1,0x04,0x6e,0x3b,0x82,0x09,0xd9,0x26,0x43,0x0d,0xdc,0x76,0x04,0x13,
|
||||
0x6b,0x6b,0xc5,0x17,0xb2,0x4d,0x86,0x1a,0x05,0x50,0x47,0x1e,0xb8,0xed,0x08,0x26,
|
||||
0x0f,0xf0,0xc9,0x22,0xd6,0xd6,0x8a,0x2f,0x61,0xcb,0x4b,0x2b,0x64,0x9b,0x0c,0x35,
|
||||
0xd3,0x86,0xcd,0x31,0x0a,0xa0,0x8e,0x3c,0xbd,0xbd,0x4f,0x38,0x70,0xdb,0x11,0x4c,
|
||||
0xc7,0xc6,0xd0,0x48,0x1e,0xe0,0x93,0x45,0xa9,0xfd,0x52,0x41,0xac,0xad,0x15,0x5f,
|
||||
0x1b,0xb0,0xd4,0x5b,0xc2,0x96,0x97,0x56,0x75,0x8b,0x56,0x52,0xc8,0x36,0x19,0x6a,
|
||||
0x7f,0x2b,0xd8,0x6e,0xa6,0x0d,0x9b,0x63,0x11,0x10,0x5a,0x67,0x14,0x40,0x1d,0x79,
|
||||
0xa3,0x5d,0xdc,0x7d,0x7a,0x7b,0x9f,0x70,0xcd,0x66,0x5e,0x74,0xe0,0xb6,0x23,0x98,
|
||||
0x57,0xab,0xe2,0x9c,0x8e,0x8d,0xa1,0x91,0x39,0x90,0x60,0x95,0x3c,0xc0,0x27,0x8b,
|
||||
0x8b,0xdd,0xe6,0x8f,0x52,0xfb,0xa5,0x82,0xe5,0xe6,0x64,0x86,0x58,0x5b,0x2b,0xbe,
|
||||
0xef,0x46,0xea,0xba,0x36,0x60,0xa9,0xb7,0x81,0x7d,0x68,0xb3,0x84,0x2d,0x2f,0xad,
|
||||
0x33,0x30,0xee,0xa9,0xea,0x16,0xad,0xa4,0x5d,0x0b,0x6c,0xa0,0x90,0x6d,0x32,0xd4,
|
||||
0x27,0x70,0xf3,0xd0,0xfe,0x56,0xb0,0xdd,0x49,0x4b,0x71,0xd9,0x4c,0x1b,0x36,0xc7,
|
||||
0xfb,0x06,0xf7,0xc3,0x22,0x20,0xb4,0xce,0x95,0x3d,0x75,0xca,0x28,0x80,0x3a,0xf2,
|
||||
0x9f,0x9d,0xfb,0xf6,0x46,0xbb,0xb8,0xfb,0xf1,0xa6,0x79,0xff,0xf4,0xf6,0x3e,0xe1,
|
||||
0x43,0xeb,0xff,0xe5,0x9a,0xcd,0xbc,0xe8,0x2d,0xd0,0x7d,0xec,0x77,0x70,0x86,0x34,
|
||||
0xc0,0x6d,0x47,0x30,0x19,0x4b,0x04,0x3d,0xae,0x56,0xc5,0x39,0xab,0x06,0x82,0x27,
|
||||
0x1c,0x1b,0x43,0x23,0xc5,0x3d,0x00,0x2e,0x72,0x20,0xc1,0x2a,0xcf,0x9d,0x8e,0x12,
|
||||
0x78,0x80,0x4f,0x16,0xa1,0xa6,0x0c,0x1b,0x16,0xbb,0xcd,0x1f,0x13,0xeb,0x8a,0x01,
|
||||
0xa4,0xf6,0x4b,0x05,0x7d,0xd0,0x08,0x08,0xca,0xcd,0xc9,0x0c,0x07,0xab,0x97,0x78,
|
||||
0xb0,0xb6,0x56,0x7c,0x69,0x90,0x15,0x71,0xde,0x8d,0xd4,0x75,0xdb,0xdd,0x93,0x6b,
|
||||
0x6c,0xc0,0x52,0x6f,0xb5,0xe6,0x11,0x62,0x02,0xfb,0xd0,0x66,0xbf,0x46,0x9f,0x5e,
|
||||
0x08,0x5b,0x5e,0x5a,0xd1,0x7d,0x1d,0x57,0x66,0x60,0xdc,0x53,0x63,0x30,0x9b,0x4d,
|
||||
0xd4,0x2d,0x5a,0x49,0x0d,0x0b,0x19,0x44,0xba,0x16,0xd8,0x40,0x97,0xc6,0xa5,0xac,
|
||||
0x20,0xdb,0x64,0xa8,0xf9,0xfd,0x27,0xa5,0x4e,0xe0,0xe6,0xa1,0x4b,0xb0,0xa1,0xbf,
|
||||
0xfc,0xad,0x60,0xbb,0x25,0x8b,0x23,0xb6,0x92,0x96,0xe2,0xb2,0x2f,0x2b,0xad,0x8a,
|
||||
0x98,0x36,0x6c,0x8e,0x41,0x10,0x2f,0x83,0xf6,0x0d,0xee,0x87,0xf3,0x5d,0xa9,0x99,
|
||||
0x44,0x40,0x68,0x9d,0x9d,0x66,0x2b,0x90,0x2a,0x7b,0xea,0x94,0xe7,0x1d,0xb4,0xe0,
|
||||
0x50,0x00,0x75,0xe4,0x89,0x26,0x36,0xe9,0x3e,0x3b,0xf7,0xed,0x3b,0x6b,0xb0,0xf3,
|
||||
0x8c,0x76,0x71,0xf7,0x55,0x50,0x32,0xfa,0xe2,0x4d,0xf3,0xfe,0x5f,0xf0,0xbc,0xc6,
|
||||
0xe8,0xed,0x7d,0xc2,0x31,0xcb,0x3e,0xcf,0x86,0xd6,0xff,0xcb,0x83,0x86,0xb8,0xd5,
|
||||
0x34,0x9b,0x79,0xd1,0xed,0xbd,0x3a,0xdc,0x5a,0xa0,0xfb,0xd8,0xee,0xe0,0x0c,0x69,
|
||||
0x59,0xfd,0xcd,0x6d,0x80,0xdb,0x8e,0x60,0x37,0xc6,0x4f,0x64,0x32,0x96,0x08,0x7a,
|
||||
0x85,0x8b,0xc9,0x7e,0x5c,0xad,0x8a,0x73,0xeb,0xb0,0x4b,0x77,0x56,0x0d,0x04,0x4f,
|
||||
0xe1,0x10,0xc5,0x4b,0x38,0x36,0x86,0x46,0x8f,0x2b,0x47,0x42,0x8a,0x7b,0x00,0x5c,
|
||||
0x3d,0x66,0xc1,0x58,0xe4,0x40,0x82,0x55,0x53,0x5d,0x43,0x51,0x9e,0x3b,0x1d,0x25,
|
||||
0x29,0x26,0xdc,0x21,0xf0,0x00,0x9f,0x2c,0x47,0x1d,0x5e,0x28,0x42,0x4d,0x19,0x36,
|
||||
0xf5,0x50,0xd8,0x32,0x2c,0x76,0x9b,0x3f,0x9b,0x6b,0x5a,0x3b,0x26,0xd6,0x15,0x03,
|
||||
0x91,0xcb,0xd4,0x07,0x48,0xed,0x97,0x0a,0xff,0xf0,0x56,0x0e,0xfa,0xa0,0x11,0x10,
|
||||
0x4d,0xbd,0xd0,0x14,0x94,0x9b,0x93,0x19,0x23,0x86,0x52,0x1d,0x0e,0x56,0x2f,0xf1,
|
||||
0xb9,0x4b,0xee,0xf5,0x60,0x6d,0xad,0xf8,0xd7,0x70,0x6c,0xfc,0xd2,0x20,0x2b,0xe2,
|
||||
0x65,0x3d,0xea,0xe6,0xbc,0x1b,0xa9,0xeb,0x0b,0x06,0x68,0xef,0xb6,0xbb,0x27,0xd7,
|
||||
0x01,0xa6,0xe6,0xd3,0xd8,0x80,0xa5,0xde,0x6f,0x9d,0x64,0xda,0x6a,0xcd,0x23,0xc4,
|
||||
0xdd,0xd0,0xe2,0xc0,0x04,0xf6,0xa1,0xcd,0xb3,0xeb,0x60,0xc9,0x7e,0x8d,0x3e,0xbd,
|
||||
0xc9,0x90,0xff,0xb9,0x10,0xb6,0xbc,0xb4,0xa7,0xab,0x7d,0xb0,0xa2,0xfb,0x3a,0xae,
|
||||
0x15,0xe6,0xfb,0xaa,0xcc,0xc0,0xb8,0xa7,0x7b,0xdd,0x79,0xa3,0xc6,0x60,0x36,0x9b,
|
||||
0x71,0x7d,0xf7,0x9f,0xa8,0x5b,0xb4,0x92,0x1f,0x46,0x75,0x96,0x1a,0x16,0x32,0x88,
|
||||
0xad,0x0b,0xf3,0x8c,0x74,0x2d,0xb0,0x81,0xc3,0x30,0x71,0x85,0x99,0x90,0x8a,0x5d,
|
||||
0x2e,0x8d,0x4b,0x59,0xf7,0xab,0x08,0x54,0x40,0xb6,0xc9,0x50,0x45,0xe6,0x8e,0x4e,
|
||||
0xf2,0xfb,0x4f,0x4a,0x2b,0xdd,0x0c,0x47,0x9c,0xc0,0xcd,0x43,0x21,0x7d,0x82,0x7b,
|
||||
0x96,0x60,0x43,0x7f,0x4f,0x46,0x00,0x72,0xf8,0x5b,0xc1,0x76,0xfd,0x0b,0x86,0x68,
|
||||
0x4a,0x16,0x47,0x6c,0x93,0x30,0x04,0x61,0x24,0x2d,0xc5,0x65,0xe9,0x4b,0x9b,0x11,
|
||||
0x5e,0x56,0x5a,0x15,0x87,0x70,0x19,0x18,0x30,0x6d,0xd8,0x1c,0x35,0x3d,0x9f,0x02,
|
||||
0x82,0x20,0x5e,0x06,0x5b,0x06,0x1d,0x0b,0xec,0x1b,0xdc,0x0f,0x51,0xa6,0x93,0x37,
|
||||
0xe6,0xbb,0x52,0x33,0x3f,0x9d,0x11,0x3e,0x88,0x80,0xd0,0x3a,0x8d,0xd0,0x97,0x24,
|
||||
0x3a,0xcd,0x56,0x20,0xe3,0xeb,0x15,0x2d,0x54,0xf6,0xd4,0x29,0x79,0x26,0xa9,0xc5,
|
||||
0xce,0x3b,0x68,0xc1,0x17,0x1d,0x2b,0xcc,0xa0,0x00,0xea,0xc8,0xa5,0x50,0xad,0xd6,
|
||||
0x12,0x4d,0x6c,0xd2,0xcb,0x6b,0x2f,0xdf,0x7c,0x76,0xee,0xdb,0xc1,0xcb,0xa1,0xe3,
|
||||
0x76,0xd6,0x60,0xe7,0xaf,0xf0,0x23,0xea,0x18,0xed,0xe2,0xee,0x1d,0xbd,0xa5,0xf0,
|
||||
0xaa,0xa0,0x64,0xf4,0x73,0x86,0x27,0xf9,0xc4,0x9b,0xe6,0xfd,0x09,0xfd,0xb8,0x89,
|
||||
0xbe,0xe0,0x79,0x8d,0x67,0xc6,0x3a,0x80,0xd0,0xdb,0xfb,0x84,0xd5,0x8b,0xbc,0x9a,
|
||||
0x62,0x96,0x7d,0x9e,0xbb,0xb0,0x3e,0x93,0x0c,0xad,0xff,0x97,0xb1,0x10,0xb0,0xaf,
|
||||
0x06,0x0d,0x71,0xab,0xdf,0x2b,0x32,0xa6,0x68,0x36,0xf3,0xa2,0x6d,0x66,0xb4,0xbc,
|
||||
0xda,0x7b,0x75,0xb8,0x03,0x5d,0x36,0xb5,0xb4,0x40,0xf7,0xb1,
|
|
@ -0,0 +1,71 @@
|
|||
/* Autogenerated with ../../../src/helper/bin2char.sh */
|
||||
0x93,0x07,0xf0,0xff,0x93,0x06,0xf0,0xff,0x17,0x06,0x00,0x00,0x13,0x06,0x06,0x05,
|
||||
0x9b,0x85,0xf5,0xff,0x63,0x9a,0xd5,0x00,0x13,0x85,0x07,0x00,0x73,0x00,0x10,0x00,
|
||||
0x13,0x85,0x07,0x00,0x67,0x80,0x00,0x00,0x83,0x48,0x05,0x00,0x1b,0xd7,0x87,0x01,
|
||||
0x1b,0x98,0x87,0x00,0x33,0x47,0x17,0x01,0x13,0x17,0x27,0x00,0x33,0x07,0xe6,0x00,
|
||||
0x83,0x27,0x07,0x00,0x13,0x05,0x15,0x00,0xb3,0xc7,0x07,0x01,0x9b,0x87,0x07,0x00,
|
||||
0x6f,0xf0,0x1f,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xb7,0x1d,0xc1,0x04,
|
||||
0x6e,0x3b,0x82,0x09,0xd9,0x26,0x43,0x0d,0xdc,0x76,0x04,0x13,0x6b,0x6b,0xc5,0x17,
|
||||
0xb2,0x4d,0x86,0x1a,0x05,0x50,0x47,0x1e,0xb8,0xed,0x08,0x26,0x0f,0xf0,0xc9,0x22,
|
||||
0xd6,0xd6,0x8a,0x2f,0x61,0xcb,0x4b,0x2b,0x64,0x9b,0x0c,0x35,0xd3,0x86,0xcd,0x31,
|
||||
0x0a,0xa0,0x8e,0x3c,0xbd,0xbd,0x4f,0x38,0x70,0xdb,0x11,0x4c,0xc7,0xc6,0xd0,0x48,
|
||||
0x1e,0xe0,0x93,0x45,0xa9,0xfd,0x52,0x41,0xac,0xad,0x15,0x5f,0x1b,0xb0,0xd4,0x5b,
|
||||
0xc2,0x96,0x97,0x56,0x75,0x8b,0x56,0x52,0xc8,0x36,0x19,0x6a,0x7f,0x2b,0xd8,0x6e,
|
||||
0xa6,0x0d,0x9b,0x63,0x11,0x10,0x5a,0x67,0x14,0x40,0x1d,0x79,0xa3,0x5d,0xdc,0x7d,
|
||||
0x7a,0x7b,0x9f,0x70,0xcd,0x66,0x5e,0x74,0xe0,0xb6,0x23,0x98,0x57,0xab,0xe2,0x9c,
|
||||
0x8e,0x8d,0xa1,0x91,0x39,0x90,0x60,0x95,0x3c,0xc0,0x27,0x8b,0x8b,0xdd,0xe6,0x8f,
|
||||
0x52,0xfb,0xa5,0x82,0xe5,0xe6,0x64,0x86,0x58,0x5b,0x2b,0xbe,0xef,0x46,0xea,0xba,
|
||||
0x36,0x60,0xa9,0xb7,0x81,0x7d,0x68,0xb3,0x84,0x2d,0x2f,0xad,0x33,0x30,0xee,0xa9,
|
||||
0xea,0x16,0xad,0xa4,0x5d,0x0b,0x6c,0xa0,0x90,0x6d,0x32,0xd4,0x27,0x70,0xf3,0xd0,
|
||||
0xfe,0x56,0xb0,0xdd,0x49,0x4b,0x71,0xd9,0x4c,0x1b,0x36,0xc7,0xfb,0x06,0xf7,0xc3,
|
||||
0x22,0x20,0xb4,0xce,0x95,0x3d,0x75,0xca,0x28,0x80,0x3a,0xf2,0x9f,0x9d,0xfb,0xf6,
|
||||
0x46,0xbb,0xb8,0xfb,0xf1,0xa6,0x79,0xff,0xf4,0xf6,0x3e,0xe1,0x43,0xeb,0xff,0xe5,
|
||||
0x9a,0xcd,0xbc,0xe8,0x2d,0xd0,0x7d,0xec,0x77,0x70,0x86,0x34,0xc0,0x6d,0x47,0x30,
|
||||
0x19,0x4b,0x04,0x3d,0xae,0x56,0xc5,0x39,0xab,0x06,0x82,0x27,0x1c,0x1b,0x43,0x23,
|
||||
0xc5,0x3d,0x00,0x2e,0x72,0x20,0xc1,0x2a,0xcf,0x9d,0x8e,0x12,0x78,0x80,0x4f,0x16,
|
||||
0xa1,0xa6,0x0c,0x1b,0x16,0xbb,0xcd,0x1f,0x13,0xeb,0x8a,0x01,0xa4,0xf6,0x4b,0x05,
|
||||
0x7d,0xd0,0x08,0x08,0xca,0xcd,0xc9,0x0c,0x07,0xab,0x97,0x78,0xb0,0xb6,0x56,0x7c,
|
||||
0x69,0x90,0x15,0x71,0xde,0x8d,0xd4,0x75,0xdb,0xdd,0x93,0x6b,0x6c,0xc0,0x52,0x6f,
|
||||
0xb5,0xe6,0x11,0x62,0x02,0xfb,0xd0,0x66,0xbf,0x46,0x9f,0x5e,0x08,0x5b,0x5e,0x5a,
|
||||
0xd1,0x7d,0x1d,0x57,0x66,0x60,0xdc,0x53,0x63,0x30,0x9b,0x4d,0xd4,0x2d,0x5a,0x49,
|
||||
0x0d,0x0b,0x19,0x44,0xba,0x16,0xd8,0x40,0x97,0xc6,0xa5,0xac,0x20,0xdb,0x64,0xa8,
|
||||
0xf9,0xfd,0x27,0xa5,0x4e,0xe0,0xe6,0xa1,0x4b,0xb0,0xa1,0xbf,0xfc,0xad,0x60,0xbb,
|
||||
0x25,0x8b,0x23,0xb6,0x92,0x96,0xe2,0xb2,0x2f,0x2b,0xad,0x8a,0x98,0x36,0x6c,0x8e,
|
||||
0x41,0x10,0x2f,0x83,0xf6,0x0d,0xee,0x87,0xf3,0x5d,0xa9,0x99,0x44,0x40,0x68,0x9d,
|
||||
0x9d,0x66,0x2b,0x90,0x2a,0x7b,0xea,0x94,0xe7,0x1d,0xb4,0xe0,0x50,0x00,0x75,0xe4,
|
||||
0x89,0x26,0x36,0xe9,0x3e,0x3b,0xf7,0xed,0x3b,0x6b,0xb0,0xf3,0x8c,0x76,0x71,0xf7,
|
||||
0x55,0x50,0x32,0xfa,0xe2,0x4d,0xf3,0xfe,0x5f,0xf0,0xbc,0xc6,0xe8,0xed,0x7d,0xc2,
|
||||
0x31,0xcb,0x3e,0xcf,0x86,0xd6,0xff,0xcb,0x83,0x86,0xb8,0xd5,0x34,0x9b,0x79,0xd1,
|
||||
0xed,0xbd,0x3a,0xdc,0x5a,0xa0,0xfb,0xd8,0xee,0xe0,0x0c,0x69,0x59,0xfd,0xcd,0x6d,
|
||||
0x80,0xdb,0x8e,0x60,0x37,0xc6,0x4f,0x64,0x32,0x96,0x08,0x7a,0x85,0x8b,0xc9,0x7e,
|
||||
0x5c,0xad,0x8a,0x73,0xeb,0xb0,0x4b,0x77,0x56,0x0d,0x04,0x4f,0xe1,0x10,0xc5,0x4b,
|
||||
0x38,0x36,0x86,0x46,0x8f,0x2b,0x47,0x42,0x8a,0x7b,0x00,0x5c,0x3d,0x66,0xc1,0x58,
|
||||
0xe4,0x40,0x82,0x55,0x53,0x5d,0x43,0x51,0x9e,0x3b,0x1d,0x25,0x29,0x26,0xdc,0x21,
|
||||
0xf0,0x00,0x9f,0x2c,0x47,0x1d,0x5e,0x28,0x42,0x4d,0x19,0x36,0xf5,0x50,0xd8,0x32,
|
||||
0x2c,0x76,0x9b,0x3f,0x9b,0x6b,0x5a,0x3b,0x26,0xd6,0x15,0x03,0x91,0xcb,0xd4,0x07,
|
||||
0x48,0xed,0x97,0x0a,0xff,0xf0,0x56,0x0e,0xfa,0xa0,0x11,0x10,0x4d,0xbd,0xd0,0x14,
|
||||
0x94,0x9b,0x93,0x19,0x23,0x86,0x52,0x1d,0x0e,0x56,0x2f,0xf1,0xb9,0x4b,0xee,0xf5,
|
||||
0x60,0x6d,0xad,0xf8,0xd7,0x70,0x6c,0xfc,0xd2,0x20,0x2b,0xe2,0x65,0x3d,0xea,0xe6,
|
||||
0xbc,0x1b,0xa9,0xeb,0x0b,0x06,0x68,0xef,0xb6,0xbb,0x27,0xd7,0x01,0xa6,0xe6,0xd3,
|
||||
0xd8,0x80,0xa5,0xde,0x6f,0x9d,0x64,0xda,0x6a,0xcd,0x23,0xc4,0xdd,0xd0,0xe2,0xc0,
|
||||
0x04,0xf6,0xa1,0xcd,0xb3,0xeb,0x60,0xc9,0x7e,0x8d,0x3e,0xbd,0xc9,0x90,0xff,0xb9,
|
||||
0x10,0xb6,0xbc,0xb4,0xa7,0xab,0x7d,0xb0,0xa2,0xfb,0x3a,0xae,0x15,0xe6,0xfb,0xaa,
|
||||
0xcc,0xc0,0xb8,0xa7,0x7b,0xdd,0x79,0xa3,0xc6,0x60,0x36,0x9b,0x71,0x7d,0xf7,0x9f,
|
||||
0xa8,0x5b,0xb4,0x92,0x1f,0x46,0x75,0x96,0x1a,0x16,0x32,0x88,0xad,0x0b,0xf3,0x8c,
|
||||
0x74,0x2d,0xb0,0x81,0xc3,0x30,0x71,0x85,0x99,0x90,0x8a,0x5d,0x2e,0x8d,0x4b,0x59,
|
||||
0xf7,0xab,0x08,0x54,0x40,0xb6,0xc9,0x50,0x45,0xe6,0x8e,0x4e,0xf2,0xfb,0x4f,0x4a,
|
||||
0x2b,0xdd,0x0c,0x47,0x9c,0xc0,0xcd,0x43,0x21,0x7d,0x82,0x7b,0x96,0x60,0x43,0x7f,
|
||||
0x4f,0x46,0x00,0x72,0xf8,0x5b,0xc1,0x76,0xfd,0x0b,0x86,0x68,0x4a,0x16,0x47,0x6c,
|
||||
0x93,0x30,0x04,0x61,0x24,0x2d,0xc5,0x65,0xe9,0x4b,0x9b,0x11,0x5e,0x56,0x5a,0x15,
|
||||
0x87,0x70,0x19,0x18,0x30,0x6d,0xd8,0x1c,0x35,0x3d,0x9f,0x02,0x82,0x20,0x5e,0x06,
|
||||
0x5b,0x06,0x1d,0x0b,0xec,0x1b,0xdc,0x0f,0x51,0xa6,0x93,0x37,0xe6,0xbb,0x52,0x33,
|
||||
0x3f,0x9d,0x11,0x3e,0x88,0x80,0xd0,0x3a,0x8d,0xd0,0x97,0x24,0x3a,0xcd,0x56,0x20,
|
||||
0xe3,0xeb,0x15,0x2d,0x54,0xf6,0xd4,0x29,0x79,0x26,0xa9,0xc5,0xce,0x3b,0x68,0xc1,
|
||||
0x17,0x1d,0x2b,0xcc,0xa0,0x00,0xea,0xc8,0xa5,0x50,0xad,0xd6,0x12,0x4d,0x6c,0xd2,
|
||||
0xcb,0x6b,0x2f,0xdf,0x7c,0x76,0xee,0xdb,0xc1,0xcb,0xa1,0xe3,0x76,0xd6,0x60,0xe7,
|
||||
0xaf,0xf0,0x23,0xea,0x18,0xed,0xe2,0xee,0x1d,0xbd,0xa5,0xf0,0xaa,0xa0,0x64,0xf4,
|
||||
0x73,0x86,0x27,0xf9,0xc4,0x9b,0xe6,0xfd,0x09,0xfd,0xb8,0x89,0xbe,0xe0,0x79,0x8d,
|
||||
0x67,0xc6,0x3a,0x80,0xd0,0xdb,0xfb,0x84,0xd5,0x8b,0xbc,0x9a,0x62,0x96,0x7d,0x9e,
|
||||
0xbb,0xb0,0x3e,0x93,0x0c,0xad,0xff,0x97,0xb1,0x10,0xb0,0xaf,0x06,0x0d,0x71,0xab,
|
||||
0xdf,0x2b,0x32,0xa6,0x68,0x36,0xf3,0xa2,0x6d,0x66,0xb4,0xbc,0xda,0x7b,0x75,0xb8,
|
||||
0x03,0x5d,0x36,0xb5,0xb4,0x40,0xf7,0xb1,
|
|
@ -0,0 +1,135 @@
|
|||
/* Copied from https://github.com/gcc-mirror/gcc/blob/master/libiberty/crc32.c
|
||||
* and then tweaked a little. */
|
||||
|
||||
/* This table was generated by the following program.
|
||||
#include <stdio.h>
|
||||
int
|
||||
main ()
|
||||
{
|
||||
unsigned int i, j;
|
||||
unsigned int c;
|
||||
int table[256];
|
||||
for (i = 0; i < 256; i++)
|
||||
{
|
||||
for (c = i << 24, j = 8; j > 0; --j)
|
||||
c = c & 0x80000000 ? (c << 1) ^ 0x04c11db7 : (c << 1);
|
||||
table[i] = c;
|
||||
}
|
||||
printf ("static const unsigned int crc32_table[] =\n{\n");
|
||||
for (i = 0; i < 256; i += 4)
|
||||
{
|
||||
printf (" 0x%08x, 0x%08x, 0x%08x, 0x%08x",
|
||||
table[i + 0], table[i + 1], table[i + 2], table[i + 3]);
|
||||
if (i + 4 < 256)
|
||||
putchar (',');
|
||||
putchar ('\n');
|
||||
}
|
||||
printf ("};\n");
|
||||
return 0;
|
||||
}
|
||||
For more information on CRC, see, e.g.,
|
||||
http://www.ross.net/crc/download/crc_v3.txt. */
|
||||
|
||||
static const unsigned int crc32_table[] = {
|
||||
0x00000000, 0x04c11db7, 0x09823b6e, 0x0d4326d9,
|
||||
0x130476dc, 0x17c56b6b, 0x1a864db2, 0x1e475005,
|
||||
0x2608edb8, 0x22c9f00f, 0x2f8ad6d6, 0x2b4bcb61,
|
||||
0x350c9b64, 0x31cd86d3, 0x3c8ea00a, 0x384fbdbd,
|
||||
0x4c11db70, 0x48d0c6c7, 0x4593e01e, 0x4152fda9,
|
||||
0x5f15adac, 0x5bd4b01b, 0x569796c2, 0x52568b75,
|
||||
0x6a1936c8, 0x6ed82b7f, 0x639b0da6, 0x675a1011,
|
||||
0x791d4014, 0x7ddc5da3, 0x709f7b7a, 0x745e66cd,
|
||||
0x9823b6e0, 0x9ce2ab57, 0x91a18d8e, 0x95609039,
|
||||
0x8b27c03c, 0x8fe6dd8b, 0x82a5fb52, 0x8664e6e5,
|
||||
0xbe2b5b58, 0xbaea46ef, 0xb7a96036, 0xb3687d81,
|
||||
0xad2f2d84, 0xa9ee3033, 0xa4ad16ea, 0xa06c0b5d,
|
||||
0xd4326d90, 0xd0f37027, 0xddb056fe, 0xd9714b49,
|
||||
0xc7361b4c, 0xc3f706fb, 0xceb42022, 0xca753d95,
|
||||
0xf23a8028, 0xf6fb9d9f, 0xfbb8bb46, 0xff79a6f1,
|
||||
0xe13ef6f4, 0xe5ffeb43, 0xe8bccd9a, 0xec7dd02d,
|
||||
0x34867077, 0x30476dc0, 0x3d044b19, 0x39c556ae,
|
||||
0x278206ab, 0x23431b1c, 0x2e003dc5, 0x2ac12072,
|
||||
0x128e9dcf, 0x164f8078, 0x1b0ca6a1, 0x1fcdbb16,
|
||||
0x018aeb13, 0x054bf6a4, 0x0808d07d, 0x0cc9cdca,
|
||||
0x7897ab07, 0x7c56b6b0, 0x71159069, 0x75d48dde,
|
||||
0x6b93dddb, 0x6f52c06c, 0x6211e6b5, 0x66d0fb02,
|
||||
0x5e9f46bf, 0x5a5e5b08, 0x571d7dd1, 0x53dc6066,
|
||||
0x4d9b3063, 0x495a2dd4, 0x44190b0d, 0x40d816ba,
|
||||
0xaca5c697, 0xa864db20, 0xa527fdf9, 0xa1e6e04e,
|
||||
0xbfa1b04b, 0xbb60adfc, 0xb6238b25, 0xb2e29692,
|
||||
0x8aad2b2f, 0x8e6c3698, 0x832f1041, 0x87ee0df6,
|
||||
0x99a95df3, 0x9d684044, 0x902b669d, 0x94ea7b2a,
|
||||
0xe0b41de7, 0xe4750050, 0xe9362689, 0xedf73b3e,
|
||||
0xf3b06b3b, 0xf771768c, 0xfa325055, 0xfef34de2,
|
||||
0xc6bcf05f, 0xc27dede8, 0xcf3ecb31, 0xcbffd686,
|
||||
0xd5b88683, 0xd1799b34, 0xdc3abded, 0xd8fba05a,
|
||||
0x690ce0ee, 0x6dcdfd59, 0x608edb80, 0x644fc637,
|
||||
0x7a089632, 0x7ec98b85, 0x738aad5c, 0x774bb0eb,
|
||||
0x4f040d56, 0x4bc510e1, 0x46863638, 0x42472b8f,
|
||||
0x5c007b8a, 0x58c1663d, 0x558240e4, 0x51435d53,
|
||||
0x251d3b9e, 0x21dc2629, 0x2c9f00f0, 0x285e1d47,
|
||||
0x36194d42, 0x32d850f5, 0x3f9b762c, 0x3b5a6b9b,
|
||||
0x0315d626, 0x07d4cb91, 0x0a97ed48, 0x0e56f0ff,
|
||||
0x1011a0fa, 0x14d0bd4d, 0x19939b94, 0x1d528623,
|
||||
0xf12f560e, 0xf5ee4bb9, 0xf8ad6d60, 0xfc6c70d7,
|
||||
0xe22b20d2, 0xe6ea3d65, 0xeba91bbc, 0xef68060b,
|
||||
0xd727bbb6, 0xd3e6a601, 0xdea580d8, 0xda649d6f,
|
||||
0xc423cd6a, 0xc0e2d0dd, 0xcda1f604, 0xc960ebb3,
|
||||
0xbd3e8d7e, 0xb9ff90c9, 0xb4bcb610, 0xb07daba7,
|
||||
0xae3afba2, 0xaafbe615, 0xa7b8c0cc, 0xa379dd7b,
|
||||
0x9b3660c6, 0x9ff77d71, 0x92b45ba8, 0x9675461f,
|
||||
0x8832161a, 0x8cf30bad, 0x81b02d74, 0x857130c3,
|
||||
0x5d8a9099, 0x594b8d2e, 0x5408abf7, 0x50c9b640,
|
||||
0x4e8ee645, 0x4a4ffbf2, 0x470cdd2b, 0x43cdc09c,
|
||||
0x7b827d21, 0x7f436096, 0x7200464f, 0x76c15bf8,
|
||||
0x68860bfd, 0x6c47164a, 0x61043093, 0x65c52d24,
|
||||
0x119b4be9, 0x155a565e, 0x18197087, 0x1cd86d30,
|
||||
0x029f3d35, 0x065e2082, 0x0b1d065b, 0x0fdc1bec,
|
||||
0x3793a651, 0x3352bbe6, 0x3e119d3f, 0x3ad08088,
|
||||
0x2497d08d, 0x2056cd3a, 0x2d15ebe3, 0x29d4f654,
|
||||
0xc5a92679, 0xc1683bce, 0xcc2b1d17, 0xc8ea00a0,
|
||||
0xd6ad50a5, 0xd26c4d12, 0xdf2f6bcb, 0xdbee767c,
|
||||
0xe3a1cbc1, 0xe760d676, 0xea23f0af, 0xeee2ed18,
|
||||
0xf0a5bd1d, 0xf464a0aa, 0xf9278673, 0xfde69bc4,
|
||||
0x89b8fd09, 0x8d79e0be, 0x803ac667, 0x84fbdbd0,
|
||||
0x9abc8bd5, 0x9e7d9662, 0x933eb0bb, 0x97ffad0c,
|
||||
0xafb010b1, 0xab710d06, 0xa6322bdf, 0xa2f33668,
|
||||
0xbcb4666d, 0xb8757bda, 0xb5365d03, 0xb1f740b4
|
||||
};
|
||||
|
||||
/*
|
||||
@deftypefn Extension {unsigned int} crc32 (const unsigned char *@var{buf}, @
|
||||
int @var{len}, unsigned int @var{init})
|
||||
Compute the 32-bit CRC of @var{buf} which has length @var{len}. The
|
||||
starting value is 0xffffffff.
|
||||
This is used by the @command{gdb} remote protocol for the @samp{qCRC}
|
||||
command.
|
||||
This CRC can be specified as:
|
||||
Width : 32
|
||||
Poly : 0x04c11db7
|
||||
Init : 0xffffffff
|
||||
RefIn : false
|
||||
RefOut : false
|
||||
XorOut : 0
|
||||
This differs from the "standard" CRC-32 algorithm in that the values
|
||||
are not reflected, and there is no final XOR value. These differences
|
||||
make it easy to compose the values of multiple blocks.
|
||||
@end deftypefn
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
unsigned int
|
||||
xcrc32(const unsigned char *buf, int len)
|
||||
{
|
||||
uint32_t crc = 0xffffffff;
|
||||
while (len--) {
|
||||
crc = (crc << 8) ^ crc32_table[((crc >> 24) ^ *buf) & 255];
|
||||
buf++;
|
||||
}
|
||||
asm("mv a0, %0;"
|
||||
"ebreak;"
|
||||
:
|
||||
: "r"(crc));
|
||||
return crc;
|
||||
}
|
|
@ -2,27 +2,50 @@ BIN2C = ../../../../src/helper/bin2char.sh
|
|||
|
||||
CROSS_COMPILE ?= riscv64-unknown-elf-
|
||||
|
||||
CC=$(CROSS_COMPILE)gcc
|
||||
OBJCOPY=$(CROSS_COMPILE)objcopy
|
||||
OBJDUMP=$(CROSS_COMPILE)objdump
|
||||
RISCV_CC=$(CROSS_COMPILE)gcc
|
||||
RISCV_OBJCOPY=$(CROSS_COMPILE)objcopy
|
||||
RISCV_OBJDUMP=$(CROSS_COMPILE)objdump
|
||||
|
||||
CFLAGS = -march=rv32i -mabi=ilp32 -x assembler-with-cpp -nostdlib -nostartfiles
|
||||
CFLAGS = -nostdlib -nostartfiles -Wall -Werror -Os -fPIC -Wunused-result -g
|
||||
RISCV32_CFLAGS = -march=rv32e -mabi=ilp32e $(CFLAGS)
|
||||
RISCV64_CFLAGS = -march=rv64i -mabi=lp64 $(CFLAGS)
|
||||
|
||||
all: fespi.inc
|
||||
all: riscv32_fespi.inc riscv64_fespi.inc
|
||||
|
||||
.PHONY: clean
|
||||
|
||||
%.elf: %.S
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
# .c -> .o
|
||||
riscv32_%.o: riscv_%.c
|
||||
$(RISCV_CC) -c $(RISCV32_CFLAGS) $^ -o $@
|
||||
|
||||
%.lst: %.elf
|
||||
$(OBJDUMP) -S $< > $@
|
||||
riscv64_%.o: riscv_%.c
|
||||
$(RISCV_CC) -c $(RISCV64_CFLAGS) $< -o $@
|
||||
|
||||
# .S -> .o
|
||||
riscv32_%.o: riscv_%.S
|
||||
$(RISCV_CC) -c $(RISCV32_CFLAGS) $^ -o $@
|
||||
|
||||
riscv64_%.o: riscv_%.S
|
||||
$(RISCV_CC) -c $(RISCV64_CFLAGS) $^ -o $@
|
||||
|
||||
# .o -> .elf
|
||||
riscv32_%.elf: riscv32_%.o riscv32_wrapper.o
|
||||
$(RISCV_CC) -T riscv.lds $(RISCV32_CFLAGS) $^ -o $@
|
||||
|
||||
riscv64_%.elf: riscv64_%.o riscv64_wrapper.o
|
||||
$(RISCV_CC) -T riscv.lds $(RISCV64_CFLAGS) $^ -o $@
|
||||
|
||||
# .elf -> .bin
|
||||
%.bin: %.elf
|
||||
$(OBJCOPY) -Obinary $< $@
|
||||
$(RISCV_OBJCOPY) -Obinary $< $@
|
||||
|
||||
# .bin -> .inc
|
||||
%.inc: %.bin
|
||||
$(BIN2C) < $< > $@
|
||||
|
||||
# utility
|
||||
%.lst: %.elf
|
||||
$(RISCV_OBJDUMP) -S $< > $@
|
||||
|
||||
clean:
|
||||
-rm -f *.elf *.lst *.bin *.inc
|
||||
-rm -f *.elf *.o *.lst *.bin *.inc
|
||||
|
|
|
@ -1,99 +0,0 @@
|
|||
#define SPIFLASH_READ_STATUS 0x05 // Read Status Register
|
||||
#define SPIFLASH_BSY_BIT 0x00000001 // WIP Bit of SPI SR on SMI SR
|
||||
|
||||
// Register offsets
|
||||
#define FESPI_REG_FMT 0x40
|
||||
#define FESPI_REG_TXFIFO 0x48
|
||||
#define FESPI_REG_RXFIFO 0x4c
|
||||
#define FESPI_REG_IP 0x74
|
||||
|
||||
// Fields
|
||||
#define FESPI_IP_TXWM 0x1
|
||||
#define FESPI_FMT_DIR(x) (((x) & 0x1) << 3)
|
||||
|
||||
// To enter, jump to the start of command_table (ie. offset 0).
|
||||
// a0 - FESPI base address
|
||||
// a1 - start address of buffer
|
||||
|
||||
// The buffer contains a "program" in byte sequences. The first byte in a
|
||||
// sequence determines the operation. Some operation will read more data from
|
||||
// the program, while some will not. The operation byte is the offset into
|
||||
// command_table, so eg. 4 means exit, 8 means transmit, and so on.
|
||||
|
||||
.global _start
|
||||
_start:
|
||||
command_table:
|
||||
j main // 0
|
||||
ebreak // 4
|
||||
j tx // 8
|
||||
j txwm_wait // 12
|
||||
j write_reg // 16
|
||||
j wip_wait // 20
|
||||
j set_dir // 24
|
||||
|
||||
// Execute the program.
|
||||
main:
|
||||
lbu t0, 0(a1)
|
||||
addi a1, a1, 1
|
||||
la t1, command_table
|
||||
add t0, t0, t1
|
||||
jr t0
|
||||
|
||||
// Read 1 byte the contains the number of bytes to transmit. Then read those
|
||||
// bytes from the program and transmit them one by one.
|
||||
tx:
|
||||
lbu t1, 0(a1) // read number of bytes to transmit
|
||||
addi a1, a1, 1
|
||||
1: lw t0, FESPI_REG_TXFIFO(a0) // wait for FIFO clear
|
||||
bltz t0, 1b
|
||||
lbu t0, 0(a1) // Load byte to write
|
||||
sw t0, FESPI_REG_TXFIFO(a0)
|
||||
addi a1, a1, 1
|
||||
addi t1, t1, -1
|
||||
bgtz t1, 1b
|
||||
j main
|
||||
|
||||
// Wait until TXWM is set.
|
||||
txwm_wait:
|
||||
1: lw t0, FESPI_REG_IP(a0)
|
||||
andi t0, t0, FESPI_IP_TXWM
|
||||
beqz t0, 1b
|
||||
j main
|
||||
|
||||
// Read 1 byte that contains the offset of the register to write, and 1 byte
|
||||
// that contains the data to write.
|
||||
write_reg:
|
||||
lbu t0, 0(a1) // read register to write
|
||||
add t0, t0, a0
|
||||
lbu t1, 1(a1) // read value to write
|
||||
addi a1, a1, 2
|
||||
sw t1, 0(t0)
|
||||
j main
|
||||
|
||||
wip_wait:
|
||||
li a2, SPIFLASH_READ_STATUS
|
||||
jal txrx_byte
|
||||
// discard first result
|
||||
1: li a2, 0
|
||||
jal txrx_byte
|
||||
andi t0, a2, SPIFLASH_BSY_BIT
|
||||
bnez t0, 1b
|
||||
j main
|
||||
|
||||
txrx_byte: // transmit the byte in a2, receive a bit into a2
|
||||
lw t0, FESPI_REG_TXFIFO(a0) // wait for FIFO clear
|
||||
bltz t0, txrx_byte
|
||||
sw a2, FESPI_REG_TXFIFO(a0)
|
||||
1: lw a2, FESPI_REG_RXFIFO(a0)
|
||||
bltz a2, 1b
|
||||
ret
|
||||
|
||||
set_dir:
|
||||
lw t0, FESPI_REG_FMT(a0)
|
||||
li t1, ~(FESPI_FMT_DIR(0xFFFFFFFF))
|
||||
and t0, t0, t1
|
||||
lbu t1, 0(a1) // read value to OR in
|
||||
addi a1, a1, 1
|
||||
or t0, t0, t1
|
||||
sw t0, FESPI_REG_FMT(a0)
|
||||
j main
|
|
@ -1,15 +0,0 @@
|
|||
/* Autogenerated with ../../../../src/helper/bin2char.sh */
|
||||
0x6f,0x00,0xc0,0x01,0x73,0x00,0x10,0x00,0x6f,0x00,0xc0,0x02,0x6f,0x00,0x00,0x05,
|
||||
0x6f,0x00,0xc0,0x05,0x6f,0x00,0x00,0x07,0x6f,0x00,0x00,0x0a,0x83,0xc2,0x05,0x00,
|
||||
0x93,0x85,0x15,0x00,0x17,0x03,0x00,0x00,0x13,0x03,0xc3,0xfd,0xb3,0x82,0x62,0x00,
|
||||
0x67,0x80,0x02,0x00,0x03,0xc3,0x05,0x00,0x93,0x85,0x15,0x00,0x83,0x22,0x85,0x04,
|
||||
0xe3,0xce,0x02,0xfe,0x83,0xc2,0x05,0x00,0x23,0x24,0x55,0x04,0x93,0x85,0x15,0x00,
|
||||
0x13,0x03,0xf3,0xff,0xe3,0x44,0x60,0xfe,0x6f,0xf0,0x5f,0xfc,0x83,0x22,0x45,0x07,
|
||||
0x93,0xf2,0x12,0x00,0xe3,0x8c,0x02,0xfe,0x6f,0xf0,0x5f,0xfb,0x83,0xc2,0x05,0x00,
|
||||
0xb3,0x82,0xa2,0x00,0x03,0xc3,0x15,0x00,0x93,0x85,0x25,0x00,0x23,0xa0,0x62,0x00,
|
||||
0x6f,0xf0,0xdf,0xf9,0x13,0x06,0x50,0x00,0xef,0x00,0x80,0x01,0x13,0x06,0x00,0x00,
|
||||
0xef,0x00,0x00,0x01,0x93,0x72,0x16,0x00,0xe3,0x9a,0x02,0xfe,0x6f,0xf0,0x1f,0xf8,
|
||||
0x83,0x22,0x85,0x04,0xe3,0xce,0x02,0xfe,0x23,0x24,0xc5,0x04,0x03,0x26,0xc5,0x04,
|
||||
0xe3,0x4e,0x06,0xfe,0x67,0x80,0x00,0x00,0x83,0x22,0x05,0x04,0x13,0x03,0x70,0xff,
|
||||
0xb3,0xf2,0x62,0x00,0x03,0xc3,0x05,0x00,0x93,0x85,0x15,0x00,0xb3,0xe2,0x62,0x00,
|
||||
0x23,0x20,0x55,0x04,0x6f,0xf0,0x9f,0xf4,
|
|
@ -0,0 +1,12 @@
|
|||
OUTPUT_ARCH( "riscv" )
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x12340000;
|
||||
.text :
|
||||
{
|
||||
*(.text.entry)
|
||||
*(.text)
|
||||
}
|
||||
.data : { *(.data) }
|
||||
}
|
|
@ -0,0 +1,51 @@
|
|||
/* Autogenerated with ../../../../src/helper/bin2char.sh */
|
||||
0x17,0x01,0x00,0x00,0x13,0x01,0xc1,0x31,0xef,0x00,0x80,0x10,0x73,0x00,0x10,0x00,
|
||||
0x93,0x07,0x90,0x3e,0x93,0x87,0xf7,0xff,0x63,0x96,0x07,0x00,0x13,0x05,0x10,0x00,
|
||||
0x67,0x80,0x00,0x00,0x03,0x27,0x45,0x07,0x13,0x77,0x17,0x00,0xe3,0x04,0x07,0xfe,
|
||||
0x13,0x05,0x00,0x00,0x67,0x80,0x00,0x00,0x93,0x07,0x90,0x3e,0x93,0x87,0xf7,0xff,
|
||||
0x63,0x96,0x07,0x00,0x13,0x05,0x10,0x00,0x67,0x80,0x00,0x00,0x03,0x27,0x85,0x04,
|
||||
0xe3,0x46,0x07,0xfe,0x23,0x24,0xb5,0x04,0x13,0x05,0x00,0x00,0x67,0x80,0x00,0x00,
|
||||
0x83,0x27,0x05,0x04,0x13,0x01,0x41,0xff,0x23,0x22,0x81,0x00,0x23,0x24,0x11,0x00,
|
||||
0x23,0x20,0x91,0x00,0x93,0xf7,0x77,0xff,0x23,0x20,0xf5,0x04,0x93,0x07,0x20,0x00,
|
||||
0x23,0x2c,0xf5,0x00,0x93,0x05,0x50,0x00,0x13,0x04,0x05,0x00,0xef,0xf0,0xdf,0xfa,
|
||||
0x93,0x07,0x90,0x3e,0x63,0x00,0x05,0x02,0x83,0x20,0x81,0x00,0x03,0x24,0x41,0x00,
|
||||
0x83,0x24,0x01,0x00,0x13,0x01,0xc1,0x00,0x67,0x80,0x00,0x00,0x03,0x27,0xc4,0x04,
|
||||
0x63,0x5a,0x07,0x00,0x93,0x87,0xf7,0xff,0xe3,0x9a,0x07,0xfe,0x13,0x05,0x10,0x00,
|
||||
0x6f,0xf0,0x9f,0xfd,0x93,0x04,0x90,0x3e,0x93,0x84,0xf4,0xff,0xe3,0x88,0x04,0xfe,
|
||||
0x93,0x05,0x00,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0x1f,0xf6,0xe3,0x1e,0x05,0xfa,
|
||||
0x13,0x07,0x90,0x3e,0x13,0x07,0xf7,0xff,0xe3,0x0a,0x07,0xfc,0x83,0x27,0xc4,0x04,
|
||||
0xe3,0xca,0x07,0xfe,0x93,0xf7,0x17,0x00,0xe3,0x98,0x07,0xfc,0x23,0x2c,0x04,0x00,
|
||||
0x83,0x27,0x04,0x04,0x93,0xe7,0x87,0x00,0x23,0x20,0xf4,0x04,0x6f,0xf0,0xdf,0xf8,
|
||||
0x13,0x01,0x41,0xfd,0x23,0x22,0x81,0x02,0x23,0x20,0x91,0x02,0x23,0x24,0x11,0x02,
|
||||
0x13,0x04,0x05,0x00,0x23,0x26,0xb1,0x00,0x23,0x28,0xc1,0x00,0x23,0x20,0xd1,0x00,
|
||||
0x23,0x22,0xe1,0x00,0x23,0x2a,0xf1,0x00,0xef,0xf0,0x9f,0xed,0x93,0x04,0x05,0x00,
|
||||
0x63,0x16,0x05,0x04,0x83,0x27,0x04,0x06,0x13,0x05,0x04,0x00,0x93,0xf7,0xe7,0xff,
|
||||
0x23,0x20,0xf4,0x06,0xef,0xf0,0xdf,0xf0,0x93,0x04,0x05,0x00,0x63,0x12,0x05,0x02,
|
||||
0x83,0x27,0xc1,0x00,0x03,0x27,0x01,0x00,0x93,0x87,0xf7,0xff,0xb3,0xf7,0xe7,0x00,
|
||||
0x03,0x47,0x41,0x01,0x23,0x2c,0xe1,0x00,0x03,0x27,0x41,0x00,0x63,0x14,0x07,0x02,
|
||||
0x83,0x27,0x04,0x06,0x93,0xe7,0x17,0x00,0x23,0x20,0xf4,0x06,0x83,0x20,0x81,0x02,
|
||||
0x03,0x24,0x41,0x02,0x13,0x85,0x04,0x00,0x83,0x24,0x01,0x02,0x13,0x01,0xc1,0x02,
|
||||
0x67,0x80,0x00,0x00,0x83,0x26,0x41,0x00,0x03,0x27,0x41,0x00,0x23,0x24,0xd1,0x00,
|
||||
0x83,0x26,0xc1,0x00,0x33,0x07,0xf7,0x00,0x63,0xf6,0xe6,0x00,0xb3,0x87,0xf6,0x40,
|
||||
0x23,0x24,0xf1,0x00,0x93,0x05,0x60,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0xdf,0xe6,
|
||||
0x63,0x1e,0x05,0x0c,0x13,0x05,0x04,0x00,0xef,0xf0,0x9f,0xe3,0x63,0x18,0x05,0x0c,
|
||||
0x83,0x25,0x81,0x01,0x93,0x07,0x20,0x00,0x23,0x2c,0xf4,0x00,0x13,0x05,0x04,0x00,
|
||||
0xef,0xf0,0x9f,0xe4,0x63,0x1c,0x05,0x0a,0x83,0x27,0x41,0x01,0x93,0xf7,0x07,0x10,
|
||||
0x63,0x9c,0x07,0x08,0x83,0x27,0x01,0x00,0x13,0x05,0x04,0x00,0x93,0xd5,0x07,0x01,
|
||||
0x93,0xf5,0xf5,0x0f,0xef,0xf0,0x5f,0xe2,0x63,0x1a,0x05,0x08,0x83,0x27,0x01,0x00,
|
||||
0x13,0x05,0x04,0x00,0x93,0xd5,0x87,0x00,0x93,0xf5,0xf5,0x0f,0xef,0xf0,0xdf,0xe0,
|
||||
0x63,0x1e,0x05,0x06,0x83,0x45,0x01,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0xdf,0xdf,
|
||||
0x63,0x16,0x05,0x06,0x03,0x26,0x01,0x01,0x83,0x27,0x81,0x00,0xb3,0x07,0xf6,0x00,
|
||||
0x63,0x12,0xf6,0x06,0x13,0x05,0x04,0x00,0x23,0x28,0xc1,0x00,0xef,0xf0,0x5f,0xdb,
|
||||
0x63,0x16,0x05,0x04,0x23,0x2c,0x04,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0x5f,0xdf,
|
||||
0x63,0x1e,0x05,0x02,0x83,0x27,0x01,0x00,0x03,0x27,0x81,0x00,0xb3,0x87,0xe7,0x00,
|
||||
0x23,0x20,0xf1,0x00,0x83,0x27,0x41,0x00,0xb3,0x87,0xe7,0x40,0x23,0x22,0xf1,0x00,
|
||||
0x93,0x07,0x00,0x00,0x6f,0xf0,0x5f,0xee,0x83,0x27,0x01,0x00,0x13,0x05,0x04,0x00,
|
||||
0x93,0xd5,0x87,0x01,0xef,0xf0,0x5f,0xd9,0xe3,0x0e,0x05,0xf4,0x93,0x04,0x05,0x00,
|
||||
0x6f,0xf0,0x1f,0xed,0x83,0x45,0x06,0x00,0x13,0x05,0x04,0x00,0x23,0x2e,0xf1,0x00,
|
||||
0x23,0x28,0xc1,0x00,0xef,0xf0,0x5f,0xd7,0x03,0x26,0x01,0x01,0x83,0x27,0xc1,0x01,
|
||||
0x13,0x06,0x16,0x00,0xe3,0x0e,0x05,0xf6,0x6f,0xf0,0x5f,0xfd,0x09,0x53,0x67,0x08,
|
||||
0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,
|
||||
0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,
|
||||
0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,
|
||||
0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,0x09,0x53,0x67,0x08,
|
|
@ -0,0 +1,58 @@
|
|||
/* Autogenerated with ../../../../src/helper/bin2char.sh */
|
||||
0x17,0x01,0x00,0x00,0x13,0x01,0x81,0x38,0xef,0x00,0x40,0x12,0x73,0x00,0x10,0x00,
|
||||
0x93,0x07,0x90,0x3e,0x9b,0x87,0xf7,0xff,0x63,0x96,0x07,0x00,0x13,0x05,0x10,0x00,
|
||||
0x67,0x80,0x00,0x00,0x03,0x27,0x45,0x07,0x13,0x77,0x17,0x00,0xe3,0x04,0x07,0xfe,
|
||||
0x13,0x05,0x00,0x00,0x67,0x80,0x00,0x00,0x93,0x07,0x90,0x3e,0x9b,0x87,0xf7,0xff,
|
||||
0x63,0x96,0x07,0x00,0x13,0x05,0x10,0x00,0x67,0x80,0x00,0x00,0x03,0x27,0x85,0x04,
|
||||
0x93,0x16,0x07,0x02,0xe3,0xc4,0x06,0xfe,0x9b,0x85,0x05,0x00,0x23,0x24,0xb5,0x04,
|
||||
0x13,0x05,0x00,0x00,0x67,0x80,0x00,0x00,0x83,0x27,0x05,0x04,0x13,0x01,0x01,0xfe,
|
||||
0x23,0x38,0x81,0x00,0x9b,0x87,0x07,0x00,0x23,0x3c,0x11,0x00,0x23,0x34,0x91,0x00,
|
||||
0x93,0xf7,0x77,0xff,0x23,0x20,0xf5,0x04,0x93,0x07,0x20,0x00,0x23,0x2c,0xf5,0x00,
|
||||
0x93,0x05,0x50,0x00,0x13,0x04,0x05,0x00,0xef,0xf0,0x1f,0xfa,0x93,0x07,0x90,0x3e,
|
||||
0x63,0x02,0x05,0x02,0x83,0x30,0x81,0x01,0x03,0x34,0x01,0x01,0x83,0x34,0x81,0x00,
|
||||
0x13,0x01,0x01,0x02,0x67,0x80,0x00,0x00,0x03,0x27,0xc4,0x04,0x93,0x16,0x07,0x02,
|
||||
0x63,0xda,0x06,0x00,0x9b,0x87,0xf7,0xff,0xe3,0x98,0x07,0xfe,0x13,0x05,0x10,0x00,
|
||||
0x6f,0xf0,0x5f,0xfd,0x93,0x04,0x90,0x3e,0x9b,0x84,0xf4,0xff,0xe3,0x88,0x04,0xfe,
|
||||
0x93,0x05,0x00,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0x1f,0xf5,0xe3,0x1c,0x05,0xfa,
|
||||
0x93,0x07,0x90,0x3e,0x9b,0x87,0xf7,0xff,0xe3,0x8a,0x07,0xfc,0x83,0x26,0xc4,0x04,
|
||||
0x13,0x96,0x06,0x02,0x1b,0x87,0x06,0x00,0xe3,0x46,0x06,0xfe,0x93,0x77,0x17,0x00,
|
||||
0xe3,0x94,0x07,0xfc,0x23,0x2c,0x04,0x00,0x83,0x27,0x04,0x04,0x9b,0x87,0x07,0x00,
|
||||
0x93,0xe7,0x87,0x00,0x23,0x20,0xf4,0x04,0x6f,0xf0,0xdf,0xf7,0x13,0x01,0x01,0xfa,
|
||||
0x23,0x38,0x81,0x04,0x23,0x34,0x91,0x04,0x23,0x30,0x21,0x05,0x23,0x3c,0x31,0x03,
|
||||
0x23,0x38,0x41,0x03,0x23,0x34,0x51,0x03,0x23,0x30,0x61,0x03,0x23,0x3c,0x11,0x04,
|
||||
0x23,0x3c,0x71,0x01,0x23,0x38,0x81,0x01,0x23,0x34,0x91,0x01,0x23,0x30,0xa1,0x01,
|
||||
0x13,0x04,0x05,0x00,0x93,0x8a,0x05,0x00,0x13,0x0b,0x06,0x00,0x13,0x89,0x06,0x00,
|
||||
0x13,0x0a,0x07,0x00,0x93,0x89,0x07,0x00,0xef,0xf0,0x9f,0xe9,0x93,0x04,0x05,0x00,
|
||||
0x63,0x1a,0x05,0x04,0x83,0x27,0x04,0x06,0x13,0x05,0x04,0x00,0x9b,0x87,0x07,0x00,
|
||||
0x93,0xf7,0xe7,0xff,0x23,0x20,0xf4,0x06,0xef,0xf0,0x1f,0xed,0x93,0x04,0x05,0x00,
|
||||
0x63,0x12,0x05,0x02,0x9b,0x86,0xfa,0xff,0xb3,0x76,0xd9,0x00,0x93,0xfc,0xf9,0x0f,
|
||||
0x93,0xf9,0x09,0x10,0x9b,0x86,0x06,0x00,0x13,0x0c,0x20,0x00,0x9b,0x89,0x09,0x00,
|
||||
0x63,0x18,0x0a,0x04,0x83,0x27,0x04,0x06,0x9b,0x87,0x07,0x00,0x93,0xe7,0x17,0x00,
|
||||
0x23,0x20,0xf4,0x06,0x83,0x30,0x81,0x05,0x03,0x34,0x01,0x05,0x03,0x39,0x01,0x04,
|
||||
0x83,0x39,0x81,0x03,0x03,0x3a,0x01,0x03,0x83,0x3a,0x81,0x02,0x03,0x3b,0x01,0x02,
|
||||
0x83,0x3b,0x81,0x01,0x03,0x3c,0x01,0x01,0x83,0x3c,0x81,0x00,0x03,0x3d,0x01,0x00,
|
||||
0x13,0x85,0x04,0x00,0x83,0x34,0x81,0x04,0x13,0x01,0x01,0x06,0x67,0x80,0x00,0x00,
|
||||
0xbb,0x07,0xda,0x00,0x93,0x0b,0x0a,0x00,0x63,0xf4,0xfa,0x00,0xbb,0x8b,0xda,0x40,
|
||||
0x93,0x05,0x60,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0x1f,0xe1,0x63,0x1a,0x05,0x0a,
|
||||
0x13,0x05,0x04,0x00,0xef,0xf0,0xdf,0xdd,0x63,0x14,0x05,0x0a,0x23,0x2c,0x84,0x01,
|
||||
0x93,0x85,0x0c,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0x1f,0xdf,0x63,0x1a,0x05,0x08,
|
||||
0x63,0x90,0x09,0x08,0x9b,0x55,0x09,0x01,0x93,0xf5,0xf5,0x0f,0x13,0x05,0x04,0x00,
|
||||
0xef,0xf0,0x9f,0xdd,0x63,0x1e,0x05,0x06,0x9b,0x55,0x89,0x00,0x93,0xf5,0xf5,0x0f,
|
||||
0x13,0x05,0x04,0x00,0xef,0xf0,0x5f,0xdc,0x63,0x14,0x05,0x06,0x93,0x75,0xf9,0x0f,
|
||||
0x13,0x05,0x04,0x00,0xef,0xf0,0x5f,0xdb,0x63,0x1c,0x05,0x04,0x13,0x0d,0x00,0x00,
|
||||
0x9b,0x07,0x0d,0x00,0x63,0xea,0x77,0x05,0x13,0x05,0x04,0x00,0xef,0xf0,0x5f,0xd7,
|
||||
0x63,0x10,0x05,0x04,0x23,0x2c,0x04,0x00,0x13,0x05,0x04,0x00,0xef,0xf0,0xdf,0xdb,
|
||||
0x63,0x18,0x05,0x02,0x93,0x97,0x0b,0x02,0x93,0xd7,0x07,0x02,0x33,0x0b,0xfb,0x00,
|
||||
0x3b,0x09,0x79,0x01,0x3b,0x0a,0x7a,0x41,0x93,0x06,0x00,0x00,0x6f,0xf0,0x5f,0xef,
|
||||
0x9b,0x55,0x89,0x01,0x13,0x05,0x04,0x00,0xef,0xf0,0x1f,0xd6,0xe3,0x0c,0x05,0xf6,
|
||||
0x93,0x04,0x05,0x00,0x6f,0xf0,0x1f,0xee,0xb3,0x07,0xab,0x01,0x83,0xc5,0x07,0x00,
|
||||
0x13,0x05,0x04,0x00,0x13,0x0d,0x1d,0x00,0xef,0xf0,0x1f,0xd4,0xe3,0x0a,0x05,0xf8,
|
||||
0x6f,0xf0,0x1f,0xfe,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
||||
0x09,0x53,0x67,0x08,0x00,0x00,0x00,0x00,
|
|
@ -0,0 +1,321 @@
|
|||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "../../../../src/flash/nor/spi.h"
|
||||
|
||||
/* Register offsets */
|
||||
|
||||
#define FESPI_REG_SCKDIV 0x00
|
||||
#define FESPI_REG_SCKMODE 0x04
|
||||
#define FESPI_REG_CSID 0x10
|
||||
#define FESPI_REG_CSDEF 0x14
|
||||
#define FESPI_REG_CSMODE 0x18
|
||||
|
||||
#define FESPI_REG_DCSSCK 0x28
|
||||
#define FESPI_REG_DSCKCS 0x2a
|
||||
#define FESPI_REG_DINTERCS 0x2c
|
||||
#define FESPI_REG_DINTERXFR 0x2e
|
||||
|
||||
#define FESPI_REG_FMT 0x40
|
||||
#define FESPI_REG_TXFIFO 0x48
|
||||
#define FESPI_REG_RXFIFO 0x4c
|
||||
#define FESPI_REG_TXCTRL 0x50
|
||||
#define FESPI_REG_RXCTRL 0x54
|
||||
|
||||
#define FESPI_REG_FCTRL 0x60
|
||||
#define FESPI_REG_FFMT 0x64
|
||||
|
||||
#define FESPI_REG_IE 0x70
|
||||
#define FESPI_REG_IP 0x74
|
||||
|
||||
/* Fields */
|
||||
|
||||
#define FESPI_SCK_POL 0x1
|
||||
#define FESPI_SCK_PHA 0x2
|
||||
|
||||
#define FESPI_FMT_PROTO(x) ((x) & 0x3)
|
||||
#define FESPI_FMT_ENDIAN(x) (((x) & 0x1) << 2)
|
||||
#define FESPI_FMT_DIR(x) (((x) & 0x1) << 3)
|
||||
#define FESPI_FMT_LEN(x) (((x) & 0xf) << 16)
|
||||
|
||||
/* TXCTRL register */
|
||||
#define FESPI_TXWM(x) ((x) & 0xffff)
|
||||
/* RXCTRL register */
|
||||
#define FESPI_RXWM(x) ((x) & 0xffff)
|
||||
|
||||
#define FESPI_IP_TXWM 0x1
|
||||
#define FESPI_IP_RXWM 0x2
|
||||
|
||||
#define FESPI_FCTRL_EN 0x1
|
||||
|
||||
#define FESPI_INSN_CMD_EN 0x1
|
||||
#define FESPI_INSN_ADDR_LEN(x) (((x) & 0x7) << 1)
|
||||
#define FESPI_INSN_PAD_CNT(x) (((x) & 0xf) << 4)
|
||||
#define FESPI_INSN_CMD_PROTO(x) (((x) & 0x3) << 8)
|
||||
#define FESPI_INSN_ADDR_PROTO(x) (((x) & 0x3) << 10)
|
||||
#define FESPI_INSN_DATA_PROTO(x) (((x) & 0x3) << 12)
|
||||
#define FESPI_INSN_CMD_CODE(x) (((x) & 0xff) << 16)
|
||||
#define FESPI_INSN_PAD_CODE(x) (((x) & 0xff) << 24)
|
||||
|
||||
/* Values */
|
||||
|
||||
#define FESPI_CSMODE_AUTO 0
|
||||
#define FESPI_CSMODE_HOLD 2
|
||||
#define FESPI_CSMODE_OFF 3
|
||||
|
||||
#define FESPI_DIR_RX 0
|
||||
#define FESPI_DIR_TX 1
|
||||
|
||||
#define FESPI_PROTO_S 0
|
||||
#define FESPI_PROTO_D 1
|
||||
#define FESPI_PROTO_Q 2
|
||||
|
||||
#define FESPI_ENDIAN_MSB 0
|
||||
#define FESPI_ENDIAN_LSB 1
|
||||
|
||||
/* Timeouts we use, in number of status checks. */
|
||||
#define TIMEOUT 1000
|
||||
|
||||
/* #define DEBUG to make the return error codes provide enough information to
|
||||
* reconstruct the stack from where the error occurred. This is not enabled
|
||||
* usually to reduce the program size. */
|
||||
#ifdef DEBUG
|
||||
#define ERROR_STACK(x) (x)
|
||||
#define ERROR_FESPI_TXWM_WAIT 0x10
|
||||
#define ERROR_FESPI_TX 0x100
|
||||
#define ERROR_FESPI_RX 0x1000
|
||||
#define ERROR_FESPI_WIP 0x50000
|
||||
#else
|
||||
#define ERROR_STACK(x) 0
|
||||
#define ERROR_FESPI_TXWM_WAIT 1
|
||||
#define ERROR_FESPI_TX 1
|
||||
#define ERROR_FESPI_RX 1
|
||||
#define ERROR_FESPI_WIP 1
|
||||
#endif
|
||||
|
||||
#define ERROR_OK 0
|
||||
|
||||
static int fespi_txwm_wait(volatile uint32_t *ctrl_base);
|
||||
static void fespi_disable_hw_mode(volatile uint32_t *ctrl_base);
|
||||
static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base);
|
||||
static int fespi_wip(volatile uint32_t *ctrl_base);
|
||||
static int fespi_write_buffer(volatile uint32_t *ctrl_base,
|
||||
const uint8_t *buffer, unsigned offset, unsigned len,
|
||||
uint32_t flash_info);
|
||||
|
||||
/* Can set bits 3:0 in result. */
|
||||
/* flash_info contains:
|
||||
* bits 7:0 -- pprog_cmd
|
||||
* bit 8 -- 0 means send 3 bytes after pprog_cmd, 1 means send 4 bytes
|
||||
* after pprog_cmd
|
||||
*/
|
||||
int flash_fespi(volatile uint32_t *ctrl_base, uint32_t page_size,
|
||||
const uint8_t *buffer, unsigned offset, uint32_t count,
|
||||
uint32_t flash_info)
|
||||
{
|
||||
int result;
|
||||
|
||||
result = fespi_txwm_wait(ctrl_base);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x1);
|
||||
|
||||
/* Disable Hardware accesses*/
|
||||
fespi_disable_hw_mode(ctrl_base);
|
||||
|
||||
/* poll WIP */
|
||||
result = fespi_wip(ctrl_base);
|
||||
if (result != ERROR_OK) {
|
||||
result |= ERROR_STACK(0x2);
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Assume page_size is a power of two so we don't need the modulus code. */
|
||||
uint32_t page_offset = offset & (page_size - 1);
|
||||
|
||||
/* central part, aligned words */
|
||||
while (count > 0) {
|
||||
uint32_t cur_count;
|
||||
/* clip block at page boundary */
|
||||
if (page_offset + count > page_size)
|
||||
cur_count = page_size - page_offset;
|
||||
else
|
||||
cur_count = count;
|
||||
|
||||
result = fespi_write_buffer(ctrl_base, buffer, offset, cur_count, flash_info);
|
||||
if (result != ERROR_OK) {
|
||||
result |= ERROR_STACK(0x3);
|
||||
goto err;
|
||||
}
|
||||
|
||||
page_offset = 0;
|
||||
buffer += cur_count;
|
||||
offset += cur_count;
|
||||
count -= cur_count;
|
||||
}
|
||||
|
||||
err:
|
||||
/* Switch to HW mode before return to prompt */
|
||||
fespi_enable_hw_mode(ctrl_base);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static uint32_t fespi_read_reg(volatile uint32_t *ctrl_base, unsigned address)
|
||||
{
|
||||
return ctrl_base[address / 4];
|
||||
}
|
||||
|
||||
static void fespi_write_reg(volatile uint32_t *ctrl_base, unsigned address, uint32_t value)
|
||||
{
|
||||
ctrl_base[address / 4] = value;
|
||||
}
|
||||
|
||||
static void fespi_disable_hw_mode(volatile uint32_t *ctrl_base)
|
||||
{
|
||||
uint32_t fctrl = fespi_read_reg(ctrl_base, FESPI_REG_FCTRL);
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_FCTRL, fctrl & ~FESPI_FCTRL_EN);
|
||||
}
|
||||
|
||||
static void fespi_enable_hw_mode(volatile uint32_t *ctrl_base)
|
||||
{
|
||||
uint32_t fctrl = fespi_read_reg(ctrl_base, FESPI_REG_FCTRL);
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_FCTRL, fctrl | FESPI_FCTRL_EN);
|
||||
}
|
||||
|
||||
/* Can set bits 7:4 in result. */
|
||||
static int fespi_txwm_wait(volatile uint32_t *ctrl_base)
|
||||
{
|
||||
unsigned timeout = TIMEOUT;
|
||||
|
||||
while (timeout--) {
|
||||
uint32_t ip = fespi_read_reg(ctrl_base, FESPI_REG_IP);
|
||||
if (ip & FESPI_IP_TXWM)
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
return ERROR_FESPI_TXWM_WAIT;
|
||||
}
|
||||
|
||||
static void fespi_set_dir(volatile uint32_t *ctrl_base, bool dir)
|
||||
{
|
||||
uint32_t fmt = fespi_read_reg(ctrl_base, FESPI_REG_FMT);
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_FMT,
|
||||
(fmt & ~(FESPI_FMT_DIR(0xFFFFFFFF))) | FESPI_FMT_DIR(dir));
|
||||
}
|
||||
|
||||
/* Can set bits 11:8 in result. */
|
||||
static int fespi_tx(volatile uint32_t *ctrl_base, uint8_t in)
|
||||
{
|
||||
unsigned timeout = TIMEOUT;
|
||||
|
||||
while (timeout--) {
|
||||
uint32_t txfifo = fespi_read_reg(ctrl_base, FESPI_REG_TXFIFO);
|
||||
if (!(txfifo >> 31)) {
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_TXFIFO, in);
|
||||
return ERROR_OK;
|
||||
}
|
||||
}
|
||||
return ERROR_FESPI_TX;
|
||||
}
|
||||
|
||||
/* Can set bits 15:12 in result. */
|
||||
static int fespi_rx(volatile uint32_t *ctrl_base, uint8_t *out)
|
||||
{
|
||||
unsigned timeout = TIMEOUT;
|
||||
|
||||
while (timeout--) {
|
||||
uint32_t value = fespi_read_reg(ctrl_base, FESPI_REG_RXFIFO);
|
||||
if (!(value >> 31)) {
|
||||
if (out)
|
||||
*out = value & 0xff;
|
||||
return ERROR_OK;
|
||||
}
|
||||
}
|
||||
|
||||
return ERROR_FESPI_RX;
|
||||
}
|
||||
|
||||
/* Can set bits 19:16 in result. */
|
||||
static int fespi_wip(volatile uint32_t *ctrl_base)
|
||||
{
|
||||
fespi_set_dir(ctrl_base, FESPI_DIR_RX);
|
||||
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
|
||||
|
||||
int result = fespi_tx(ctrl_base, SPIFLASH_READ_STATUS);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x10000);
|
||||
result = fespi_rx(ctrl_base, NULL);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x20000);
|
||||
|
||||
unsigned timeout = TIMEOUT;
|
||||
while (timeout--) {
|
||||
result = fespi_tx(ctrl_base, 0);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x30000);
|
||||
uint8_t rx;
|
||||
result = fespi_rx(ctrl_base, &rx);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x40000);
|
||||
if ((rx & SPIFLASH_BSY_BIT) == 0) {
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
|
||||
fespi_set_dir(ctrl_base, FESPI_DIR_TX);
|
||||
return ERROR_OK;
|
||||
}
|
||||
}
|
||||
|
||||
return ERROR_FESPI_WIP;
|
||||
}
|
||||
|
||||
/* Can set bits 23:20 in result. */
|
||||
static int fespi_write_buffer(volatile uint32_t *ctrl_base,
|
||||
const uint8_t *buffer, unsigned offset, unsigned len,
|
||||
uint32_t flash_info)
|
||||
{
|
||||
int result = fespi_tx(ctrl_base, SPIFLASH_WRITE_ENABLE);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x100000);
|
||||
result = fespi_txwm_wait(ctrl_base);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x200000);
|
||||
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
|
||||
|
||||
result = fespi_tx(ctrl_base, flash_info & 0xff);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x300000);
|
||||
|
||||
if (flash_info & 0x100) {
|
||||
result = fespi_tx(ctrl_base, offset >> 24);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x400000);
|
||||
}
|
||||
result = fespi_tx(ctrl_base, offset >> 16);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x400000);
|
||||
result = fespi_tx(ctrl_base, offset >> 8);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x500000);
|
||||
result = fespi_tx(ctrl_base, offset);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x600000);
|
||||
|
||||
for (unsigned i = 0; i < len; i++) {
|
||||
result = fespi_tx(ctrl_base, buffer[i]);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x700000);
|
||||
}
|
||||
|
||||
result = fespi_txwm_wait(ctrl_base);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x800000);
|
||||
|
||||
fespi_write_reg(ctrl_base, FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
|
||||
|
||||
result = fespi_wip(ctrl_base);
|
||||
if (result != ERROR_OK)
|
||||
return result | ERROR_STACK(0x900000);
|
||||
return ERROR_OK;
|
||||
}
|
|
@ -0,0 +1,22 @@
|
|||
#if __riscv_xlen == 64
|
||||
# define LREG ld
|
||||
# define SREG sd
|
||||
# define REGBYTES 8
|
||||
#else
|
||||
# define LREG lw
|
||||
# define SREG sw
|
||||
# define REGBYTES 4
|
||||
#endif
|
||||
|
||||
.section .text.entry
|
||||
.global _start
|
||||
_start:
|
||||
lla sp, stack_end
|
||||
jal flash_fespi
|
||||
ebreak
|
||||
|
||||
.section .data
|
||||
.balign REGBYTES
|
||||
stack:
|
||||
.fill 16, REGBYTES, 0x8675309
|
||||
stack_end:
|
|
@ -48,8 +48,8 @@
|
|||
#define STM32_FLASH_CR_OFFSET 0x0C /* offset of CR register in FLASH struct */
|
||||
#define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */
|
||||
#define STM32_CR_PROG 0x00000032 /* PSIZE64 | PG */
|
||||
#define STM32_SR_BUSY_MASK 0x00000001 /* BSY */
|
||||
#define STM32_SR_ERROR_MASK 0x03ee0000 /* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR
|
||||
#define STM32_SR_QW_MASK 0x00000004 /* QW */
|
||||
#define STM32_SR_ERROR_MASK 0x07ee0000 /* DBECCERR | SNECCERR | RDSERR | RDPERR | OPERR
|
||||
| INCERR | STRBERR | PGSERR | WRPERR */
|
||||
|
||||
.thumb_func
|
||||
|
@ -73,6 +73,7 @@ wait_fifo:
|
|||
|
||||
mov r7, #8 /* program by 8 words = 32 bytes */
|
||||
write_flash:
|
||||
dsb
|
||||
ldr r6, [r5], #0x04 /* read one word from src, increment ptr */
|
||||
str r6, [r2], #0x04 /* write one word to dst, increment ptr */
|
||||
dsb
|
||||
|
@ -84,7 +85,7 @@ write_flash:
|
|||
|
||||
busy:
|
||||
ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
|
||||
tst r6, #STM32_SR_BUSY_MASK
|
||||
tst r6, #STM32_SR_QW_MASK
|
||||
bne busy /* operation in progress, wait ... */
|
||||
|
||||
ldr r7, =STM32_SR_ERROR_MASK
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/* Autogenerated with ../../../../src/helper/bin2char.sh */
|
||||
0x45,0x68,0x06,0x68,0x26,0xb3,0x76,0x1b,0x42,0xbf,0x76,0x18,0x36,0x1a,0x08,0x3e,
|
||||
0x20,0x2e,0xf6,0xd3,0x4f,0xf0,0x32,0x06,0xe6,0x60,0x4f,0xf0,0x08,0x07,0x55,0xf8,
|
||||
0x04,0x6b,0x42,0xf8,0x04,0x6b,0xbf,0xf3,0x4f,0x8f,0x8d,0x42,0x28,0xbf,0x00,0xf1,
|
||||
0x08,0x05,0x01,0x3f,0xf3,0xd1,0x26,0x69,0x16,0xf0,0x01,0x0f,0xfb,0xd1,0x05,0x4f,
|
||||
0x3e,0x42,0x03,0xd1,0x45,0x60,0x01,0x3b,0xdb,0xd1,0x01,0xe0,0x00,0x27,0x47,0x60,
|
||||
0x30,0x46,0x00,0xbe,0x00,0x00,0xee,0x03,
|
||||
0x45,0x68,0x06,0x68,0x36,0xb3,0x76,0x1b,0x42,0xbf,0x76,0x18,0x36,0x1a,0x08,0x3e,
|
||||
0x20,0x2e,0xf6,0xd3,0x4f,0xf0,0x32,0x06,0xe6,0x60,0x4f,0xf0,0x08,0x07,0xbf,0xf3,
|
||||
0x4f,0x8f,0x55,0xf8,0x04,0x6b,0x42,0xf8,0x04,0x6b,0xbf,0xf3,0x4f,0x8f,0x8d,0x42,
|
||||
0x28,0xbf,0x00,0xf1,0x08,0x05,0x01,0x3f,0xf1,0xd1,0x26,0x69,0x16,0xf0,0x04,0x0f,
|
||||
0xfb,0xd1,0x05,0x4f,0x3e,0x42,0x03,0xd1,0x45,0x60,0x01,0x3b,0xd9,0xd1,0x01,0xe0,
|
||||
0x00,0x27,0x47,0x60,0x30,0x46,0x00,0xbe,0x00,0x00,0xee,0x07,
|
||||
|
|
|
@ -0,0 +1,70 @@
|
|||
/* Autogenerated with ./bin2char.sh */
|
||||
0x97,0x21,0x00,0x00,0x93,0x81,0x01,0x80,0x13,0x81,0x01,0xc0,0x17,0x05,0x00,0x00,
|
||||
0x13,0x05,0x45,0x44,0x97,0x15,0x00,0x00,0x93,0x85,0xc5,0xfe,0x17,0x16,0x00,0x00,
|
||||
0x13,0x06,0x46,0xfe,0x63,0xfc,0xc5,0x00,0x83,0x22,0x05,0x00,0x23,0xa0,0x55,0x00,
|
||||
0x13,0x05,0x45,0x00,0x93,0x85,0x45,0x00,0xe3,0xe8,0xc5,0xfe,0x17,0x15,0x00,0x00,
|
||||
0x13,0x05,0x45,0xfc,0x93,0x85,0x81,0x81,0x63,0x78,0xb5,0x00,0x23,0x20,0x05,0x00,
|
||||
0x13,0x05,0x45,0x00,0xe3,0x6c,0xb5,0xfe,0x13,0x05,0x00,0x00,0x93,0x05,0x00,0x00,
|
||||
0xef,0x00,0x80,0x00,0x6f,0x00,0x00,0x00,0x13,0x01,0x01,0xff,0x23,0x26,0x11,0x00,
|
||||
0x23,0x24,0x81,0x00,0x13,0x04,0x01,0x01,0xb7,0x17,0x00,0x20,0x37,0x17,0x00,0x20,
|
||||
0x13,0x07,0x07,0x50,0x23,0xa0,0xe7,0x00,0xb7,0x17,0x00,0x20,0x37,0x17,0x00,0x20,
|
||||
0x13,0x07,0xc7,0x40,0x23,0xa2,0xe7,0x00,0xb7,0x17,0x00,0x20,0x93,0x87,0x07,0x40,
|
||||
0x03,0xa7,0x07,0x00,0x23,0xa4,0xe1,0x80,0xb7,0x17,0x00,0x20,0x93,0x87,0x47,0x40,
|
||||
0x03,0xa7,0x07,0x00,0x23,0xa6,0xe1,0x80,0xb7,0x17,0x00,0x20,0x93,0x87,0x87,0x40,
|
||||
0x03,0xa7,0x07,0x00,0x23,0xa8,0xe1,0x80,0xb7,0x17,0x00,0x20,0x83,0xa7,0x47,0x00,
|
||||
0x23,0xa0,0x07,0x00,0xef,0x00,0x80,0x08,0x83,0xa7,0x01,0x81,0x63,0x80,0x07,0x02,
|
||||
0x83,0xa7,0xc1,0x80,0x13,0x85,0x07,0x00,0xef,0x00,0x00,0x2c,0x93,0x07,0x05,0x00,
|
||||
0x13,0x87,0x07,0x00,0x23,0x8a,0xe1,0x80,0x6f,0x00,0x00,0x03,0x03,0xa7,0xc1,0x80,
|
||||
0xb7,0x17,0x00,0x20,0x83,0xa6,0x07,0x00,0x83,0xa7,0x81,0x80,0x13,0x86,0x07,0x00,
|
||||
0x93,0x85,0x06,0x00,0x13,0x05,0x07,0x00,0xef,0x00,0x40,0x10,0x93,0x07,0x05,0x00,
|
||||
0x13,0x87,0x07,0x00,0x23,0x8a,0xe1,0x80,0xef,0x00,0x40,0x06,0x83,0xc7,0x41,0x81,
|
||||
0x63,0x8c,0x07,0x00,0xb7,0x17,0x00,0x20,0x83,0xa7,0x47,0x00,0x13,0x07,0x30,0x00,
|
||||
0x23,0xa0,0xe7,0x00,0x6f,0x00,0x40,0x01,0xb7,0x17,0x00,0x20,0x83,0xa7,0x47,0x00,
|
||||
0x13,0x07,0x10,0x00,0x23,0xa0,0xe7,0x00,0x6f,0x00,0x00,0x00,0x13,0x01,0x01,0xff,
|
||||
0x23,0x26,0x81,0x00,0x13,0x04,0x01,0x01,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x67,0x87,0x00,0x23,0xa0,0xe7,0x00,0x13,0x00,0x00,0x00,
|
||||
0x03,0x24,0xc1,0x00,0x13,0x01,0x01,0x01,0x67,0x80,0x00,0x00,0x13,0x01,0x01,0xff,
|
||||
0x23,0x26,0x81,0x00,0x13,0x04,0x01,0x01,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x77,0x77,0xff,0x23,0xa0,0xe7,0x00,0x13,0x00,0x00,0x00,
|
||||
0x03,0x24,0xc1,0x00,0x13,0x01,0x01,0x01,0x67,0x80,0x00,0x00,0x13,0x01,0x01,0xff,
|
||||
0x23,0x26,0x81,0x00,0x13,0x04,0x01,0x01,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x67,0x07,0x01,0x23,0xa0,0xe7,0x00,0x13,0x00,0x00,0x00,
|
||||
0x03,0x24,0xc1,0x00,0x13,0x01,0x01,0x01,0x67,0x80,0x00,0x00,0x13,0x01,0x01,0xff,
|
||||
0x23,0x26,0x81,0x00,0x13,0x04,0x01,0x01,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x77,0xf7,0xfe,0x23,0xa0,0xe7,0x00,0x13,0x00,0x00,0x00,
|
||||
0x03,0x24,0xc1,0x00,0x13,0x01,0x01,0x01,0x67,0x80,0x00,0x00,0x13,0x01,0x01,0xfd,
|
||||
0x23,0x26,0x11,0x02,0x23,0x24,0x81,0x02,0x13,0x04,0x01,0x03,0x23,0x2e,0xa4,0xfc,
|
||||
0x23,0x2c,0xb4,0xfc,0x23,0x2a,0xc4,0xfc,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x77,0x97,0xff,0x23,0xa0,0xe7,0x00,0xb7,0x07,0x00,0x0e,
|
||||
0x03,0xa7,0x07,0x00,0xb7,0x07,0x00,0x0e,0x13,0x67,0x27,0x00,0x23,0xa0,0xe7,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x93,0x87,0x47,0x00,0x83,0x26,0xc4,0xfd,0x37,0x07,0x80,0x00,
|
||||
0x13,0x07,0xf7,0xff,0x33,0xf7,0xe6,0x00,0x23,0xa0,0xe7,0x00,0x03,0x27,0x44,0xfd,
|
||||
0x93,0x07,0x40,0x00,0x63,0xf4,0xe7,0x00,0xef,0xf0,0x5f,0xf3,0x83,0x27,0x44,0xfd,
|
||||
0x23,0x20,0xf4,0xfe,0x23,0x24,0x04,0xfe,0x6f,0x00,0x40,0x0b,0x03,0x27,0x04,0xfe,
|
||||
0x93,0x07,0x00,0x02,0x63,0xf8,0xe7,0x00,0x93,0x07,0x00,0x02,0x23,0x22,0xf4,0xfe,
|
||||
0x6f,0x00,0xc0,0x00,0x83,0x27,0x04,0xfe,0x23,0x22,0xf4,0xfe,0x03,0x27,0x04,0xfe,
|
||||
0x83,0x27,0x44,0xfe,0xb3,0x07,0xf7,0x40,0x23,0x20,0xf4,0xfe,0x83,0x27,0x44,0xfe,
|
||||
0x93,0xd7,0x27,0x00,0x23,0x22,0xf4,0xfe,0x23,0x26,0x04,0xfe,0x6f,0x00,0x40,0x06,
|
||||
0x83,0x27,0x84,0xfe,0x93,0x97,0x27,0x00,0x03,0x27,0x84,0xfd,0x33,0x07,0xf7,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x93,0x87,0x87,0x00,0x03,0x27,0x07,0x00,0x23,0xa0,0xe7,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,0xb7,0x07,0x00,0x0e,0x13,0x67,0x17,0x00,
|
||||
0x23,0xa0,0xe7,0x00,0x13,0x00,0x00,0x00,0xb7,0x07,0x00,0x0e,0x83,0xa7,0x07,0x00,
|
||||
0x93,0xf7,0x17,0x00,0xe3,0x9a,0x07,0xfe,0x83,0x27,0x84,0xfe,0x93,0x87,0x17,0x00,
|
||||
0x23,0x24,0xf4,0xfe,0x83,0x27,0xc4,0xfe,0x93,0x87,0x17,0x00,0x23,0x26,0xf4,0xfe,
|
||||
0x03,0x27,0xc4,0xfe,0x83,0x27,0x44,0xfe,0xe3,0x6c,0xf7,0xf8,0x83,0x27,0x04,0xfe,
|
||||
0xe3,0x96,0x07,0xf4,0x03,0x27,0x44,0xfd,0x93,0x07,0x40,0x00,0x63,0xfe,0xe7,0x00,
|
||||
0xef,0xf0,0xdf,0xe8,0x13,0x00,0x00,0x00,0xb7,0x07,0x00,0x0e,0x83,0xa7,0x07,0x00,
|
||||
0x93,0xf7,0x17,0x00,0xe3,0x9a,0x07,0xfe,0xb7,0x07,0x00,0x0e,0x83,0xa7,0x07,0x00,
|
||||
0x93,0xf7,0x07,0x02,0x63,0x86,0x07,0x00,0x93,0x07,0x00,0x00,0x6f,0x00,0x80,0x00,
|
||||
0x93,0x07,0x10,0x00,0x13,0x85,0x07,0x00,0x83,0x20,0xc1,0x02,0x03,0x24,0x81,0x02,
|
||||
0x13,0x01,0x01,0x03,0x67,0x80,0x00,0x00,0x13,0x01,0x01,0xfe,0x23,0x2e,0x81,0x00,
|
||||
0x13,0x04,0x01,0x02,0x23,0x26,0xa4,0xfe,0xb7,0x07,0x00,0x0e,0x03,0xa7,0x07,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x13,0x77,0x97,0xff,0x23,0xa0,0xe7,0x00,0xb7,0x07,0x00,0x0e,
|
||||
0x03,0xa7,0x07,0x00,0xb7,0x07,0x00,0x0e,0x13,0x67,0x47,0x00,0x23,0xa0,0xe7,0x00,
|
||||
0xb7,0x07,0x00,0x0e,0x93,0x87,0x47,0x00,0x83,0x26,0xc4,0xfe,0x37,0x07,0x80,0x00,
|
||||
0x13,0x07,0xf7,0xff,0x33,0xf7,0xe6,0x00,0x23,0xa0,0xe7,0x00,0xb7,0x07,0x00,0x0e,
|
||||
0x03,0xa7,0x07,0x00,0xb7,0x07,0x00,0x0e,0x13,0x67,0x17,0x00,0x23,0xa0,0xe7,0x00,
|
||||
0x13,0x00,0x00,0x00,0xb7,0x07,0x00,0x0e,0x83,0xa7,0x07,0x00,0x93,0xf7,0x17,0x00,
|
||||
0xe3,0x9a,0x07,0xfe,0xb7,0x07,0x00,0x0e,0x83,0xa7,0x07,0x00,0x93,0xf7,0x07,0x02,
|
||||
0x63,0x86,0x07,0x00,0x93,0x07,0x00,0x00,0x6f,0x00,0x80,0x00,0x93,0x07,0x10,0x00,
|
||||
0x13,0x85,0x07,0x00,0x03,0x24,0xc1,0x01,0x13,0x01,0x01,0x02,0x67,0x80,0x00,0x00,
|
|
@ -85,16 +85,17 @@ class OpenOcd:
|
|||
return data
|
||||
|
||||
def readVariable(self, address):
|
||||
raw = self.send("ocd_mdw 0x%x" % address).split(": ")
|
||||
raw = self.send("mdw 0x%x" % address).split(": ")
|
||||
return None if (len(raw) < 2) else strToHex(raw[1])
|
||||
|
||||
def readMemory(self, wordLen, address, n):
|
||||
self.send("array unset output") # better to clear the array before
|
||||
self.send("mem2array output %d 0x%x %d" % (wordLen, address, n))
|
||||
|
||||
output = self.send("ocd_echo $output").split(" ")
|
||||
output = [*map(int, self.send("return $output").split(" "))]
|
||||
d = dict([tuple(output[i:i + 2]) for i in range(0, len(output), 2)])
|
||||
|
||||
return [int(output[2*i+1]) for i in range(len(output)//2)]
|
||||
return [d[k] for k in sorted(d.keys())]
|
||||
|
||||
def writeVariable(self, address, value):
|
||||
assert value is not None
|
||||
|
@ -115,8 +116,8 @@ if __name__ == "__main__":
|
|||
with OpenOcd() as ocd:
|
||||
ocd.send("reset")
|
||||
|
||||
show(ocd.send("ocd_echo \"echo says hi!\"")[:-1])
|
||||
show(ocd.send("capture \"ocd_halt\"")[:-1])
|
||||
show(ocd.send("capture { echo \"echo says hi!\" }")[:-1])
|
||||
show(ocd.send("capture \"halt\"")[:-1])
|
||||
|
||||
# Read the first few words at the RAM region (put starting adress of RAM
|
||||
# region into 'addr')
|
||||
|
|
|
@ -39,7 +39,7 @@ mdwParser = (manyTill anyChar (string ": ") *>
|
|||
|
||||
ocdMdw :: (InputStream ByteString, OutputStream ByteString) -> Integer -> Integer -> IO [Integer]
|
||||
ocdMdw s start count = do
|
||||
s <- ocdExec s $ "ocd_mdw " ++ show start ++ " " ++ show count
|
||||
s <- ocdExec s $ "mdw " ++ show start ++ " " ++ show count
|
||||
case parseOnly mdwParser (pack s) of
|
||||
Right r -> return $ concat r
|
||||
|
||||
|
|
|
@ -16,7 +16,7 @@ COMMAND_HANDLER(handle_hello_command)
|
|||
const char *sep, *name;
|
||||
int retval = CALL_COMMAND_HANDLER(handle_hello_args);
|
||||
if (ERROR_OK == retval)
|
||||
command_print(CMD_CTX, "Greetings%s%s!", sep, name);
|
||||
command_print(CMD, "Greetings%s%s!", sep, name);
|
||||
return retval;
|
||||
}
|
||||
@endcode
|
||||
|
|
226
doc/openocd.texi
226
doc/openocd.texi
|
@ -2370,8 +2370,8 @@ Returns the name of the debug adapter driver being used.
|
|||
@end deffn
|
||||
|
||||
@anchor{adapter_usb_location}
|
||||
@deffn Command {adapter usb location} <bus>-<port>[.<port>]...
|
||||
Specifies the physical USB port of the adapter to use. The path
|
||||
@deffn Command {adapter usb location} [<bus>-<port>[.<port>]...]
|
||||
Displays or specifies the physical USB port of the adapter to use. The path
|
||||
roots at @var{bus} and walks down the physical ports, with each
|
||||
@var{port} option specifying a deeper level in the bus topology, the last
|
||||
@var{port} denoting where the target adapter is actually plugged.
|
||||
|
@ -2514,7 +2514,7 @@ and are not restricted to containing only decimal digits.)
|
|||
|
||||
@deffn {Config Command} {ftdi_location} <bus>-<port>[.<port>]...
|
||||
@emph{DEPRECATED -- avoid using this.
|
||||
Use the @xref{adapter_usb_location, adapter usb location} command instead.}
|
||||
Use the command @ref{adapter_usb_location,,adapter usb location} instead.}
|
||||
|
||||
Specifies the physical USB port of the adapter to use. The path
|
||||
roots at @var{bus} and walks down the physical ports, with each
|
||||
|
@ -3895,10 +3895,14 @@ devices do not set the ack bit until sometime later.
|
|||
|
||||
@section Other TAP commands
|
||||
|
||||
@deffn Command {jtag cget} dotted.name @option{-idcode}
|
||||
Get the value of the IDCODE found in hardware.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {jtag cget} dotted.name @option{-event} event_name
|
||||
@deffnx Command {jtag configure} dotted.name @option{-event} event_name handler
|
||||
At this writing this TAP attribute
|
||||
mechanism is used only for event handling.
|
||||
mechanism is limited and used mostly for event handling.
|
||||
(It is not a direct analogue of the @code{cget}/@code{configure}
|
||||
mechanism for debugger targets.)
|
||||
See the next section for information about the available events.
|
||||
|
@ -4367,6 +4371,7 @@ compact Thumb2 instruction set.
|
|||
The current implementation supports eSi-32xx cores.
|
||||
@item @code{fa526} -- resembles arm920 (w/o Thumb)
|
||||
@item @code{feroceon} -- resembles arm926
|
||||
@item @code{mem_ap} -- this is an ARM debug infrastructure Access Port without a CPU, through which bus read and write cycles can be generated; it may be useful for working with non-CPU hardware behind an AP or during development of support for new CPUs.
|
||||
@item @code{mips_m4k} -- a MIPS core
|
||||
@item @code{xscale} -- this is actually an architecture,
|
||||
not a CPU type. It is based on the ARMv5 architecture.
|
||||
|
@ -4375,14 +4380,14 @@ The current implementation supports three JTAG TAP cores:
|
|||
@item @code{ls1_sap} -- this is the SAP on NXP LS102x CPUs,
|
||||
allowing access to physical memory addresses independently of CPU cores.
|
||||
@itemize @minus
|
||||
@item @code{OpenCores TAP} (See: @url{http://opencores.org/project,jtag})
|
||||
@item @code{OpenCores TAP} (See: @url{http://opencores.org/project@comma{}jtag})
|
||||
@item @code{Altera Virtual JTAG TAP} (See: @url{http://www.altera.com/literature/ug/ug_virtualjtag.pdf})
|
||||
@item @code{Xilinx BSCAN_* virtual JTAG interface} (See: @url{http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_2/spartan6_hdl.pdf})
|
||||
@end itemize
|
||||
And two debug interfaces cores:
|
||||
@itemize @minus
|
||||
@item @code{Advanced debug interface} (See: @url{http://opencores.org/project,adv_debug_sys})
|
||||
@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project,dbg_interface})
|
||||
@item @code{Advanced debug interface} (See: @url{http://opencores.org/project@comma{}adv_debug_sys})
|
||||
@item @code{SoC Debug Interface} (See: @url{http://opencores.org/project@comma{}dbg_interface})
|
||||
@end itemize
|
||||
@end itemize
|
||||
@end deffn
|
||||
|
@ -4683,23 +4688,35 @@ Invokes the handler for the event named @var{event_name}.
|
|||
code, for example by the reset code in @file{startup.tcl}.)
|
||||
@end deffn
|
||||
|
||||
@deffn Command {$target_name mdw} addr [count]
|
||||
@deffnx Command {$target_name mdh} addr [count]
|
||||
@deffnx Command {$target_name mdb} addr [count]
|
||||
@deffn Command {$target_name mdd} [phys] addr [count]
|
||||
@deffnx Command {$target_name mdw} [phys] addr [count]
|
||||
@deffnx Command {$target_name mdh} [phys] addr [count]
|
||||
@deffnx Command {$target_name mdb} [phys] addr [count]
|
||||
Display contents of address @var{addr}, as
|
||||
64-bit doublewords (@command{mdd}),
|
||||
32-bit words (@command{mdw}), 16-bit halfwords (@command{mdh}),
|
||||
or 8-bit bytes (@command{mdb}).
|
||||
When the current target has an MMU which is present and active,
|
||||
@var{addr} is interpreted as a virtual address.
|
||||
Otherwise, or if the optional @var{phys} flag is specified,
|
||||
@var{addr} is interpreted as a physical address.
|
||||
If @var{count} is specified, displays that many units.
|
||||
(If you want to manipulate the data instead of displaying it,
|
||||
see the @code{mem2array} primitives.)
|
||||
@end deffn
|
||||
|
||||
@deffn Command {$target_name mww} addr word
|
||||
@deffnx Command {$target_name mwh} addr halfword
|
||||
@deffnx Command {$target_name mwb} addr byte
|
||||
Writes the specified @var{word} (32 bits),
|
||||
@var{halfword} (16 bits), or @var{byte} (8-bit) pattern,
|
||||
@deffn Command {$target_name mwd} [phys] addr doubleword [count]
|
||||
@deffnx Command {$target_name mww} [phys] addr word [count]
|
||||
@deffnx Command {$target_name mwh} [phys] addr halfword [count]
|
||||
@deffnx Command {$target_name mwb} [phys] addr byte [count]
|
||||
Writes the specified @var{doubleword} (64 bits), @var{word} (32 bits),
|
||||
@var{halfword} (16 bits), or @var{byte} (8-bit) value,
|
||||
at the specified address @var{addr}.
|
||||
When the current target has an MMU which is present and active,
|
||||
@var{addr} is interpreted as a virtual address.
|
||||
Otherwise, or if the optional @var{phys} flag is specified,
|
||||
@var{addr} is interpreted as a physical address.
|
||||
If @var{count} is specified, fills that many units of consecutive address.
|
||||
@end deffn
|
||||
|
||||
@anchor{targetevents}
|
||||
|
@ -4909,7 +4926,6 @@ Use it in board specific configuration files, not interactively.
|
|||
@end quotation
|
||||
@end deffn
|
||||
|
||||
@comment the REAL name for this command is "ocd_flash_banks"
|
||||
@comment less confusing would be: "flash list" (like "nand list")
|
||||
@deffn Command {flash banks}
|
||||
Prints a one-line summary of each device that was
|
||||
|
@ -6986,6 +7002,23 @@ unlock str9 device.
|
|||
|
||||
@end deffn
|
||||
|
||||
@deffn {Flash Driver} swm050
|
||||
@cindex swm050
|
||||
All members of the swm050 microcontroller family from Foshan Synwit Tech.
|
||||
|
||||
@example
|
||||
flash bank $_FLASHNAME swm050 0x0 0x2000 0 0 $_TARGETNAME
|
||||
@end example
|
||||
|
||||
One swm050-specific command is defined:
|
||||
|
||||
@deffn Command {swm050 mass_erase} bank_id
|
||||
Erases the entire flash bank.
|
||||
@end deffn
|
||||
|
||||
@end deffn
|
||||
|
||||
|
||||
@deffn {Flash Driver} tms470
|
||||
Most members of the TMS470 microcontroller family from Texas Instruments
|
||||
include internal flash and use ARM7TDMI cores.
|
||||
|
@ -7466,67 +7499,6 @@ or @code{read_page} methods, so @command{nand raw_access} won't
|
|||
change any behavior.
|
||||
@end deffn
|
||||
|
||||
@section mFlash
|
||||
|
||||
@subsection mFlash Configuration
|
||||
@cindex mFlash Configuration
|
||||
|
||||
@deffn {Config Command} {mflash bank} soc base RST_pin target
|
||||
Configures a mflash for @var{soc} host bank at
|
||||
address @var{base}.
|
||||
The pin number format depends on the host GPIO naming convention.
|
||||
Currently, the mflash driver supports s3c2440 and pxa270.
|
||||
|
||||
Example for s3c2440 mflash where @var{RST pin} is GPIO B1:
|
||||
|
||||
@example
|
||||
mflash bank $_FLASHNAME s3c2440 0x10000000 1b 0
|
||||
@end example
|
||||
|
||||
Example for pxa270 mflash where @var{RST pin} is GPIO 43:
|
||||
|
||||
@example
|
||||
mflash bank $_FLASHNAME pxa270 0x08000000 43 0
|
||||
@end example
|
||||
@end deffn
|
||||
|
||||
@subsection mFlash commands
|
||||
@cindex mFlash commands
|
||||
|
||||
@deffn Command {mflash config pll} frequency
|
||||
Configure mflash PLL.
|
||||
The @var{frequency} is the mflash input frequency, in Hz.
|
||||
Issuing this command will erase mflash's whole internal nand and write new pll.
|
||||
After this command, mflash needs power-on-reset for normal operation.
|
||||
If pll was newly configured, storage and boot(optional) info also need to be update.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {mflash config boot}
|
||||
Configure bootable option.
|
||||
If bootable option is set, mflash offer the first 8 sectors
|
||||
(4kB) for boot.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {mflash config storage}
|
||||
Configure storage information.
|
||||
For the normal storage operation, this information must be
|
||||
written.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {mflash dump} num filename offset size
|
||||
Dump @var{size} bytes, starting at @var{offset} bytes from the
|
||||
beginning of the bank @var{num}, to the file named @var{filename}.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {mflash probe}
|
||||
Probe mflash.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {mflash write} num filename offset
|
||||
Write the binary file @var{filename} to mflash bank @var{num}, starting at
|
||||
@var{offset} bytes from the beginning of the bank.
|
||||
@end deffn
|
||||
|
||||
@node Flash Programming
|
||||
@chapter Flash Programming
|
||||
|
||||
|
@ -7940,10 +7912,12 @@ Please use their TARGET object siblings to avoid making assumptions
|
|||
about what TAP is the current target, or about MMU configuration.
|
||||
@end enumerate
|
||||
|
||||
@deffn Command mdw [phys] addr [count]
|
||||
@deffn Command mdd [phys] addr [count]
|
||||
@deffnx Command mdw [phys] addr [count]
|
||||
@deffnx Command mdh [phys] addr [count]
|
||||
@deffnx Command mdb [phys] addr [count]
|
||||
Display contents of address @var{addr}, as
|
||||
64-bit doublewords (@command{mdd}),
|
||||
32-bit words (@command{mdw}), 16-bit halfwords (@command{mdh}),
|
||||
or 8-bit bytes (@command{mdb}).
|
||||
When the current target has an MMU which is present and active,
|
||||
|
@ -7955,16 +7929,18 @@ If @var{count} is specified, displays that many units.
|
|||
see the @code{mem2array} primitives.)
|
||||
@end deffn
|
||||
|
||||
@deffn Command mww [phys] addr word
|
||||
@deffnx Command mwh [phys] addr halfword
|
||||
@deffnx Command mwb [phys] addr byte
|
||||
Writes the specified @var{word} (32 bits),
|
||||
@deffn Command mwd [phys] addr doubleword [count]
|
||||
@deffnx Command mww [phys] addr word [count]
|
||||
@deffnx Command mwh [phys] addr halfword [count]
|
||||
@deffnx Command mwb [phys] addr byte [count]
|
||||
Writes the specified @var{doubleword} (64 bits), @var{word} (32 bits),
|
||||
@var{halfword} (16 bits), or @var{byte} (8-bit) value,
|
||||
at the specified address @var{addr}.
|
||||
When the current target has an MMU which is present and active,
|
||||
@var{addr} is interpreted as a virtual address.
|
||||
Otherwise, or if the optional @var{phys} flag is specified,
|
||||
@var{addr} is interpreted as a physical address.
|
||||
If @var{count} is specified, fills that many units of consecutive address.
|
||||
@end deffn
|
||||
|
||||
@anchor{imageaccess}
|
||||
|
@ -9073,7 +9049,7 @@ Enable or disable trace output for all ITM stimulus ports.
|
|||
@subsection Cortex-M specific commands
|
||||
@cindex Cortex-M
|
||||
|
||||
@deffn Command {cortex_m maskisr} (@option{auto}|@option{on}|@option{off})
|
||||
@deffn Command {cortex_m maskisr} (@option{auto}|@option{on}|@option{off}|@option{steponly})
|
||||
Control masking (disabling) interrupts during target step/resume.
|
||||
|
||||
The @option{auto} option handles interrupts during stepping in a way that they
|
||||
|
@ -9083,6 +9059,11 @@ the next instruction where the core was halted. After the step interrupts
|
|||
are enabled again. If the interrupt handlers don't complete within 500ms,
|
||||
the step command leaves with the core running.
|
||||
|
||||
The @option{steponly} option disables interrupts during single-stepping but
|
||||
enables them during normal execution. This can be used as a partial workaround
|
||||
for 702596 erratum in Cortex-M7 r0p1. See "Cortex-M7 (AT610) and Cortex-M7 with
|
||||
FPU (AT611) Software Developer Errata Notice" from ARM for further details.
|
||||
|
||||
Note that a free hardware (FPB) breakpoint is required for the @option{auto}
|
||||
option. If no breakpoint is available at the time of the step, then the step
|
||||
is taken with interrupts enabled, i.e. the same way the @option{off} option
|
||||
|
@ -9165,6 +9146,14 @@ Selects whether interrupts will be processed when single stepping. The default c
|
|||
@option{on}.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {$target_name catch_exc} [@option{off}|@option{sec_el1}|@option{sec_el3}|@option{nsec_el1}|@option{nsec_el2}]+
|
||||
Cause @command{$target_name} to halt when an exception is taken. Any combination of
|
||||
Secure (sec) EL1/EL3 or Non-Secure (nsec) EL1/EL2 is valid. The target
|
||||
@command{$target_name} will halt before taking the exception. In order to resume
|
||||
the target, the exception catch must be disabled again with @command{$target_name catch_exc off}.
|
||||
Issuing the command without options prints the current configuration.
|
||||
@end deffn
|
||||
|
||||
@section EnSilica eSi-RISC Architecture
|
||||
|
||||
eSi-RISC is a highly configurable microprocessor architecture for embedded systems
|
||||
|
@ -9308,7 +9297,7 @@ collection.
|
|||
|
||||
@deffn Command {esirisc trace init}
|
||||
Initialize trace collection. This command must be called any time the
|
||||
configuration changes. If an trace buffer has been configured, the contents will
|
||||
configuration changes. If a trace buffer has been configured, the contents will
|
||||
be overwritten when trace collection starts.
|
||||
@end deffn
|
||||
|
||||
|
@ -9342,14 +9331,6 @@ be copied to an in-memory buffer identified by the @option{address} and
|
|||
@option{size} options using DMA.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {$target_name catch_exc} [@option{off}|@option{sec_el1}|@option{sec_el3}|@option{nsec_el1}|@option{nsec_el2}]+
|
||||
Cause @command{$target_name} to halt when an exception is taken. Any combination of
|
||||
Secure (sec) EL1/EL3 or Non-Secure (nsec) EL1/EL2 is valid. The target
|
||||
@command{$target_name} will halt before taking the exception. In order to resume
|
||||
the target, the exception catch must be disabled again with @command{$target_name catch_exc off}.
|
||||
Issuing the command without options prints the current configuration.
|
||||
@end deffn
|
||||
|
||||
@section Intel Architecture
|
||||
|
||||
Intel Quark X10xx is the first product in the Quark family of SoCs. It is an IA-32
|
||||
|
@ -9487,8 +9468,31 @@ This is used to access 64-bit floating point registers on 32-bit targets.
|
|||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_prefer_sba} on|off
|
||||
When on, prefer to use System Bus Access to access memory. When off, prefer to
|
||||
use the Program Buffer to access memory.
|
||||
When on, prefer to use System Bus Access to access memory. When off (default),
|
||||
prefer to use the Program Buffer to access memory.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_enable_virtual} on|off
|
||||
When on, memory accesses are performed on physical or virtual memory depending
|
||||
on the current system configuration. When off (default), all memory accessses are performed
|
||||
on physical memory.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_enable_virt2phys} on|off
|
||||
When on (default), memory accesses are performed on physical or virtual memory
|
||||
depending on the current satp configuration. When off, all memory accessses are
|
||||
performed on physical memory.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv resume_order} normal|reversed
|
||||
Some software assumes all harts are executing nearly continuously. Such
|
||||
software may be sensitive to the order that harts are resumed in. On harts
|
||||
that don't support hasel, this option allows the user to choose the order the
|
||||
harts are resumed in. If you are using this option, it's probably masking a
|
||||
race condition problem in your code.
|
||||
|
||||
Normal order is from lowest hart index to highest. This is the default
|
||||
behavior. Reversed order is from highest hart index to lowest.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_ir} (@option{idcode}|@option{dtmcs}|@option{dmi}) [value]
|
||||
|
@ -9507,19 +9511,33 @@ Enable or disable use of a BSCAN tunnel to reach DM. Supply the width of
|
|||
the DM transport TAP's instruction register to enable. Supply a value of 0 to disable.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_ebreakm} on|off
|
||||
Control dcsr.ebreakm. When on (default), M-mode ebreak instructions trap to
|
||||
OpenOCD. When off, they generate a breakpoint exception handled internally.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_ebreaks} on|off
|
||||
Control dcsr.ebreaks. When on (default), S-mode ebreak instructions trap to
|
||||
OpenOCD. When off, they generate a breakpoint exception handled internally.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv set_ebreaku} on|off
|
||||
Control dcsr.ebreaku. When on (default), U-mode ebreak instructions trap to
|
||||
OpenOCD. When off, they generate a breakpoint exception handled internally.
|
||||
@end deffn
|
||||
|
||||
@subsection RISC-V Authentication Commands
|
||||
|
||||
The following commands can be used to authenticate to a RISC-V system. Eg. a
|
||||
trivial challenge-response protocol could be implemented as follows in a
|
||||
configuration file, immediately following @command{init}:
|
||||
@example
|
||||
set challenge [ocd_riscv authdata_read]
|
||||
set challenge [riscv authdata_read]
|
||||
riscv authdata_write [expr $challenge + 1]
|
||||
@end example
|
||||
|
||||
@deffn Command {riscv authdata_read}
|
||||
Return the 32-bit value read from authdata. Note that to get read value back in
|
||||
a TCL script, it needs to be invoked as @command{ocd_riscv authdata_read}.
|
||||
Return the 32-bit value read from authdata.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv authdata_write} value
|
||||
|
@ -9532,9 +9550,7 @@ The following commands allow direct access to the Debug Module Interface, which
|
|||
can be used to interact with custom debug features.
|
||||
|
||||
@deffn Command {riscv dmi_read}
|
||||
Perform a 32-bit DMI read at address, returning the value. Note that to get
|
||||
read value back in a TCL script, it needs to be invoked as @command{ocd_riscv
|
||||
dmi_read}.
|
||||
Perform a 32-bit DMI read at address, returning the value.
|
||||
@end deffn
|
||||
|
||||
@deffn Command {riscv dmi_write} address value
|
||||
|
@ -10418,10 +10434,6 @@ should be passed in to the proc in question.
|
|||
By "low-level," we mean commands that a human would typically not
|
||||
invoke directly.
|
||||
|
||||
Some low-level commands need to be prefixed with "ocd_"; e.g.
|
||||
@command{ocd_flash_banks}
|
||||
is the low-level API upon which @command{flash banks} is implemented.
|
||||
|
||||
@itemize @bullet
|
||||
@item @b{mem2array} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
|
||||
|
||||
|
@ -10429,7 +10441,7 @@ Read memory and return as a Tcl array for script processing
|
|||
@item @b{array2mem} <@var{varname}> <@var{width}> <@var{addr}> <@var{nelems}>
|
||||
|
||||
Convert a Tcl array to memory locations and write the values
|
||||
@item @b{ocd_flash_banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
|
||||
@item @b{flash banks} <@var{driver}> <@var{base}> <@var{size}> <@var{chip_width}> <@var{bus_width}> <@var{target}> [@option{driver options} ...]
|
||||
|
||||
Return information about the flash banks
|
||||
|
||||
|
@ -10488,8 +10500,8 @@ interpreter terminating it with @code{0x1a} and wait for the return
|
|||
value (it will be terminated with @code{0x1a} as well). This can be
|
||||
repeated as many times as desired without reopening the connection.
|
||||
|
||||
Remember that most of the OpenOCD commands need to be prefixed with
|
||||
@code{ocd_} to get the results back. Sometimes you might also need the
|
||||
It is not needed anymore to prefix the OpenOCD commands with
|
||||
@code{ocd_} to get the results back. But sometimes you might need the
|
||||
@command{capture} command.
|
||||
|
||||
See @file{contrib/rpc_examples/} for specific client implementations.
|
||||
|
|
|
@ -79,5 +79,5 @@ if rev=`svn info 2>/dev/null | grep '^Last Changed Rev'`; then
|
|||
exit
|
||||
fi
|
||||
|
||||
# There's no reecognized repository; we must be a snapshot.
|
||||
# There's no recognized repository; we must be a snapshot.
|
||||
printf -- '-snapshot'
|
||||
|
|
|
@ -0,0 +1,19 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -e
|
||||
|
||||
BASE=`pwd`
|
||||
|
||||
NPROC=${NPROC:-$((`nproc`*2))}
|
||||
PARALLEL=${PARALLEL:--j${NPROC}}
|
||||
|
||||
echo "building openocd......"
|
||||
|
||||
./bootstrap
|
||||
./configure --build=i686-w64-mingw32 --host=i686-w64-mingw32 --disable-gccwarnings CFLAGS="-O2"
|
||||
|
||||
sed -i '$d' ./src/jtag/drivers/libjaylink/config.h
|
||||
sed -i '$d' ./src/jtag/drivers/libjaylink/config.h
|
||||
sed -i '$d' ./src/jtag/drivers/libjaylink/config.h
|
||||
|
||||
make ${PARALLEL}
|
|
@ -0,0 +1,25 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -e
|
||||
|
||||
BASE=`pwd`
|
||||
|
||||
NPROC=${NPROC:-$((`nproc`*2))}
|
||||
PARALLEL=${PARALLEL:--j${NPROC}}
|
||||
|
||||
echo "relase openocd......"
|
||||
|
||||
rm -rf release
|
||||
mkdir -p release
|
||||
|
||||
cp ./src/openocd.exe ./release
|
||||
cp /mingw32/bin/libconfuse-2.dll ./release
|
||||
cp /mingw32/bin/libftdi1.dll ./release
|
||||
cp /mingw32/bin/libftdipp1.dll ./release
|
||||
cp /mingw32/bin/libgcc_s_dw2-1.dll ./release
|
||||
cp /mingw32/bin/libhidapi-0.dll ./release
|
||||
cp /mingw32/bin/libiconv-2.dll ./release
|
||||
cp /mingw32/bin/libintl-8.dll ./release
|
||||
cp /mingw32/bin/libstdc++-6.dll ./release
|
||||
cp /mingw32/bin/libusb-1.0.dll ./release
|
||||
cp /mingw32/bin/libwinpthread-1.dll ./release
|
|
@ -1,7 +1,6 @@
|
|||
noinst_LTLIBRARIES += %D%/libflash.la
|
||||
%C%_libflash_la_SOURCES = \
|
||||
%D%/common.c %D%/common.h \
|
||||
%D%/mflash.c %D%/mflash.h
|
||||
%D%/common.c %D%/common.h
|
||||
|
||||
%C%_libflash_la_LIBADD = \
|
||||
%D%/nor/libocdflashnor.la \
|
||||
|
|
1449
src/flash/mflash.c
1449
src/flash/mflash.c
File diff suppressed because it is too large
Load Diff
|
@ -1,289 +0,0 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2007-2008 by unsik Kim <donari75@gmail.com> *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
|
||||
***************************************************************************/
|
||||
|
||||
#ifndef OPENOCD_FLASH_MFLASH_H
|
||||
#define OPENOCD_FLASH_MFLASH_H
|
||||
|
||||
struct command_context;
|
||||
|
||||
typedef unsigned long mg_io_uint32;
|
||||
typedef unsigned short mg_io_uint16;
|
||||
typedef unsigned char mg_io_uint8;
|
||||
|
||||
struct mflash_gpio_num {
|
||||
char port[2];
|
||||
signed short num;
|
||||
};
|
||||
|
||||
struct mflash_gpio_drv {
|
||||
const char *name;
|
||||
int (*set_gpio_to_output)(struct mflash_gpio_num gpio);
|
||||
int (*set_gpio_output_val)(struct mflash_gpio_num gpio, uint8_t val);
|
||||
};
|
||||
|
||||
typedef struct _mg_io_type_drv_info {
|
||||
|
||||
mg_io_uint16 general_configuration; /* 00 */
|
||||
mg_io_uint16 number_of_cylinders; /* 01 */
|
||||
mg_io_uint16 reserved1; /* 02 */
|
||||
mg_io_uint16 number_of_heads; /* 03 */
|
||||
mg_io_uint16 unformatted_bytes_per_track; /* 04 */
|
||||
mg_io_uint16 unformatted_bytes_per_sector; /* 05 */
|
||||
mg_io_uint16 sectors_per_track; /* 06 */
|
||||
mg_io_uint16 vendor_unique1[3]; /* 07/08/09 */
|
||||
|
||||
mg_io_uint8 serial_number[20]; /* 10~19 */
|
||||
|
||||
mg_io_uint16 buffer_type; /* 20 */
|
||||
mg_io_uint16 buffer_sector_size; /* 21 */
|
||||
mg_io_uint16 number_of_ecc_bytes; /* 22 */
|
||||
|
||||
mg_io_uint8 firmware_revision[8]; /* 23~26 */
|
||||
mg_io_uint8 model_number[40]; /* 27 */
|
||||
|
||||
mg_io_uint8 maximum_block_transfer; /* 47 low byte */
|
||||
mg_io_uint8 vendor_unique2; /* 47 high byte */
|
||||
mg_io_uint16 dword_io; /* 48 */
|
||||
|
||||
mg_io_uint16 capabilities; /* 49 */
|
||||
mg_io_uint16 reserved2; /* 50 */
|
||||
|
||||
mg_io_uint8 vendor_unique3; /* 51 low byte */
|
||||
mg_io_uint8 pio_cycle_timing_mode; /* 51 high byte */
|
||||
mg_io_uint8 vendor_unique4; /* 52 low byte */
|
||||
mg_io_uint8 dma_cycle_timing_mode; /* 52 high byte */
|
||||
mg_io_uint16 translation_fields_valid; /* 53 (low bit) */
|
||||
mg_io_uint16 number_of_current_cylinders; /* 54 */
|
||||
mg_io_uint16 number_of_current_heads; /* 55 */
|
||||
mg_io_uint16 current_sectors_per_track; /* 56 */
|
||||
mg_io_uint16 current_sector_capacity_lo; /* 57 & 58 */
|
||||
mg_io_uint16 current_sector_capacity_hi; /* 57 & 58 */
|
||||
mg_io_uint8 multi_sector_count; /* 59 low */
|
||||
mg_io_uint8 multi_sector_setting_valid; /* 59 high (low bit) */
|
||||
|
||||
mg_io_uint16 total_user_addressable_sectors_lo; /* 60 & 61 */
|
||||
mg_io_uint16 total_user_addressable_sectors_hi; /* 60 & 61 */
|
||||
|
||||
mg_io_uint8 single_dma_modes_supported; /* 62 low byte */
|
||||
mg_io_uint8 single_dma_transfer_active; /* 62 high byte */
|
||||
mg_io_uint8 multi_dma_modes_supported; /* 63 low byte */
|
||||
mg_io_uint8 multi_dma_transfer_active; /* 63 high byte */
|
||||
mg_io_uint16 adv_pio_mode;
|
||||
mg_io_uint16 min_dma_cyc;
|
||||
mg_io_uint16 recommend_dma_cyc;
|
||||
mg_io_uint16 min_pio_cyc_no_iordy;
|
||||
mg_io_uint16 min_pio_cyc_with_iordy;
|
||||
mg_io_uint8 reserved3[22];
|
||||
mg_io_uint16 major_ver_num;
|
||||
mg_io_uint16 minor_ver_num;
|
||||
mg_io_uint16 feature_cmd_set_suprt0;
|
||||
mg_io_uint16 feature_cmd_set_suprt1;
|
||||
mg_io_uint16 feature_cmd_set_suprt2;
|
||||
mg_io_uint16 feature_cmd_set_en0;
|
||||
mg_io_uint16 feature_cmd_set_en1;
|
||||
mg_io_uint16 feature_cmd_set_en2;
|
||||
mg_io_uint16 reserved4;
|
||||
mg_io_uint16 req_time_for_security_er_done;
|
||||
mg_io_uint16 req_time_for_enhan_security_er_done;
|
||||
mg_io_uint16 adv_pwr_mgm_lvl_val;
|
||||
mg_io_uint16 reserved5;
|
||||
mg_io_uint16 re_of_hw_rst;
|
||||
mg_io_uint8 reserved6[68];
|
||||
mg_io_uint16 security_stas;
|
||||
mg_io_uint8 vendor_uniq_bytes[62];
|
||||
mg_io_uint16 cfa_pwr_mode;
|
||||
mg_io_uint8 reserved7[186];
|
||||
|
||||
mg_io_uint16 scts_per_secure_data_unit;
|
||||
mg_io_uint16 integrity_word;
|
||||
|
||||
} mg_io_type_drv_info;
|
||||
|
||||
typedef struct _mg_pll_t {
|
||||
unsigned int lock_cyc;
|
||||
unsigned short feedback_div; /* 9bit divider */
|
||||
unsigned char input_div; /* 5bit divider */
|
||||
unsigned char output_div; /* 2bit divider */
|
||||
} mg_pll_t;
|
||||
|
||||
struct mg_drv_info {
|
||||
mg_io_type_drv_info drv_id;
|
||||
uint32_t tot_sects;
|
||||
};
|
||||
|
||||
struct mflash_bank {
|
||||
uint32_t base;
|
||||
|
||||
struct mflash_gpio_num rst_pin;
|
||||
|
||||
struct mflash_gpio_drv *gpio_drv;
|
||||
struct target *target;
|
||||
struct mg_drv_info *drv_info;
|
||||
};
|
||||
|
||||
int mflash_register_commands(struct command_context *cmd_ctx);
|
||||
|
||||
#define MG_MFLASH_SECTOR_SIZE (0x200) /* 512Bytes = 2^9 */
|
||||
#define MG_MFLASH_SECTOR_SIZE_MASK (0x200-1)
|
||||
#define MG_MFLASH_SECTOR_SIZE_SHIFT (9)
|
||||
|
||||
#define MG_BUFFER_OFFSET 0x8000
|
||||
#define MG_REG_OFFSET 0xC000
|
||||
#define MG_REG_FEATURE 0x2 /* write case */
|
||||
#define MG_REG_ERROR 0x2 /* read case */
|
||||
#define MG_REG_SECT_CNT 0x4
|
||||
#define MG_REG_SECT_NUM 0x6
|
||||
#define MG_REG_CYL_LOW 0x8
|
||||
#define MG_REG_CYL_HIGH 0xA
|
||||
#define MG_REG_DRV_HEAD 0xC
|
||||
#define MG_REG_COMMAND 0xE /* write case */
|
||||
#define MG_REG_STATUS 0xE /* read case */
|
||||
#define MG_REG_DRV_CTRL 0x10
|
||||
#define MG_REG_BURST_CTRL 0x12
|
||||
|
||||
#define MG_OEM_DISK_WAIT_TIME_LONG 15000 /* msec */
|
||||
#define MG_OEM_DISK_WAIT_TIME_NORMAL 3000 /* msec */
|
||||
#define MG_OEM_DISK_WAIT_TIME_SHORT 1000 /* msec */
|
||||
|
||||
#define MG_PLL_CLK_OUT 66000000.0 /* 66Mhz */
|
||||
#define MG_PLL_MAX_FEEDBACKDIV_VAL 512
|
||||
#define MG_PLL_MAX_INPUTDIV_VAL 32
|
||||
#define MG_PLL_MAX_OUTPUTDIV_VAL 4
|
||||
|
||||
#define MG_PLL_STD_INPUTCLK 12000000.0 /* 12Mhz */
|
||||
#define MG_PLL_STD_LOCKCYCLE 10000
|
||||
|
||||
#define MG_UNLOCK_OTP_AREA 0xFF
|
||||
|
||||
#define MG_FILEIO_CHUNK 1048576
|
||||
|
||||
#define ERROR_MG_IO (-1600)
|
||||
#define ERROR_MG_TIMEOUT (-1601)
|
||||
#define ERROR_MG_INVALID_PLL (-1603)
|
||||
#define ERROR_MG_INTERFACE (-1604)
|
||||
#define ERROR_MG_INVALID_OSC (-1605)
|
||||
#define ERROR_MG_UNSUPPORTED_SOC (-1606)
|
||||
|
||||
typedef enum _mg_io_type_wait {
|
||||
|
||||
mg_io_wait_bsy = 1,
|
||||
mg_io_wait_not_bsy = 2,
|
||||
mg_io_wait_rdy = 3,
|
||||
mg_io_wait_drq = 4, /* wait for data request */
|
||||
mg_io_wait_drq_noerr = 5, /* wait for DRQ but ignore the error status bit */
|
||||
mg_io_wait_rdy_noerr = 6 /* wait for ready, but ignore error status bit */
|
||||
|
||||
} mg_io_type_wait;
|
||||
|
||||
/*= "Status Register" bit masks. */
|
||||
typedef enum _mg_io_type_rbit_status {
|
||||
|
||||
mg_io_rbit_status_error = 0x01, /* error bit in status register */
|
||||
mg_io_rbit_status_corrected_error = 0x04, /* corrected error in status register */
|
||||
mg_io_rbit_status_data_req = 0x08, /* data request bit in status register */
|
||||
mg_io_rbit_status_seek_done = 0x10, /* DSC - Drive Seek Complete */
|
||||
mg_io_rbit_status_write_fault = 0x20, /* DWF - Drive Write Fault */
|
||||
mg_io_rbit_status_ready = 0x40,
|
||||
mg_io_rbit_status_busy = 0x80
|
||||
|
||||
} mg_io_type_rbit_status;
|
||||
|
||||
/*= "Error Register" bit masks. */
|
||||
typedef enum _mg_io_type_rbit_error {
|
||||
|
||||
mg_io_rbit_err_general = 0x01,
|
||||
mg_io_rbit_err_aborted = 0x04,
|
||||
mg_io_rbit_err_bad_sect_num = 0x10,
|
||||
mg_io_rbit_err_uncorrectable = 0x40,
|
||||
mg_io_rbit_err_bad_block = 0x80
|
||||
|
||||
} mg_io_type_rbit_error;
|
||||
|
||||
/* = "Device Control Register" bit. */
|
||||
typedef enum _mg_io_type_rbit_devc {
|
||||
|
||||
mg_io_rbit_devc_intr = 0x02, /* interrupt enable bit (1:disable, 0:enable) */
|
||||
mg_io_rbit_devc_srst = 0x04 /* softwrae reset bit (1:assert, 0:de-assert) */
|
||||
|
||||
} mg_io_type_rbit_devc;
|
||||
|
||||
/* "Drive Select/Head Register" values. */
|
||||
typedef enum _mg_io_type_rval_dev {
|
||||
|
||||
mg_io_rval_dev_must_be_on = 0x80, /* These 1 bits are always on */
|
||||
mg_io_rval_dev_drv_master = (0x00 | mg_io_rval_dev_must_be_on), /* Master */
|
||||
mg_io_rval_dev_drv_slave0 = (0x10 | mg_io_rval_dev_must_be_on), /* Slave0 */
|
||||
mg_io_rval_dev_drv_slave1 = (0x20 | mg_io_rval_dev_must_be_on), /* Slave1 */
|
||||
mg_io_rval_dev_drv_slave2 = (0x30 | mg_io_rval_dev_must_be_on), /* Slave2 */
|
||||
mg_io_rval_dev_lba_mode = (0x40 | mg_io_rval_dev_must_be_on)
|
||||
|
||||
} mg_io_type_rval_dev;
|
||||
|
||||
typedef enum _mg_io_type_cmd {
|
||||
mg_io_cmd_read = 0x20,
|
||||
mg_io_cmd_write = 0x30,
|
||||
|
||||
mg_io_cmd_setmul = 0xC6,
|
||||
mg_io_cmd_readmul = 0xC4,
|
||||
mg_io_cmd_writemul = 0xC5,
|
||||
|
||||
mg_io_cmd_idle = 0x97, /* 0xE3 */
|
||||
mg_io_cmd_idle_immediate = 0x95, /* 0xE1 */
|
||||
|
||||
mg_io_cmd_setsleep = 0x99, /* 0xE6 */
|
||||
mg_io_cmd_stdby = 0x96, /* 0xE2 */
|
||||
mg_io_cmd_stdby_immediate = 0x94, /* 0xE0 */
|
||||
|
||||
mg_io_cmd_identify = 0xEC,
|
||||
mg_io_cmd_set_feature = 0xEF,
|
||||
|
||||
mg_io_cmd_confirm_write = 0x3C,
|
||||
mg_io_cmd_confirm_read = 0x40,
|
||||
mg_io_cmd_wakeup = 0xC3
|
||||
|
||||
} mg_io_type_cmd;
|
||||
|
||||
typedef enum _mg_feature_id {
|
||||
mg_feature_id_transmode = 0x3
|
||||
} mg_feature_id;
|
||||
|
||||
typedef enum _mg_feature_val {
|
||||
mg_feature_val_trans_default = 0x0,
|
||||
mg_feature_val_trans_vcmd = 0x3,
|
||||
mg_feature_val_trand_vcmds = 0x2
|
||||
} mg_feature_val;
|
||||
|
||||
typedef enum _mg_vcmd {
|
||||
mg_vcmd_update_xipinfo = 0xFA, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_verify_fwpatch = 0xFB, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_update_stgdrvinfo = 0xFC, /* IOM identificatin info program command */
|
||||
mg_vcmd_prep_fwpatch = 0xFD, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_exe_fwpatch = 0xFE, /* FWPATCH commmand through IOM I/O */
|
||||
mg_vcmd_wr_pll = 0x8B,
|
||||
mg_vcmd_purge_nand = 0x8C, /* Only for Seagle */
|
||||
mg_vcmd_lock_otp = 0x8D,
|
||||
mg_vcmd_rd_otp = 0x8E,
|
||||
mg_vcmd_wr_otp = 0x8F
|
||||
} mg_vcmd;
|
||||
|
||||
typedef enum _mg_opmode {
|
||||
mg_op_mode_xip = 1, /* TRUE XIP */
|
||||
mg_op_mode_snd = 2, /* BOOT + Storage */
|
||||
mg_op_mode_stg = 0 /* Only Storage */
|
||||
} mg_opmode;
|
||||
|
||||
#endif /* OPENOCD_FLASH_MFLASH_H */
|
|
@ -547,14 +547,14 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
|
|||
unsigned num, address_line;
|
||||
|
||||
if (CMD_ARGC != 2) {
|
||||
command_print(CMD_CTX, "incorrect number of arguments for 'at91sam9 cle' command");
|
||||
command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -582,7 +582,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
|
|||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
|
@ -610,7 +610,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
|
|||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
|
@ -641,7 +641,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
|
|||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
|
|
|
@ -217,7 +217,7 @@ COMMAND_HELPER(nand_command_get_device, unsigned name_index,
|
|||
COMMAND_PARSE_NUMBER(uint, str, num);
|
||||
*nand = get_nand_device_by_num(num);
|
||||
if (!*nand) {
|
||||
command_print(CMD_CTX, "NAND flash device '%s' not found", str);
|
||||
command_print(CMD, "NAND flash device '%s' not found", str);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
return ERROR_OK;
|
||||
|
|
|
@ -54,12 +54,12 @@ void nand_fileio_init(struct nand_fileio_state *state)
|
|||
state->oob_format = NAND_OOB_NONE;
|
||||
}
|
||||
|
||||
int nand_fileio_start(struct command_context *cmd_ctx,
|
||||
int nand_fileio_start(struct command_invocation *cmd,
|
||||
struct nand_device *nand, const char *filename, int filemode,
|
||||
struct nand_fileio_state *state)
|
||||
{
|
||||
if (state->address % nand->page_size) {
|
||||
command_print(cmd_ctx, "only page-aligned addresses are supported");
|
||||
command_print(cmd, "only page-aligned addresses are supported");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -69,7 +69,7 @@ int nand_fileio_start(struct command_context *cmd_ctx,
|
|||
int retval = fileio_open(&state->fileio, filename, filemode, FILEIO_BINARY);
|
||||
if (ERROR_OK != retval) {
|
||||
const char *msg = (FILEIO_READ == filemode) ? "read" : "write";
|
||||
command_print(cmd_ctx, "failed to open '%s' for %s access",
|
||||
command_print(cmd, "failed to open '%s' for %s access",
|
||||
filename, msg);
|
||||
return retval;
|
||||
}
|
||||
|
@ -131,7 +131,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
|
|||
return retval;
|
||||
|
||||
if (NULL == nand->device) {
|
||||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
|
||||
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
|
||||
return ERROR_NAND_DEVICE_NOT_PROBED;
|
||||
}
|
||||
|
||||
|
@ -139,7 +139,7 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
|
|||
if (need_size) {
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[3], state->size);
|
||||
if (state->size % nand->page_size) {
|
||||
command_print(CMD_CTX, "only page-aligned sizes are supported");
|
||||
command_print(CMD, "only page-aligned sizes are supported");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
@ -155,13 +155,13 @@ COMMAND_HELPER(nand_fileio_parse_args, struct nand_fileio_state *state,
|
|||
else if (sw_ecc && !strcmp(CMD_ARGV[i], "oob_softecc_kw"))
|
||||
state->oob_format |= NAND_OOB_SW_ECC_KW;
|
||||
else {
|
||||
command_print(CMD_CTX, "unknown option: %s", CMD_ARGV[i]);
|
||||
command_print(CMD, "unknown option: %s", CMD_ARGV[i]);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
retval = nand_fileio_start(CMD_CTX, nand, CMD_ARGV[1], filemode, state);
|
||||
retval = nand_fileio_start(CMD, nand, CMD_ARGV[1], filemode, state);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
|
|
|
@ -41,7 +41,7 @@ struct nand_fileio_state {
|
|||
};
|
||||
|
||||
void nand_fileio_init(struct nand_fileio_state *state);
|
||||
int nand_fileio_start(struct command_context *cmd_ctx,
|
||||
int nand_fileio_start(struct command_invocation *cmd,
|
||||
struct nand_device *nand, const char *filename, int filemode,
|
||||
struct nand_fileio_state *state);
|
||||
int nand_fileio_cleanup(struct nand_fileio_state *state);
|
||||
|
|
|
@ -237,7 +237,7 @@ static int lpc3180_init(struct nand_device *nand)
|
|||
|
||||
/* SLC_CFG = 0x (Force nCE assert, DMA ECC enabled, ECC enabled, DMA burst enabled,
|
||||
*DMA read from SLC, WIDTH = bus_width) */
|
||||
target_write_u32(target, 0x20020014, 0x3e | (bus_width == 16) ? 1 : 0);
|
||||
target_write_u32(target, 0x20020014, 0x3e | ((bus_width == 16) ? 1 : 0));
|
||||
|
||||
/* SLC_IEN = 3 (INT_RDY_EN = 1) ,(INT_TC_STAT = 1) */
|
||||
target_write_u32(target, 0x20020020, 0x03);
|
||||
|
@ -1290,7 +1290,7 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
|
|||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
struct nand_device *nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "nand device '#%s' is out of bounds", CMD_ARGV[0]);
|
||||
command_print(CMD, "nand device '#%s' is out of bounds", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1310,10 +1310,10 @@ COMMAND_HANDLER(handle_lpc3180_select_command)
|
|||
}
|
||||
|
||||
if (lpc3180_info->selected_controller == LPC3180_MLC_CONTROLLER)
|
||||
command_print(CMD_CTX, "%s controller selected",
|
||||
command_print(CMD, "%s controller selected",
|
||||
selected[lpc3180_info->selected_controller]);
|
||||
else
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
lpc3180_info->is_bulk ? "%s controller selected bulk mode is available" :
|
||||
"%s controller selected bulk mode is not available",
|
||||
selected[lpc3180_info->selected_controller]);
|
||||
|
|
|
@ -332,7 +332,7 @@ static int lpc32xx_init(struct nand_device *nand)
|
|||
WIDTH = bus_width)
|
||||
*/
|
||||
retval = target_write_u32(target, 0x20020014,
|
||||
0x3e | (bus_width == 16) ? 1 : 0);
|
||||
0x3e | ((bus_width == 16) ? 1 : 0));
|
||||
if (ERROR_OK != retval) {
|
||||
LOG_ERROR("could not set SLC_CFG");
|
||||
return ERROR_NAND_OPERATION_FAILED;
|
||||
|
@ -1760,7 +1760,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
|
|||
COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
|
||||
struct nand_device *nand = get_nand_device_by_num(num);
|
||||
if (!nand) {
|
||||
command_print(CMD_CTX, "nand device '#%s' is out of bounds",
|
||||
command_print(CMD, "nand device '#%s' is out of bounds",
|
||||
CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1778,7 +1778,7 @@ COMMAND_HANDLER(handle_lpc32xx_select_command)
|
|||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "%s controller selected",
|
||||
command_print(CMD, "%s controller selected",
|
||||
selected[lpc32xx_info->selected_controller]);
|
||||
|
||||
return ERROR_OK;
|
||||
|
|
|
@ -157,7 +157,7 @@ COMMAND_HANDLER(handle_mxc_biswap_command)
|
|||
|
||||
int retval = CALL_COMMAND_HANDLER(nand_command_get_device, 0, &nand);
|
||||
if (retval != ERROR_OK) {
|
||||
command_print(CMD_CTX, "invalid nand device number or name: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "invalid nand device number or name: %s", CMD_ARGV[0]);
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
|
@ -169,9 +169,9 @@ COMMAND_HANDLER(handle_mxc_biswap_command)
|
|||
mxc_nf_info->flags.biswap_enabled = false;
|
||||
}
|
||||
if (mxc_nf_info->flags.biswap_enabled)
|
||||
command_print(CMD_CTX, "BI-swapping enabled on %s", nand->name);
|
||||
command_print(CMD, "BI-swapping enabled on %s", nand->name);
|
||||
else
|
||||
command_print(CMD_CTX, "BI-swapping disabled on %s", nand->name);
|
||||
command_print(CMD, "BI-swapping disabled on %s", nand->name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -193,7 +193,8 @@ static const struct command_registration mxc_nand_command_handler[] = {
|
|||
.name = "mxc",
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "MXC NAND flash controller commands",
|
||||
.chain = mxc_sub_command_handlers
|
||||
.chain = mxc_sub_command_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -37,20 +37,20 @@ COMMAND_HANDLER(handle_nand_list_command)
|
|||
int i;
|
||||
|
||||
if (!nand_devices) {
|
||||
command_print(CMD_CTX, "no NAND flash devices configured");
|
||||
command_print(CMD, "no NAND flash devices configured");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
for (p = nand_devices, i = 0; p; p = p->next, i++) {
|
||||
if (p->device)
|
||||
command_print(CMD_CTX, "#%i: %s (%s) "
|
||||
command_print(CMD, "#%i: %s (%s) "
|
||||
"pagesize: %i, buswidth: %i,\n\t"
|
||||
"blocksize: %i, blocks: %i",
|
||||
i, p->device->name, p->manufacturer->name,
|
||||
p->page_size, p->bus_width,
|
||||
p->erase_size, p->num_blocks);
|
||||
else
|
||||
command_print(CMD_CTX, "#%i: not probed", i);
|
||||
command_print(CMD, "#%i: not probed", i);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
@ -87,7 +87,7 @@ COMMAND_HANDLER(handle_nand_info_command)
|
|||
return retval;
|
||||
|
||||
if (NULL == p->device) {
|
||||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
|
||||
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -97,7 +97,7 @@ COMMAND_HANDLER(handle_nand_info_command)
|
|||
if (last >= p->num_blocks)
|
||||
last = p->num_blocks - 1;
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
|
||||
i++,
|
||||
p->device->name,
|
||||
|
@ -123,7 +123,7 @@ COMMAND_HANDLER(handle_nand_info_command)
|
|||
else
|
||||
bad_state = " (block condition unknown)";
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"\t#%i: 0x%8.8" PRIx32 " (%" PRId32 "kB) %s%s",
|
||||
j,
|
||||
p->blocks[j].offset,
|
||||
|
@ -147,7 +147,7 @@ COMMAND_HANDLER(handle_nand_probe_command)
|
|||
|
||||
retval = nand_probe(p);
|
||||
if (retval == ERROR_OK) {
|
||||
command_print(CMD_CTX, "NAND flash device '%s (%s)' found",
|
||||
command_print(CMD, "NAND flash device '%s (%s)' found",
|
||||
p->device->name, p->manufacturer->name);
|
||||
}
|
||||
|
||||
|
@ -189,7 +189,7 @@ COMMAND_HANDLER(handle_nand_erase_command)
|
|||
|
||||
retval = nand_erase(p, offset, offset + length - 1);
|
||||
if (retval == ERROR_OK) {
|
||||
command_print(CMD_CTX, "erased blocks %lu to %lu "
|
||||
command_print(CMD, "erased blocks %lu to %lu "
|
||||
"on NAND flash device #%s '%s'",
|
||||
offset, offset + length - 1,
|
||||
CMD_ARGV[0], p->device->name);
|
||||
|
@ -233,7 +233,7 @@ COMMAND_HANDLER(handle_nand_check_bad_blocks_command)
|
|||
|
||||
retval = nand_build_bbt(p, first, last);
|
||||
if (retval == ERROR_OK) {
|
||||
command_print(CMD_CTX, "checked NAND flash device for bad blocks, "
|
||||
command_print(CMD, "checked NAND flash device for bad blocks, "
|
||||
"use \"nand info\" command to list blocks");
|
||||
}
|
||||
|
||||
|
@ -253,7 +253,7 @@ COMMAND_HANDLER(handle_nand_write_command)
|
|||
while (s.size > 0) {
|
||||
int bytes_read = nand_fileio_read(nand, &s);
|
||||
if (bytes_read <= 0) {
|
||||
command_print(CMD_CTX, "error while reading file");
|
||||
command_print(CMD, "error while reading file");
|
||||
nand_fileio_cleanup(&s);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
@ -262,7 +262,7 @@ COMMAND_HANDLER(handle_nand_write_command)
|
|||
retval = nand_write_page(nand, s.address / nand->page_size,
|
||||
s.page, s.page_size, s.oob, s.oob_size);
|
||||
if (ERROR_OK != retval) {
|
||||
command_print(CMD_CTX, "failed writing file %s "
|
||||
command_print(CMD, "failed writing file %s "
|
||||
"to NAND flash %s at offset 0x%8.8" PRIx32,
|
||||
CMD_ARGV[1], CMD_ARGV[0], s.address);
|
||||
nand_fileio_cleanup(&s);
|
||||
|
@ -272,7 +272,7 @@ COMMAND_HANDLER(handle_nand_write_command)
|
|||
}
|
||||
|
||||
if (nand_fileio_finish(&s) == ERROR_OK) {
|
||||
command_print(CMD_CTX, "wrote file %s to NAND flash %s up to "
|
||||
command_print(CMD, "wrote file %s to NAND flash %s up to "
|
||||
"offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
|
||||
CMD_ARGV[1], CMD_ARGV[0], s.address, duration_elapsed(&s.bench),
|
||||
duration_kbps(&s.bench, total_bytes));
|
||||
|
@ -294,7 +294,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
|
|||
dev.address = file.address;
|
||||
dev.size = file.size;
|
||||
dev.oob_format = file.oob_format;
|
||||
retval = nand_fileio_start(CMD_CTX, nand, NULL, FILEIO_NONE, &dev);
|
||||
retval = nand_fileio_start(CMD, nand, NULL, FILEIO_NONE, &dev);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
|
@ -302,7 +302,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
|
|||
retval = nand_read_page(nand, dev.address / dev.page_size,
|
||||
dev.page, dev.page_size, dev.oob, dev.oob_size);
|
||||
if (ERROR_OK != retval) {
|
||||
command_print(CMD_CTX, "reading NAND flash page failed");
|
||||
command_print(CMD, "reading NAND flash page failed");
|
||||
nand_fileio_cleanup(&dev);
|
||||
nand_fileio_cleanup(&file);
|
||||
return retval;
|
||||
|
@ -310,7 +310,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
|
|||
|
||||
int bytes_read = nand_fileio_read(nand, &file);
|
||||
if (bytes_read <= 0) {
|
||||
command_print(CMD_CTX, "error while reading file");
|
||||
command_print(CMD, "error while reading file");
|
||||
nand_fileio_cleanup(&dev);
|
||||
nand_fileio_cleanup(&file);
|
||||
return ERROR_FAIL;
|
||||
|
@ -318,7 +318,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
|
|||
|
||||
if ((dev.page && memcmp(dev.page, file.page, dev.page_size)) ||
|
||||
(dev.oob && memcmp(dev.oob, file.oob, dev.oob_size))) {
|
||||
command_print(CMD_CTX, "NAND flash contents differ "
|
||||
command_print(CMD, "NAND flash contents differ "
|
||||
"at 0x%8.8" PRIx32, dev.address);
|
||||
nand_fileio_cleanup(&dev);
|
||||
nand_fileio_cleanup(&file);
|
||||
|
@ -330,7 +330,7 @@ COMMAND_HANDLER(handle_nand_verify_command)
|
|||
}
|
||||
|
||||
if (nand_fileio_finish(&file) == ERROR_OK) {
|
||||
command_print(CMD_CTX, "verified file %s in NAND flash %s "
|
||||
command_print(CMD, "verified file %s in NAND flash %s "
|
||||
"up to offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
|
||||
CMD_ARGV[1], CMD_ARGV[0], dev.address, duration_elapsed(&file.bench),
|
||||
duration_kbps(&file.bench, dev.size));
|
||||
|
@ -354,7 +354,7 @@ COMMAND_HANDLER(handle_nand_dump_command)
|
|||
retval = nand_read_page(nand, s.address / nand->page_size,
|
||||
s.page, s.page_size, s.oob, s.oob_size);
|
||||
if (ERROR_OK != retval) {
|
||||
command_print(CMD_CTX, "reading NAND flash page failed");
|
||||
command_print(CMD, "reading NAND flash page failed");
|
||||
nand_fileio_cleanup(&s);
|
||||
return retval;
|
||||
}
|
||||
|
@ -374,7 +374,7 @@ COMMAND_HANDLER(handle_nand_dump_command)
|
|||
return retval;
|
||||
|
||||
if (nand_fileio_finish(&s) == ERROR_OK) {
|
||||
command_print(CMD_CTX, "dumped %zu bytes in %fs (%0.3f KiB/s)",
|
||||
command_print(CMD, "dumped %zu bytes in %fs (%0.3f KiB/s)",
|
||||
filesize, duration_elapsed(&s.bench),
|
||||
duration_kbps(&s.bench, filesize));
|
||||
}
|
||||
|
@ -392,7 +392,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
|
|||
return retval;
|
||||
|
||||
if (NULL == p->device) {
|
||||
command_print(CMD_CTX, "#%s: not probed", CMD_ARGV[0]);
|
||||
command_print(CMD, "#%s: not probed", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -400,7 +400,7 @@ COMMAND_HANDLER(handle_nand_raw_access_command)
|
|||
COMMAND_PARSE_ENABLE(CMD_ARGV[1], p->use_raw);
|
||||
|
||||
const char *msg = p->use_raw ? "enabled" : "disabled";
|
||||
command_print(CMD_CTX, "raw access is %s", msg);
|
||||
command_print(CMD, "raw access is %s", msg);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -411,6 +411,7 @@ static const struct command_registration nand_exec_command_handlers[] = {
|
|||
.handler = handle_nand_list_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "list configured NAND flash devices",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "info",
|
||||
|
@ -500,15 +501,15 @@ COMMAND_HANDLER(handle_nand_init_command)
|
|||
|
||||
static int nand_list_walker(struct nand_flash_controller *c, void *x)
|
||||
{
|
||||
struct command_context *cmd_ctx = x;
|
||||
command_print(cmd_ctx, " %s", c->name);
|
||||
struct command_invocation *cmd = x;
|
||||
command_print(cmd, " %s", c->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(handle_nand_list_drivers)
|
||||
{
|
||||
command_print(CMD_CTX, "Available NAND flash controller drivers:");
|
||||
return nand_driver_walk(&nand_list_walker, CMD_CTX);
|
||||
command_print(CMD, "Available NAND flash controller drivers:");
|
||||
return nand_driver_walk(&nand_list_walker, CMD);
|
||||
}
|
||||
|
||||
static COMMAND_HELPER(create_nand_device, const char *bank_name,
|
||||
|
|
|
@ -63,6 +63,7 @@ NOR_DRIVERS = \
|
|||
%D%/str7x.c \
|
||||
%D%/str9x.c \
|
||||
%D%/str9xpec.c \
|
||||
%D%/swm050.c \
|
||||
%D%/tms470.c \
|
||||
%D%/virtual.c \
|
||||
%D%/w600.c \
|
||||
|
|
|
@ -791,9 +791,9 @@ COMMAND_HANDLER(ambiqmicro_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "ambiqmicro mass erase complete");
|
||||
command_print(CMD, "ambiqmicro mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "ambiqmicro mass erase failed");
|
||||
command_print(CMD, "ambiqmicro mass erase failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -815,9 +815,9 @@ COMMAND_HANDLER(ambiqmicro_handle_page_erase_command)
|
|||
return retval;
|
||||
|
||||
if (ambiqmicro_erase(bank, first, last) == ERROR_OK)
|
||||
command_print(CMD_CTX, "ambiqmicro page erase complete");
|
||||
command_print(CMD, "ambiqmicro page erase complete");
|
||||
else
|
||||
command_print(CMD_CTX, "ambiqmicro page erase failed");
|
||||
command_print(CMD, "ambiqmicro page erase failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -838,7 +838,7 @@ COMMAND_HANDLER(ambiqmicro_handle_program_otp_command)
|
|||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], offset);
|
||||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], count);
|
||||
|
||||
command_print(CMD_CTX, "offset=0x%08x count=%d", offset, count);
|
||||
command_print(CMD, "offset=0x%08x count=%d", offset, count);
|
||||
|
||||
CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
|
||||
|
|
|
@ -249,14 +249,14 @@ struct sam3_reg_list {
|
|||
|
||||
static struct sam3_chip *all_sam3_chips;
|
||||
|
||||
static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
|
||||
static struct sam3_chip *get_current_sam3(struct command_invocation *cmd)
|
||||
{
|
||||
struct target *t;
|
||||
static struct sam3_chip *p;
|
||||
|
||||
t = get_current_target(cmd_ctx);
|
||||
t = get_current_target(cmd->ctx);
|
||||
if (!t) {
|
||||
command_print(cmd_ctx, "No current target?");
|
||||
command_print(cmd, "No current target?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -264,7 +264,7 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
|
|||
if (!p) {
|
||||
/* this should not happen */
|
||||
/* the command is not registered until the chip is created? */
|
||||
command_print(cmd_ctx, "No SAM3 chips exist?");
|
||||
command_print(cmd, "No SAM3 chips exist?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -273,7 +273,7 @@ static struct sam3_chip *get_current_sam3(struct command_context *cmd_ctx)
|
|||
return p;
|
||||
p = p->next;
|
||||
}
|
||||
command_print(cmd_ctx, "Cannot find SAM3 chip?");
|
||||
command_print(cmd, "Cannot find SAM3 chip?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -3538,7 +3538,7 @@ done:
|
|||
COMMAND_HANDLER(sam3_handle_info_command)
|
||||
{
|
||||
struct sam3_chip *pChip;
|
||||
pChip = get_current_sam3(CMD_CTX);
|
||||
pChip = get_current_sam3(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3549,7 +3549,7 @@ COMMAND_HANDLER(sam3_handle_info_command)
|
|||
if (pChip->details.bank[0].pBank == NULL) {
|
||||
x = 0;
|
||||
need_define:
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"Please define bank %d via command: flash bank %s ... ",
|
||||
x,
|
||||
at91sam3_flash.name);
|
||||
|
@ -3598,7 +3598,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
|
|||
int r, who;
|
||||
struct sam3_chip *pChip;
|
||||
|
||||
pChip = get_current_sam3(CMD_CTX);
|
||||
pChip = get_current_sam3(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3608,7 +3608,7 @@ COMMAND_HANDLER(sam3_handle_gpnvm_command)
|
|||
}
|
||||
|
||||
if (pChip->details.bank[0].pBank == NULL) {
|
||||
command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
|
||||
command_print(CMD, "Bank0 must be defined first via: flash bank %s ...",
|
||||
at91sam3_flash.name);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
@ -3647,22 +3647,22 @@ showall:
|
|||
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
|
||||
if (r != ERROR_OK)
|
||||
break;
|
||||
command_print(CMD_CTX, "sam3-gpnvm%u: %u", x, v);
|
||||
command_print(CMD, "sam3-gpnvm%u: %u", x, v);
|
||||
}
|
||||
return r;
|
||||
}
|
||||
if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
|
||||
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
|
||||
command_print(CMD_CTX, "sam3-gpnvm%u: %u", who, v);
|
||||
command_print(CMD, "sam3-gpnvm%u: %u", who, v);
|
||||
return r;
|
||||
} else {
|
||||
command_print(CMD_CTX, "sam3-gpnvm invalid GPNVM: %u", who);
|
||||
command_print(CMD, "sam3-gpnvm invalid GPNVM: %u", who);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
if (who == -1) {
|
||||
command_print(CMD_CTX, "Missing GPNVM number");
|
||||
command_print(CMD, "Missing GPNVM number");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -3672,7 +3672,7 @@ showall:
|
|||
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
|
||||
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
|
||||
else {
|
||||
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);
|
||||
r = ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
return r;
|
||||
|
@ -3682,7 +3682,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
|
|||
{
|
||||
struct sam3_chip *pChip;
|
||||
|
||||
pChip = get_current_sam3(CMD_CTX);
|
||||
pChip = get_current_sam3(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3697,7 +3697,7 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
|
|||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
|
||||
if (v > 200000) {
|
||||
/* absurd slow clock of 200Khz? */
|
||||
command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
|
||||
command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
pChip->cfg.slow_freq = v;
|
||||
|
@ -3705,11 +3705,11 @@ COMMAND_HANDLER(sam3_handle_slowclk_command)
|
|||
}
|
||||
default:
|
||||
/* error */
|
||||
command_print(CMD_CTX, "Too many parameters");
|
||||
command_print(CMD, "Too many parameters");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
break;
|
||||
}
|
||||
command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
|
||||
command_print(CMD, "Slowclk freq: %d.%03dkhz",
|
||||
(int)(pChip->cfg.slow_freq / 1000),
|
||||
(int)(pChip->cfg.slow_freq % 1000));
|
||||
return ERROR_OK;
|
||||
|
@ -3731,6 +3731,7 @@ static const struct command_registration at91sam3_exec_command_handlers[] = {
|
|||
.mode = COMMAND_EXEC,
|
||||
.help = "Print information about the current at91sam3 chip"
|
||||
"and its flash configuration.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "slowclk",
|
||||
|
|
|
@ -228,14 +228,14 @@ struct sam4_reg_list {
|
|||
|
||||
static struct sam4_chip *all_sam4_chips;
|
||||
|
||||
static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
|
||||
static struct sam4_chip *get_current_sam4(struct command_invocation *cmd)
|
||||
{
|
||||
struct target *t;
|
||||
static struct sam4_chip *p;
|
||||
|
||||
t = get_current_target(cmd_ctx);
|
||||
t = get_current_target(cmd->ctx);
|
||||
if (!t) {
|
||||
command_print(cmd_ctx, "No current target?");
|
||||
command_print(cmd, "No current target?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -243,7 +243,7 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
|
|||
if (!p) {
|
||||
/* this should not happen */
|
||||
/* the command is not registered until the chip is created? */
|
||||
command_print(cmd_ctx, "No SAM4 chips exist?");
|
||||
command_print(cmd, "No SAM4 chips exist?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -252,7 +252,7 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
|
|||
return p;
|
||||
p = p->next;
|
||||
}
|
||||
command_print(cmd_ctx, "Cannot find SAM4 chip?");
|
||||
command_print(cmd, "Cannot find SAM4 chip?");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
|
@ -3018,7 +3018,7 @@ done:
|
|||
COMMAND_HANDLER(sam4_handle_info_command)
|
||||
{
|
||||
struct sam4_chip *pChip;
|
||||
pChip = get_current_sam4(CMD_CTX);
|
||||
pChip = get_current_sam4(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3029,7 +3029,7 @@ COMMAND_HANDLER(sam4_handle_info_command)
|
|||
if (pChip->details.bank[0].pBank == NULL) {
|
||||
x = 0;
|
||||
need_define:
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"Please define bank %d via command: flash bank %s ... ",
|
||||
x,
|
||||
at91sam4_flash.name);
|
||||
|
@ -3078,7 +3078,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
|
|||
int r, who;
|
||||
struct sam4_chip *pChip;
|
||||
|
||||
pChip = get_current_sam4(CMD_CTX);
|
||||
pChip = get_current_sam4(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3088,7 +3088,7 @@ COMMAND_HANDLER(sam4_handle_gpnvm_command)
|
|||
}
|
||||
|
||||
if (pChip->details.bank[0].pBank == NULL) {
|
||||
command_print(CMD_CTX, "Bank0 must be defined first via: flash bank %s ...",
|
||||
command_print(CMD, "Bank0 must be defined first via: flash bank %s ...",
|
||||
at91sam4_flash.name);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
@ -3127,23 +3127,23 @@ showall:
|
|||
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), x, &v);
|
||||
if (r != ERROR_OK)
|
||||
break;
|
||||
command_print(CMD_CTX, "sam4-gpnvm%u: %u", x, v);
|
||||
command_print(CMD, "sam4-gpnvm%u: %u", x, v);
|
||||
}
|
||||
return r;
|
||||
}
|
||||
if ((who >= 0) && (((unsigned)(who)) < pChip->details.n_gpnvms)) {
|
||||
r = FLASHD_GetGPNVM(&(pChip->details.bank[0]), who, &v);
|
||||
if (r == ERROR_OK)
|
||||
command_print(CMD_CTX, "sam4-gpnvm%u: %u", who, v);
|
||||
command_print(CMD, "sam4-gpnvm%u: %u", who, v);
|
||||
return r;
|
||||
} else {
|
||||
command_print(CMD_CTX, "sam4-gpnvm invalid GPNVM: %u", who);
|
||||
command_print(CMD, "sam4-gpnvm invalid GPNVM: %u", who);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
if (who == -1) {
|
||||
command_print(CMD_CTX, "Missing GPNVM number");
|
||||
command_print(CMD, "Missing GPNVM number");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -3153,7 +3153,7 @@ showall:
|
|||
(0 == strcmp("clear", CMD_ARGV[0]))) /* quietly accept both */
|
||||
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
|
||||
else {
|
||||
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "Unknown command: %s", CMD_ARGV[0]);
|
||||
r = ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
return r;
|
||||
|
@ -3163,7 +3163,7 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
|
|||
{
|
||||
struct sam4_chip *pChip;
|
||||
|
||||
pChip = get_current_sam4(CMD_CTX);
|
||||
pChip = get_current_sam4(CMD);
|
||||
if (!pChip)
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -3178,7 +3178,7 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
|
|||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], v);
|
||||
if (v > 200000) {
|
||||
/* absurd slow clock of 200Khz? */
|
||||
command_print(CMD_CTX, "Absurd/illegal slow clock freq: %d\n", (int)(v));
|
||||
command_print(CMD, "Absurd/illegal slow clock freq: %d\n", (int)(v));
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
pChip->cfg.slow_freq = v;
|
||||
|
@ -3186,11 +3186,11 @@ COMMAND_HANDLER(sam4_handle_slowclk_command)
|
|||
}
|
||||
default:
|
||||
/* error */
|
||||
command_print(CMD_CTX, "Too many parameters");
|
||||
command_print(CMD, "Too many parameters");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
break;
|
||||
}
|
||||
command_print(CMD_CTX, "Slowclk freq: %d.%03dkhz",
|
||||
command_print(CMD, "Slowclk freq: %d.%03dkhz",
|
||||
(int)(pChip->cfg.slow_freq / 1000),
|
||||
(int)(pChip->cfg.slow_freq % 1000));
|
||||
return ERROR_OK;
|
||||
|
@ -3212,6 +3212,7 @@ static const struct command_registration at91sam4_exec_command_handlers[] = {
|
|||
.mode = COMMAND_EXEC,
|
||||
.help = "Print information about the current at91sam4 chip"
|
||||
"and its flash configuration.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "slowclk",
|
||||
|
|
|
@ -668,7 +668,8 @@ static const struct command_registration at91sam4l_exec_command_handlers[] = {
|
|||
.name = "smap_reset_deassert",
|
||||
.handler = sam4l_handle_reset_deassert,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "deasert internal reset held by SMAP"
|
||||
.help = "deassert internal reset held by SMAP",
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -1067,7 +1067,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
|
|||
if (bank == NULL)
|
||||
return ERROR_FLASH_BANK_INVALID;
|
||||
if (strcmp(bank->driver->name, "at91sam7")) {
|
||||
command_print(CMD_CTX, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);
|
||||
command_print(CMD, "not an at91sam7 flash bank '%s'", CMD_ARGV[0]);
|
||||
return ERROR_FLASH_BANK_INVALID;
|
||||
}
|
||||
if (bank->target->state != TARGET_HALTED) {
|
||||
|
@ -1091,7 +1091,7 @@ COMMAND_HANDLER(at91sam7_handle_gpnvm_command)
|
|||
|
||||
COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], bit);
|
||||
if ((bit < 0) || (bit >= at91sam7_info->num_nvmbits)) {
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"gpnvm bit '#%s' is out of bounds for target %s",
|
||||
CMD_ARGV[0],
|
||||
at91sam7_info->target_name);
|
||||
|
|
|
@ -947,9 +947,9 @@ COMMAND_HANDLER(samd_handle_chip_erase_command)
|
|||
* perform the erase. */
|
||||
res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
|
||||
if (res == ERROR_OK)
|
||||
command_print(CMD_CTX, "chip erase started");
|
||||
command_print(CMD, "chip erase started");
|
||||
else
|
||||
command_print(CMD_CTX, "write to DSU CTRL failed");
|
||||
command_print(CMD, "write to DSU CTRL failed");
|
||||
}
|
||||
|
||||
return res;
|
||||
|
@ -961,7 +961,7 @@ COMMAND_HANDLER(samd_handle_set_security_command)
|
|||
struct target *target = get_current_target(CMD_CTX);
|
||||
|
||||
if (CMD_ARGC < 1 || (CMD_ARGC >= 1 && (strcmp(CMD_ARGV[0], "enable")))) {
|
||||
command_print(CMD_CTX, "supply the \"enable\" argument to proceed.");
|
||||
command_print(CMD, "supply the \"enable\" argument to proceed.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -975,9 +975,9 @@ COMMAND_HANDLER(samd_handle_set_security_command)
|
|||
|
||||
/* Check (and clear) error conditions */
|
||||
if (res == ERROR_OK)
|
||||
command_print(CMD_CTX, "chip secured on next power-cycle");
|
||||
command_print(CMD, "chip secured on next power-cycle");
|
||||
else
|
||||
command_print(CMD_CTX, "failed to secure chip");
|
||||
command_print(CMD, "failed to secure chip");
|
||||
}
|
||||
|
||||
return res;
|
||||
|
@ -1008,7 +1008,7 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
|
|||
}
|
||||
|
||||
if (code > 6) {
|
||||
command_print(CMD_CTX, "Invalid EEPROM size. Please see "
|
||||
command_print(CMD, "Invalid EEPROM size. Please see "
|
||||
"datasheet for a list valid sizes.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
@ -1022,10 +1022,10 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
|
|||
uint32_t size = ((val >> 4) & 0x7); /* grab size code */
|
||||
|
||||
if (size == 0x7)
|
||||
command_print(CMD_CTX, "EEPROM is disabled");
|
||||
command_print(CMD, "EEPROM is disabled");
|
||||
else {
|
||||
/* Otherwise, 6 is 256B, 0 is 16KB */
|
||||
command_print(CMD_CTX, "EEPROM size is %u bytes",
|
||||
command_print(CMD, "EEPROM size is %u bytes",
|
||||
(2 << (13 - size)));
|
||||
}
|
||||
}
|
||||
|
@ -1038,7 +1038,7 @@ COMMAND_HANDLER(samd_handle_eeprom_command)
|
|||
static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value)
|
||||
{
|
||||
if (num >= CMD_ARGC) {
|
||||
command_print(CMD_CTX, "Too few Arguments.");
|
||||
command_print(CMD, "Too few Arguments.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1049,12 +1049,12 @@ static COMMAND_HELPER(get_u64_from_hexarg, unsigned int num, uint64_t *value)
|
|||
*value = strtoull(&(CMD_ARGV[num][2]), &check, 16);
|
||||
if ((value == 0 && errno == ERANGE) ||
|
||||
check == NULL || *check != 0) {
|
||||
command_print(CMD_CTX, "Invalid 64-bit hex value in argument %d.",
|
||||
command_print(CMD, "Invalid 64-bit hex value in argument %d.",
|
||||
num + 1);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
} else {
|
||||
command_print(CMD_CTX, "Argument %d needs to be a hex value.", num + 1);
|
||||
command_print(CMD, "Argument %d needs to be a hex value.", num + 1);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
return ERROR_OK;
|
||||
|
@ -1067,7 +1067,7 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command)
|
|||
|
||||
if (target) {
|
||||
if (CMD_ARGC > 2) {
|
||||
command_print(CMD_CTX, "Too much Arguments given.");
|
||||
command_print(CMD, "Too much Arguments given.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1105,7 +1105,7 @@ COMMAND_HANDLER(samd_handle_nvmuserrow_command)
|
|||
uint64_t value;
|
||||
res = read_userrow(target, &value);
|
||||
if (res == ERROR_OK)
|
||||
command_print(CMD_CTX, "NVMUSERROW: 0x%016"PRIX64, value);
|
||||
command_print(CMD, "NVMUSERROW: 0x%016"PRIX64, value);
|
||||
else
|
||||
LOG_ERROR("NVMUSERROW could not be read.");
|
||||
}
|
||||
|
@ -1145,7 +1145,7 @@ COMMAND_HANDLER(samd_handle_bootloader_command)
|
|||
}
|
||||
|
||||
if (code > 6) {
|
||||
command_print(CMD_CTX, "Invalid bootloader size. Please "
|
||||
command_print(CMD, "Invalid bootloader size. Please "
|
||||
"see datasheet for a list valid sizes.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
@ -1166,7 +1166,7 @@ COMMAND_HANDLER(samd_handle_bootloader_command)
|
|||
nb = (2 << (8 - size)) * page_size;
|
||||
|
||||
/* There are 4 pages per row */
|
||||
command_print(CMD_CTX, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
|
||||
command_print(CMD, "Bootloader size is %" PRIu32 " bytes (%" PRIu32 " rows)",
|
||||
nb, (uint32_t)(nb / (page_size * 4)));
|
||||
}
|
||||
}
|
||||
|
@ -1217,7 +1217,8 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
|
|||
.name = "dsu_reset_deassert",
|
||||
.handler = samd_handle_reset_deassert,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "Deasert internal reset held by DSU."
|
||||
.help = "Deassert internal reset held by DSU.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "info",
|
||||
|
@ -1225,6 +1226,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
|
|||
.mode = COMMAND_EXEC,
|
||||
.help = "Print information about the current at91samd chip "
|
||||
"and its flash configuration.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "chip-erase",
|
||||
|
@ -1232,6 +1234,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
|
|||
.mode = COMMAND_EXEC,
|
||||
.help = "Erase the entire Flash by using the Chip-"
|
||||
"Erase feature in the Device Service Unit (DSU).",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "set-security",
|
||||
|
@ -1241,6 +1244,7 @@ static const struct command_registration at91samd_exec_command_handlers[] = {
|
|||
"This makes it impossible to read the Flash contents. "
|
||||
"The only way to undo this is to issue the chip-erase "
|
||||
"command.",
|
||||
.usage = "'enable'",
|
||||
},
|
||||
{
|
||||
.name = "eeprom",
|
||||
|
|
|
@ -765,9 +765,9 @@ COMMAND_HANDLER(same5_handle_chip_erase_command)
|
|||
* perform the erase. */
|
||||
int res = target_write_u8(target, SAMD_DSU + SAMD_DSU_CTRL_EXT, (1<<4));
|
||||
if (res == ERROR_OK)
|
||||
command_print(CMD_CTX, "chip erase started");
|
||||
command_print(CMD, "chip erase started");
|
||||
else
|
||||
command_print(CMD_CTX, "write to DSU CTRL failed");
|
||||
command_print(CMD, "write to DSU CTRL failed");
|
||||
|
||||
return res;
|
||||
}
|
||||
|
@ -781,7 +781,7 @@ COMMAND_HANDLER(same5_handle_userpage_command)
|
|||
return ERROR_FAIL;
|
||||
|
||||
if (CMD_ARGC > 2) {
|
||||
command_print(CMD_CTX, "Too much Arguments given.");
|
||||
command_print(CMD, "Too much Arguments given.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -806,7 +806,7 @@ COMMAND_HANDLER(same5_handle_userpage_command)
|
|||
int res2 = target_read_memory(target, SAMD_USER_ROW, 4, 2, buffer);
|
||||
if (res2 == ERROR_OK) {
|
||||
uint64_t value = target_buffer_get_u64(target, buffer);
|
||||
command_print(CMD_CTX, "USER PAGE: 0x%016"PRIX64, value);
|
||||
command_print(CMD, "USER PAGE: 0x%016"PRIX64, value);
|
||||
} else {
|
||||
LOG_ERROR("USER PAGE could not be read.");
|
||||
}
|
||||
|
@ -829,7 +829,7 @@ COMMAND_HANDLER(same5_handle_bootloader_command)
|
|||
unsigned long size = strtoul(CMD_ARGV[0], NULL, 0);
|
||||
uint32_t code = (size + 8191) / 8192;
|
||||
if (code > 15) {
|
||||
command_print(CMD_CTX, "Invalid bootloader size. Please "
|
||||
command_print(CMD, "Invalid bootloader size. Please "
|
||||
"see datasheet for a list valid sizes.");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
@ -842,7 +842,7 @@ COMMAND_HANDLER(same5_handle_bootloader_command)
|
|||
if (res2 == ERROR_OK) {
|
||||
uint32_t code = (val >> 26) & 0xf; /* grab size code */
|
||||
uint32_t size = (15 - code) * 8192;
|
||||
command_print(CMD_CTX, "Bootloader protected in the first %"
|
||||
command_print(CMD, "Bootloader protected in the first %"
|
||||
PRIu32 " bytes", size);
|
||||
}
|
||||
|
||||
|
@ -893,12 +893,14 @@ COMMAND_HANDLER(samd_handle_reset_deassert)
|
|||
static const struct command_registration same5_exec_command_handlers[] = {
|
||||
{
|
||||
.name = "dsu_reset_deassert",
|
||||
.usage = "",
|
||||
.handler = samd_handle_reset_deassert,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "Deasert internal reset held by DSU."
|
||||
.help = "Deassert internal reset held by DSU."
|
||||
},
|
||||
{
|
||||
.name = "chip-erase",
|
||||
.usage = "",
|
||||
.handler = same5_handle_chip_erase_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "Erase the entire Flash by using the Chip-"
|
||||
|
|
|
@ -672,22 +672,22 @@ showall:
|
|||
r = samv_get_gpnvm(target, x, &v);
|
||||
if (r != ERROR_OK)
|
||||
break;
|
||||
command_print(CMD_CTX, "samv-gpnvm%u: %u", x, v);
|
||||
command_print(CMD, "samv-gpnvm%u: %u", x, v);
|
||||
}
|
||||
return r;
|
||||
}
|
||||
if ((who >= 0) && (((unsigned)who) < SAMV_NUM_GPNVM_BITS)) {
|
||||
r = samv_get_gpnvm(target, who, &v);
|
||||
command_print(CMD_CTX, "samv-gpnvm%u: %u", who, v);
|
||||
command_print(CMD, "samv-gpnvm%u: %u", who, v);
|
||||
return r;
|
||||
} else {
|
||||
command_print(CMD_CTX, "invalid gpnvm: %u", who);
|
||||
command_print(CMD, "invalid gpnvm: %u", who);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
if (who == -1) {
|
||||
command_print(CMD_CTX, "missing gpnvm number");
|
||||
command_print(CMD, "missing gpnvm number");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -696,7 +696,7 @@ showall:
|
|||
else if (!strcmp("clr", CMD_ARGV[0]) || !strcmp("clear", CMD_ARGV[0]))
|
||||
r = samv_clear_gpnvm(target, who);
|
||||
else {
|
||||
command_print(CMD_CTX, "unknown command: %s", CMD_ARGV[0]);
|
||||
command_print(CMD, "unknown command: %s", CMD_ARGV[0]);
|
||||
r = ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
return r;
|
||||
|
|
|
@ -433,9 +433,9 @@ COMMAND_HANDLER(avrf_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "avr mass erase complete");
|
||||
command_print(CMD, "avr mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "avr mass erase failed");
|
||||
command_print(CMD, "avr mass erase failed");
|
||||
|
||||
LOG_DEBUG("%s", __func__);
|
||||
return ERROR_OK;
|
||||
|
|
|
@ -45,9 +45,12 @@ struct flash_sector {
|
|||
uint32_t size;
|
||||
/**
|
||||
* Indication of erasure status: 0 = not erased, 1 = erased,
|
||||
* other = unknown. Set by @c flash_driver_s::erase_check.
|
||||
* other = unknown. Set by @c flash_driver_s::erase_check only.
|
||||
*
|
||||
* Flag is not used in protection block
|
||||
* This information must be considered stale immediately.
|
||||
* Don't set it in flash_driver_s::erase or a device mass_erase
|
||||
* Don't clear it in flash_driver_s::write
|
||||
* The flag is not used in a protection block
|
||||
*/
|
||||
int is_erased;
|
||||
/**
|
||||
|
@ -118,7 +121,7 @@ struct flash_bank {
|
|||
|
||||
/**
|
||||
* The number of sectors on this chip. This value will
|
||||
* be set intially to 0, and the flash driver must set this to
|
||||
* be set initially to 0, and the flash driver must set this to
|
||||
* some non-zero value during "probe()" or "auto_probe()".
|
||||
*/
|
||||
int num_sectors;
|
||||
|
@ -127,12 +130,12 @@ struct flash_bank {
|
|||
|
||||
/**
|
||||
* The number of protection blocks in this bank. This value
|
||||
* is set intially to 0 and sectors are used as protection blocks.
|
||||
* is set initially to 0 and sectors are used as protection blocks.
|
||||
* Driver probe can set protection blocks array to work with
|
||||
* protection granularity different than sector size.
|
||||
*/
|
||||
int num_prot_blocks;
|
||||
/** Array of protection blocks, allocated and initilized by the flash driver */
|
||||
/** Array of protection blocks, allocated and initialized by the flash driver */
|
||||
struct flash_sector *prot_blocks;
|
||||
|
||||
struct flash_bank *next; /**< The next flash bank on this chip */
|
||||
|
@ -239,8 +242,8 @@ struct flash_bank *get_flash_bank_by_name_noprobe(const char *name);
|
|||
*/
|
||||
int get_flash_bank_by_num(int num, struct flash_bank **bank);
|
||||
/**
|
||||
* Retreives @a bank from a command argument, reporting errors parsing
|
||||
* the bank identifier or retreiving the specified bank. The bank
|
||||
* Retrieves @a bank from a command argument, reporting errors parsing
|
||||
* the bank identifier or retrieving the specified bank. The bank
|
||||
* may be identified by its bank number or by @c name.instance, where
|
||||
* @a instance is driver-specific.
|
||||
* @param name_index The index to the string in args containing the
|
||||
|
|
|
@ -77,6 +77,7 @@ extern const struct flash_driver stmsmi_flash;
|
|||
extern const struct flash_driver str7x_flash;
|
||||
extern const struct flash_driver str9x_flash;
|
||||
extern const struct flash_driver str9xpec_flash;
|
||||
extern const struct flash_driver swm050_flash;
|
||||
extern const struct flash_driver tms470_flash;
|
||||
extern const struct flash_driver virtual_flash;
|
||||
extern const struct flash_driver w600_flash;
|
||||
|
@ -146,6 +147,7 @@ static const struct flash_driver * const flash_drivers[] = {
|
|||
&str7x_flash,
|
||||
&str9x_flash,
|
||||
&str9xpec_flash,
|
||||
&swm050_flash,
|
||||
&tms470_flash,
|
||||
&virtual_flash,
|
||||
&xcf_flash,
|
||||
|
|
|
@ -1093,7 +1093,7 @@ COMMAND_HANDLER(efm32x_handle_debuglock_command)
|
|||
return retval;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "efm32x debug interface locked, reset the device to apply");
|
||||
command_print(CMD, "efm32x debug interface locked, reset the device to apply");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
@ -776,7 +776,7 @@ COMMAND_HANDLER(em357_handle_lock_command)
|
|||
}
|
||||
|
||||
if (em357_erase_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "em357 failed to erase options");
|
||||
command_print(CMD, "em357 failed to erase options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -784,11 +784,11 @@ COMMAND_HANDLER(em357_handle_lock_command)
|
|||
em357_info->option_bytes.RDP = 0;
|
||||
|
||||
if (em357_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "em357 failed to lock device");
|
||||
command_print(CMD, "em357 failed to lock device");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "em357 locked");
|
||||
command_print(CMD, "em357 locked");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -813,16 +813,16 @@ COMMAND_HANDLER(em357_handle_unlock_command)
|
|||
}
|
||||
|
||||
if (em357_erase_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "em357 failed to unlock device");
|
||||
command_print(CMD, "em357 failed to unlock device");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (em357_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "em357 failed to lock device");
|
||||
command_print(CMD, "em357 failed to lock device");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "em357 unlocked.\n"
|
||||
command_print(CMD, "em357 unlocked.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
|
||||
|
@ -886,9 +886,9 @@ COMMAND_HANDLER(em357_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "em357 mass erase complete");
|
||||
command_print(CMD, "em357 mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "em357 mass erase failed");
|
||||
command_print(CMD, "em357 mass erase failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -92,7 +92,7 @@
|
|||
#endif
|
||||
|
||||
#define CONTROL_TIMEOUT 5000 /* 5s */
|
||||
#define PAGE_SIZE 4096
|
||||
#define FLASH_PAGE_SIZE 4096
|
||||
#define PB_MAX 32
|
||||
|
||||
#define NUM_NS_PER_S 1000000000ULL
|
||||
|
@ -264,7 +264,7 @@ static int esirisc_flash_erase(struct flash_bank *bank, int first, int last)
|
|||
(void)esirisc_flash_disable_protect(bank);
|
||||
|
||||
for (int page = first; page < last; ++page) {
|
||||
uint32_t address = page * PAGE_SIZE;
|
||||
uint32_t address = page * FLASH_PAGE_SIZE;
|
||||
|
||||
target_write_u32(target, esirisc_info->cfg + ADDRESS, address);
|
||||
|
||||
|
@ -464,8 +464,8 @@ static int esirisc_flash_probe(struct flash_bank *bank)
|
|||
if (target->state != TARGET_HALTED)
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
|
||||
bank->num_sectors = bank->size / PAGE_SIZE;
|
||||
bank->sectors = alloc_block_array(0, PAGE_SIZE, bank->num_sectors);
|
||||
bank->num_sectors = bank->size / FLASH_PAGE_SIZE;
|
||||
bank->sectors = alloc_block_array(0, FLASH_PAGE_SIZE, bank->num_sectors);
|
||||
|
||||
retval = esirisc_flash_init(bank);
|
||||
if (retval != ERROR_OK) {
|
||||
|
@ -516,7 +516,7 @@ COMMAND_HANDLER(handle_esirisc_flash_mass_erase_command)
|
|||
|
||||
retval = esirisc_flash_mass_erase(bank);
|
||||
|
||||
command_print(CMD_CTX, "mass erase %s",
|
||||
command_print(CMD, "mass erase %s",
|
||||
(retval == ERROR_OK) ? "successful" : "failed");
|
||||
|
||||
return retval;
|
||||
|
@ -536,7 +536,7 @@ COMMAND_HANDLER(handle_esirisc_flash_ref_erase_command)
|
|||
|
||||
retval = esirisc_flash_ref_erase(bank);
|
||||
|
||||
command_print(CMD_CTX, "erase reference cell %s",
|
||||
command_print(CMD, "erase reference cell %s",
|
||||
(retval == ERROR_OK) ? "successful" : "failed");
|
||||
|
||||
return retval;
|
||||
|
|
|
@ -109,6 +109,7 @@ static const struct command_registration faux_command_handlers[] = {
|
|||
.mode = COMMAND_ANY,
|
||||
.help = "faux flash command group",
|
||||
.chain = hello_command_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -136,7 +136,8 @@ struct fespi_target {
|
|||
/* TODO !!! What is the right naming convention here? */
|
||||
static const struct fespi_target target_devices[] = {
|
||||
/* name, tap_idcode, ctrl_base */
|
||||
{ "Freedom E300 SPI Flash", 0x10e31913 , 0x10014000 },
|
||||
{ "Freedom E310-G000 SPI Flash", 0x10e31913 , 0x10014000 },
|
||||
{ "Freedom E310-G002 SPI Flash", 0x20000913 , 0x10014000 },
|
||||
{ NULL, 0, 0 }
|
||||
};
|
||||
|
||||
|
@ -336,6 +337,11 @@ static int fespi_erase_sector(struct flash_bank *bank, int sector)
|
|||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
sector = bank->sectors[sector].offset;
|
||||
if (bank->size > 0x1000000) {
|
||||
retval = fespi_tx(bank, sector >> 24);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
}
|
||||
retval = fespi_tx(bank, sector >> 16);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
@ -436,32 +442,38 @@ static int fespi_protect(struct flash_bank *bank, int set,
|
|||
static int slow_fespi_write_buffer(struct flash_bank *bank,
|
||||
const uint8_t *buffer, uint32_t offset, uint32_t len)
|
||||
{
|
||||
struct fespi_flash_bank *fespi_info = bank->driver_priv;
|
||||
uint32_t ii;
|
||||
|
||||
if (offset & 0xFF000000) {
|
||||
LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
|
||||
offset);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
/* TODO!!! assert that len < page size */
|
||||
|
||||
fespi_tx(bank, SPIFLASH_WRITE_ENABLE);
|
||||
fespi_txwm_wait(bank);
|
||||
if (fespi_tx(bank, SPIFLASH_WRITE_ENABLE) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (fespi_txwm_wait(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (fespi_write_reg(bank, FESPI_REG_CSMODE, FESPI_CSMODE_HOLD) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
fespi_tx(bank, SPIFLASH_PAGE_PROGRAM);
|
||||
if (fespi_tx(bank, fespi_info->dev->pprog_cmd) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
fespi_tx(bank, offset >> 16);
|
||||
fespi_tx(bank, offset >> 8);
|
||||
fespi_tx(bank, offset);
|
||||
if (bank->size > 0x1000000 && fespi_tx(bank, offset >> 24) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (fespi_tx(bank, offset >> 16) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (fespi_tx(bank, offset >> 8) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
if (fespi_tx(bank, offset) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
for (ii = 0; ii < len; ii++)
|
||||
fespi_tx(bank, buffer[ii]);
|
||||
for (ii = 0; ii < len; ii++) {
|
||||
if (fespi_tx(bank, buffer[ii]) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
fespi_txwm_wait(bank);
|
||||
if (fespi_txwm_wait(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
if (fespi_write_reg(bank, FESPI_REG_CSMODE, FESPI_CSMODE_AUTO) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
@ -471,274 +483,25 @@ static int slow_fespi_write_buffer(struct flash_bank *bank,
|
|||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static const uint8_t algorithm_bin[] = {
|
||||
#include "../../../contrib/loaders/flash/fespi/fespi.inc"
|
||||
};
|
||||
#define STEP_EXIT 4
|
||||
#define STEP_TX 8
|
||||
#define STEP_TXWM_WAIT 12
|
||||
#define STEP_WRITE_REG 16
|
||||
#define STEP_WIP_WAIT 20
|
||||
#define STEP_SET_DIR 24
|
||||
#define STEP_NOP 0xff
|
||||
|
||||
struct algorithm_steps {
|
||||
unsigned size;
|
||||
unsigned used;
|
||||
uint8_t **steps;
|
||||
static const uint8_t riscv32_bin[] = {
|
||||
#include "../../../contrib/loaders/flash/fespi/riscv32_fespi.inc"
|
||||
};
|
||||
|
||||
static struct algorithm_steps *as_new(void)
|
||||
{
|
||||
struct algorithm_steps *as = calloc(1, sizeof(struct algorithm_steps));
|
||||
as->size = 8;
|
||||
as->steps = malloc(as->size * sizeof(as->steps[0]));
|
||||
return as;
|
||||
}
|
||||
|
||||
static struct algorithm_steps *as_delete(struct algorithm_steps *as)
|
||||
{
|
||||
for (unsigned step = 0; step < as->used; step++) {
|
||||
free(as->steps[step]);
|
||||
as->steps[step] = NULL;
|
||||
}
|
||||
free(as->steps);
|
||||
free(as);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int as_empty(struct algorithm_steps *as)
|
||||
{
|
||||
for (unsigned s = 0; s < as->used; s++) {
|
||||
if (as->steps[s][0] != STEP_NOP)
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Return size of compiled program. */
|
||||
static unsigned as_compile(struct algorithm_steps *as, uint8_t *target,
|
||||
unsigned target_size)
|
||||
{
|
||||
unsigned offset = 0;
|
||||
bool finish_early = false;
|
||||
for (unsigned s = 0; s < as->used && !finish_early; s++) {
|
||||
unsigned bytes_left = target_size - offset;
|
||||
switch (as->steps[s][0]) {
|
||||
case STEP_NOP:
|
||||
break;
|
||||
case STEP_TX:
|
||||
{
|
||||
unsigned size = as->steps[s][1];
|
||||
if (size + 3 > bytes_left) {
|
||||
finish_early = true;
|
||||
break;
|
||||
}
|
||||
memcpy(target + offset, as->steps[s], size + 2);
|
||||
offset += size + 2;
|
||||
break;
|
||||
}
|
||||
case STEP_WRITE_REG:
|
||||
if (4 > bytes_left) {
|
||||
finish_early = true;
|
||||
break;
|
||||
}
|
||||
memcpy(target + offset, as->steps[s], 3);
|
||||
offset += 3;
|
||||
break;
|
||||
case STEP_SET_DIR:
|
||||
if (3 > bytes_left) {
|
||||
finish_early = true;
|
||||
break;
|
||||
}
|
||||
memcpy(target + offset, as->steps[s], 2);
|
||||
offset += 2;
|
||||
break;
|
||||
case STEP_TXWM_WAIT:
|
||||
case STEP_WIP_WAIT:
|
||||
if (2 > bytes_left) {
|
||||
finish_early = true;
|
||||
break;
|
||||
}
|
||||
memcpy(target + offset, as->steps[s], 1);
|
||||
offset += 1;
|
||||
break;
|
||||
default:
|
||||
assert(0);
|
||||
}
|
||||
if (!finish_early)
|
||||
as->steps[s][0] = STEP_NOP;
|
||||
}
|
||||
assert(offset + 1 <= target_size);
|
||||
target[offset++] = STEP_EXIT;
|
||||
|
||||
LOG_DEBUG("%d-byte program:", offset);
|
||||
for (unsigned i = 0; i < offset;) {
|
||||
char buf[80];
|
||||
for (unsigned x = 0; i < offset && x < 16; x++, i++)
|
||||
sprintf(buf + x*3, "%02x ", target[i]);
|
||||
LOG_DEBUG("%s", buf);
|
||||
}
|
||||
|
||||
return offset;
|
||||
}
|
||||
|
||||
static void as_add_step(struct algorithm_steps *as, uint8_t *step)
|
||||
{
|
||||
if (as->used == as->size) {
|
||||
as->size *= 2;
|
||||
as->steps = realloc(as->steps, sizeof(as->steps[0]) * as->size);
|
||||
LOG_DEBUG("Increased size to 0x%x", as->size);
|
||||
}
|
||||
as->steps[as->used] = step;
|
||||
as->used++;
|
||||
}
|
||||
|
||||
static void as_add_tx(struct algorithm_steps *as, unsigned count, const uint8_t *data)
|
||||
{
|
||||
LOG_DEBUG("count=%d", count);
|
||||
while (count > 0) {
|
||||
unsigned step_count = MIN(count, 255);
|
||||
uint8_t *step = malloc(step_count + 2);
|
||||
step[0] = STEP_TX;
|
||||
step[1] = step_count;
|
||||
memcpy(step + 2, data, step_count);
|
||||
as_add_step(as, step);
|
||||
data += step_count;
|
||||
count -= step_count;
|
||||
}
|
||||
}
|
||||
|
||||
static void as_add_tx1(struct algorithm_steps *as, uint8_t byte)
|
||||
{
|
||||
uint8_t data[1];
|
||||
data[0] = byte;
|
||||
as_add_tx(as, 1, data);
|
||||
}
|
||||
|
||||
static void as_add_write_reg(struct algorithm_steps *as, uint8_t offset, uint8_t data)
|
||||
{
|
||||
uint8_t *step = malloc(3);
|
||||
step[0] = STEP_WRITE_REG;
|
||||
step[1] = offset;
|
||||
step[2] = data;
|
||||
as_add_step(as, step);
|
||||
}
|
||||
|
||||
static void as_add_txwm_wait(struct algorithm_steps *as)
|
||||
{
|
||||
uint8_t *step = malloc(1);
|
||||
step[0] = STEP_TXWM_WAIT;
|
||||
as_add_step(as, step);
|
||||
}
|
||||
|
||||
static void as_add_wip_wait(struct algorithm_steps *as)
|
||||
{
|
||||
uint8_t *step = malloc(1);
|
||||
step[0] = STEP_WIP_WAIT;
|
||||
as_add_step(as, step);
|
||||
}
|
||||
|
||||
static void as_add_set_dir(struct algorithm_steps *as, bool dir)
|
||||
{
|
||||
uint8_t *step = malloc(2);
|
||||
step[0] = STEP_SET_DIR;
|
||||
step[1] = FESPI_FMT_DIR(dir);
|
||||
as_add_step(as, step);
|
||||
}
|
||||
|
||||
/* This should write something less than or equal to a page.*/
|
||||
static int steps_add_buffer_write(struct algorithm_steps *as,
|
||||
const uint8_t *buffer, uint32_t chip_offset, uint32_t len)
|
||||
{
|
||||
if (chip_offset & 0xFF000000) {
|
||||
LOG_ERROR("FESPI interface does not support greater than 3B addressing, can't write to offset 0x%x",
|
||||
chip_offset);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
as_add_tx1(as, SPIFLASH_WRITE_ENABLE);
|
||||
as_add_txwm_wait(as);
|
||||
as_add_write_reg(as, FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
|
||||
|
||||
uint8_t setup[] = {
|
||||
SPIFLASH_PAGE_PROGRAM,
|
||||
chip_offset >> 16,
|
||||
chip_offset >> 8,
|
||||
chip_offset,
|
||||
};
|
||||
as_add_tx(as, sizeof(setup), setup);
|
||||
|
||||
as_add_tx(as, len, buffer);
|
||||
as_add_txwm_wait(as);
|
||||
as_add_write_reg(as, FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
|
||||
|
||||
/* fespi_wip() */
|
||||
as_add_set_dir(as, FESPI_DIR_RX);
|
||||
as_add_write_reg(as, FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
|
||||
as_add_wip_wait(as);
|
||||
as_add_write_reg(as, FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
|
||||
as_add_set_dir(as, FESPI_DIR_TX);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int steps_execute(struct algorithm_steps *as,
|
||||
struct flash_bank *bank, struct working_area *algorithm_wa,
|
||||
struct working_area *data_wa)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
struct fespi_flash_bank *fespi_info = bank->driver_priv;
|
||||
uint32_t ctrl_base = fespi_info->ctrl_base;
|
||||
int xlen = riscv_xlen(target);
|
||||
|
||||
struct reg_param reg_params[2];
|
||||
init_reg_param(®_params[0], "a0", xlen, PARAM_OUT);
|
||||
init_reg_param(®_params[1], "a1", xlen, PARAM_OUT);
|
||||
buf_set_u64(reg_params[0].value, 0, xlen, ctrl_base);
|
||||
buf_set_u64(reg_params[1].value, 0, xlen, data_wa->address);
|
||||
|
||||
int retval = ERROR_OK;
|
||||
while (!as_empty(as)) {
|
||||
keep_alive();
|
||||
uint8_t *data_buf = malloc(data_wa->size);
|
||||
unsigned bytes = as_compile(as, data_buf, data_wa->size);
|
||||
retval = target_write_buffer(target, data_wa->address, bytes,
|
||||
data_buf);
|
||||
free(data_buf);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("Failed to write data to " TARGET_ADDR_FMT ": %d",
|
||||
data_wa->address, retval);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
|
||||
algorithm_wa->address, algorithm_wa->address + 4,
|
||||
10000, NULL);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("Failed to execute algorithm at " TARGET_ADDR_FMT ": %d",
|
||||
algorithm_wa->address, retval);
|
||||
goto exit;
|
||||
}
|
||||
}
|
||||
|
||||
exit:
|
||||
destroy_reg_param(®_params[1]);
|
||||
destroy_reg_param(®_params[0]);
|
||||
return retval;
|
||||
}
|
||||
static const uint8_t riscv64_bin[] = {
|
||||
#include "../../../contrib/loaders/flash/fespi/riscv64_fespi.inc"
|
||||
};
|
||||
|
||||
static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
|
||||
uint32_t offset, uint32_t count)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
struct fespi_flash_bank *fespi_info = bank->driver_priv;
|
||||
uint32_t cur_count, page_size, page_offset;
|
||||
uint32_t cur_count, page_size;
|
||||
int sector;
|
||||
int retval = ERROR_OK;
|
||||
|
||||
LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32,
|
||||
__func__, offset, count);
|
||||
LOG_DEBUG("bank->size=0x%x offset=0x%08" PRIx32 " count=0x%08" PRIx32,
|
||||
bank->size, offset, count);
|
||||
|
||||
if (target->state != TARGET_HALTED) {
|
||||
LOG_ERROR("Target not halted");
|
||||
|
@ -763,80 +526,147 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
|
|||
}
|
||||
}
|
||||
|
||||
struct working_area *algorithm_wa;
|
||||
if (target_alloc_working_area(target, sizeof(algorithm_bin),
|
||||
&algorithm_wa) != ERROR_OK) {
|
||||
LOG_WARNING("Couldn't allocate %zd-byte working area.",
|
||||
sizeof(algorithm_bin));
|
||||
algorithm_wa = NULL;
|
||||
int xlen = riscv_xlen(target);
|
||||
struct working_area *algorithm_wa = NULL;
|
||||
struct working_area *data_wa = NULL;
|
||||
const uint8_t *bin;
|
||||
size_t bin_size;
|
||||
if (xlen == 32) {
|
||||
bin = riscv32_bin;
|
||||
bin_size = sizeof(riscv32_bin);
|
||||
} else {
|
||||
bin = riscv64_bin;
|
||||
bin_size = sizeof(riscv64_bin);
|
||||
}
|
||||
|
||||
unsigned data_wa_size = 0;
|
||||
if (target_alloc_working_area(target, bin_size, &algorithm_wa) == ERROR_OK) {
|
||||
retval = target_write_buffer(target, algorithm_wa->address,
|
||||
sizeof(algorithm_bin), algorithm_bin);
|
||||
bin_size, bin);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("Failed to write code to " TARGET_ADDR_FMT ": %d",
|
||||
algorithm_wa->address, retval);
|
||||
target_free_working_area(target, algorithm_wa);
|
||||
algorithm_wa = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
struct working_area *data_wa = NULL;
|
||||
unsigned data_wa_size = 2 * count;
|
||||
while (1) {
|
||||
if (data_wa_size < 128) {
|
||||
LOG_WARNING("Couldn't allocate data working area.");
|
||||
target_free_working_area(target, algorithm_wa);
|
||||
algorithm_wa = NULL;
|
||||
}
|
||||
if (target_alloc_working_area_try(target, data_wa_size, &data_wa) ==
|
||||
ERROR_OK) {
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
data_wa_size = MIN(target->working_area_size - algorithm_wa->size, count);
|
||||
while (1) {
|
||||
if (data_wa_size < 128) {
|
||||
LOG_WARNING("Couldn't allocate data working area.");
|
||||
target_free_working_area(target, algorithm_wa);
|
||||
algorithm_wa = NULL;
|
||||
}
|
||||
if (target_alloc_working_area_try(target, data_wa_size, &data_wa) ==
|
||||
ERROR_OK) {
|
||||
break;
|
||||
}
|
||||
|
||||
data_wa_size /= 2;
|
||||
data_wa_size = data_wa_size * 3 / 4;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
LOG_WARNING("Couldn't allocate %zd-byte working area.", bin_size);
|
||||
algorithm_wa = NULL;
|
||||
}
|
||||
|
||||
/* If no valid page_size, use reasonable default. */
|
||||
page_size = fespi_info->dev->pagesize ?
|
||||
fespi_info->dev->pagesize : SPIFLASH_DEF_PAGESIZE;
|
||||
|
||||
fespi_txwm_wait(bank);
|
||||
if (algorithm_wa) {
|
||||
struct reg_param reg_params[6];
|
||||
init_reg_param(®_params[0], "a0", xlen, PARAM_IN_OUT);
|
||||
init_reg_param(®_params[1], "a1", xlen, PARAM_OUT);
|
||||
init_reg_param(®_params[2], "a2", xlen, PARAM_OUT);
|
||||
init_reg_param(®_params[3], "a3", xlen, PARAM_OUT);
|
||||
init_reg_param(®_params[4], "a4", xlen, PARAM_OUT);
|
||||
init_reg_param(®_params[5], "a5", xlen, PARAM_OUT);
|
||||
|
||||
/* Disable Hardware accesses*/
|
||||
if (fespi_disable_hw_mode(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
while (count > 0) {
|
||||
cur_count = MIN(count, data_wa_size);
|
||||
buf_set_u64(reg_params[0].value, 0, xlen, fespi_info->ctrl_base);
|
||||
buf_set_u64(reg_params[1].value, 0, xlen, page_size);
|
||||
buf_set_u64(reg_params[2].value, 0, xlen, data_wa->address);
|
||||
buf_set_u64(reg_params[3].value, 0, xlen, offset);
|
||||
buf_set_u64(reg_params[4].value, 0, xlen, cur_count);
|
||||
buf_set_u64(reg_params[5].value, 0, xlen,
|
||||
fespi_info->dev->pprog_cmd | (bank->size > 0x1000000 ? 0x100 : 0));
|
||||
|
||||
struct algorithm_steps *as = as_new();
|
||||
retval = target_write_buffer(target, data_wa->address, cur_count,
|
||||
buffer);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_DEBUG("Failed to write %d bytes to " TARGET_ADDR_FMT ": %d",
|
||||
cur_count, data_wa->address, retval);
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* poll WIP */
|
||||
retval = fespi_wip(bank, FESPI_PROBE_TIMEOUT);
|
||||
if (retval != ERROR_OK)
|
||||
goto err;
|
||||
LOG_DEBUG("write(ctrl_base=0x%" TARGET_PRIxADDR ", page_size=0x%x, "
|
||||
"address=0x%" TARGET_PRIxADDR ", offset=0x%" PRIx32
|
||||
", count=0x%" PRIx32 "), buffer=%02x %02x %02x %02x %02x %02x ..." PRIx32,
|
||||
fespi_info->ctrl_base, page_size, data_wa->address, offset, cur_count,
|
||||
buffer[0], buffer[1], buffer[2], buffer[3], buffer[4], buffer[5]);
|
||||
retval = target_run_algorithm(target, 0, NULL,
|
||||
ARRAY_SIZE(reg_params), reg_params,
|
||||
algorithm_wa->address, 0, cur_count * 2, NULL);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("Failed to execute algorithm at " TARGET_ADDR_FMT ": %d",
|
||||
algorithm_wa->address, retval);
|
||||
goto err;
|
||||
}
|
||||
|
||||
page_offset = offset % page_size;
|
||||
/* central part, aligned words */
|
||||
while (count > 0) {
|
||||
/* clip block at page boundary */
|
||||
if (page_offset + count > page_size)
|
||||
cur_count = page_size - page_offset;
|
||||
else
|
||||
cur_count = count;
|
||||
int algorithm_result = buf_get_u64(reg_params[0].value, 0, xlen);
|
||||
if (algorithm_result != 0) {
|
||||
LOG_ERROR("Algorithm returned error %d", algorithm_result);
|
||||
retval = ERROR_FAIL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (algorithm_wa)
|
||||
retval = steps_add_buffer_write(as, buffer, offset, cur_count);
|
||||
else
|
||||
retval = slow_fespi_write_buffer(bank, buffer, offset, cur_count);
|
||||
buffer += cur_count;
|
||||
offset += cur_count;
|
||||
count -= cur_count;
|
||||
}
|
||||
|
||||
target_free_working_area(target, data_wa);
|
||||
target_free_working_area(target, algorithm_wa);
|
||||
|
||||
} else {
|
||||
fespi_txwm_wait(bank);
|
||||
|
||||
/* Disable Hardware accesses*/
|
||||
if (fespi_disable_hw_mode(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
/* poll WIP */
|
||||
retval = fespi_wip(bank, FESPI_PROBE_TIMEOUT);
|
||||
if (retval != ERROR_OK)
|
||||
goto err;
|
||||
|
||||
page_offset = 0;
|
||||
buffer += cur_count;
|
||||
offset += cur_count;
|
||||
count -= cur_count;
|
||||
uint32_t page_offset = offset % page_size;
|
||||
/* central part, aligned words */
|
||||
while (count > 0) {
|
||||
/* clip block at page boundary */
|
||||
if (page_offset + count > page_size)
|
||||
cur_count = page_size - page_offset;
|
||||
else
|
||||
cur_count = count;
|
||||
|
||||
retval = slow_fespi_write_buffer(bank, buffer, offset, cur_count);
|
||||
if (retval != ERROR_OK)
|
||||
goto err;
|
||||
|
||||
page_offset = 0;
|
||||
buffer += cur_count;
|
||||
offset += cur_count;
|
||||
count -= cur_count;
|
||||
}
|
||||
|
||||
/* Switch to HW mode before return to prompt */
|
||||
if (fespi_enable_hw_mode(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (algorithm_wa)
|
||||
retval = steps_execute(as, bank, algorithm_wa, data_wa);
|
||||
return ERROR_OK;
|
||||
|
||||
err:
|
||||
if (algorithm_wa) {
|
||||
|
@ -844,11 +674,10 @@ err:
|
|||
target_free_working_area(target, algorithm_wa);
|
||||
}
|
||||
|
||||
as_delete(as);
|
||||
|
||||
/* Switch to HW mode before return to prompt */
|
||||
if (fespi_enable_hw_mode(bank) != ERROR_OK)
|
||||
return ERROR_FAIL;
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -978,8 +807,6 @@ static int fespi_probe(struct flash_bank *bank)
|
|||
|
||||
if (bank->size <= (1UL << 16))
|
||||
LOG_WARNING("device needs 2-byte addresses - not implemented");
|
||||
if (bank->size > (1UL << 24))
|
||||
LOG_WARNING("device needs paging or 4-byte addresses - not implemented");
|
||||
|
||||
/* if no sectors, treat whole bank as single sector */
|
||||
sectorsize = fespi_info->dev->sectorsize ?
|
||||
|
|
|
@ -958,9 +958,9 @@ COMMAND_HANDLER(fm3_handle_chip_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "fm3 chip erase complete");
|
||||
command_print(CMD, "fm3 chip erase complete");
|
||||
} else {
|
||||
command_print(CMD_CTX, "fm3 chip erase failed");
|
||||
command_print(CMD, "fm3 chip erase failed");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
|
|
@ -2895,7 +2895,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
|
|||
flex_nvm_partition_code = (uint8_t)((sim_fcfg1 >> 8) & 0x0f);
|
||||
switch (flex_nvm_partition_code) {
|
||||
case 0:
|
||||
command_print(CMD_CTX, "No EEPROM backup, data flash only");
|
||||
command_print(CMD, "No EEPROM backup, data flash only");
|
||||
break;
|
||||
case 1:
|
||||
case 2:
|
||||
|
@ -2903,10 +2903,10 @@ COMMAND_HANDLER(kinetis_nvm_partition)
|
|||
case 4:
|
||||
case 5:
|
||||
case 6:
|
||||
command_print(CMD_CTX, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
|
||||
command_print(CMD, "EEPROM backup %d KB", 4 << flex_nvm_partition_code);
|
||||
break;
|
||||
case 8:
|
||||
command_print(CMD_CTX, "No data flash, EEPROM backup only");
|
||||
command_print(CMD, "No data flash, EEPROM backup only");
|
||||
break;
|
||||
case 0x9:
|
||||
case 0xA:
|
||||
|
@ -2914,13 +2914,13 @@ COMMAND_HANDLER(kinetis_nvm_partition)
|
|||
case 0xC:
|
||||
case 0xD:
|
||||
case 0xE:
|
||||
command_print(CMD_CTX, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
|
||||
command_print(CMD, "data flash %d KB", 4 << (flex_nvm_partition_code & 7));
|
||||
break;
|
||||
case 0xf:
|
||||
command_print(CMD_CTX, "No EEPROM backup, data flash only (DEPART not set)");
|
||||
command_print(CMD, "No EEPROM backup, data flash only (DEPART not set)");
|
||||
break;
|
||||
default:
|
||||
command_print(CMD_CTX, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
|
||||
command_print(CMD, "Unsupported EEPROM backup size code 0x%02" PRIx8, flex_nvm_partition_code);
|
||||
}
|
||||
return ERROR_OK;
|
||||
|
||||
|
@ -2986,7 +2986,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
|
|||
if (result != ERROR_OK)
|
||||
return result;
|
||||
|
||||
command_print(CMD_CTX, "FlexNVM partition set. Please reset MCU.");
|
||||
command_print(CMD, "FlexNVM partition set. Please reset MCU.");
|
||||
|
||||
if (k_chip) {
|
||||
first_nvm_bank = k_chip->num_pflash_blocks;
|
||||
|
@ -2996,7 +2996,7 @@ COMMAND_HANDLER(kinetis_nvm_partition)
|
|||
k_chip->probed = false;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "FlexNVM banks will be re-probed to set new data flash size.");
|
||||
command_print(CMD, "FlexNVM banks will be re-probed to set new data flash size.");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -3015,12 +3015,12 @@ COMMAND_HANDLER(kinetis_fcf_source_handler)
|
|||
}
|
||||
|
||||
if (allow_fcf_writes) {
|
||||
command_print(CMD_CTX, "Arbitrary Flash Configuration Field writes enabled.");
|
||||
command_print(CMD_CTX, "Protection info writes to FCF disabled.");
|
||||
command_print(CMD, "Arbitrary Flash Configuration Field writes enabled.");
|
||||
command_print(CMD, "Protection info writes to FCF disabled.");
|
||||
LOG_WARNING("BEWARE: incorrect flash configuration may permanently lock the device.");
|
||||
} else {
|
||||
command_print(CMD_CTX, "Protection info writes to Flash Configuration Field enabled.");
|
||||
command_print(CMD_CTX, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
|
||||
command_print(CMD, "Protection info writes to Flash Configuration Field enabled.");
|
||||
command_print(CMD, "Arbitrary FCF writes disabled. Mode safe from unwanted locking of the device.");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
@ -3035,7 +3035,7 @@ COMMAND_HANDLER(kinetis_fopt_handler)
|
|||
fcf_fopt = (uint8_t)strtoul(CMD_ARGV[0], NULL, 0);
|
||||
fcf_fopt_configured = true;
|
||||
} else {
|
||||
command_print(CMD_CTX, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
|
||||
command_print(CMD, "FCF_FOPT 0x%02" PRIx8, fcf_fopt);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
@ -3074,7 +3074,8 @@ static const struct command_registration kinetis_security_command_handlers[] = {
|
|||
.usage = "",
|
||||
.handler = kinetis_mdm_mass_erase,
|
||||
},
|
||||
{ .name = "reset",
|
||||
{
|
||||
.name = "reset",
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "Issue a reset via the MDM-AP",
|
||||
.usage = "",
|
||||
|
@ -3126,6 +3127,7 @@ static const struct command_registration kinetis_exec_command_handlers[] = {
|
|||
.mode = COMMAND_CONFIG,
|
||||
.help = "Driver creates additional banks if device with two/four flash blocks is probed",
|
||||
.handler = kinetis_create_banks_handler,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -1579,11 +1579,11 @@ COMMAND_HANDLER(lpc2000_handle_part_id_command)
|
|||
int status_code = get_lpc2000_part_id(bank, &part_id);
|
||||
if (status_code != 0x0) {
|
||||
if (status_code == ERROR_FLASH_OPERATION_FAILED) {
|
||||
command_print(CMD_CTX, "no sufficient working area specified, can't access LPC2000 IAP interface");
|
||||
command_print(CMD, "no sufficient working area specified, can't access LPC2000 IAP interface");
|
||||
} else
|
||||
command_print(CMD_CTX, "lpc2000 IAP returned status code %i", status_code);
|
||||
command_print(CMD, "lpc2000 IAP returned status code %i", status_code);
|
||||
} else
|
||||
command_print(CMD_CTX, "lpc2000 part id: 0x%8.8" PRIx32, part_id);
|
||||
command_print(CMD, "lpc2000 part id: 0x%8.8" PRIx32, part_id);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -501,7 +501,7 @@ COMMAND_HANDLER(lpc2900_handle_signature_command)
|
|||
if (status != ERROR_OK)
|
||||
return status;
|
||||
|
||||
command_print(CMD_CTX, "signature: 0x%8.8" PRIx32
|
||||
command_print(CMD, "signature: 0x%8.8" PRIx32
|
||||
":0x%8.8" PRIx32
|
||||
":0x%8.8" PRIx32
|
||||
":0x%8.8" PRIx32,
|
||||
|
@ -595,11 +595,11 @@ COMMAND_HANDLER(lpc2900_handle_password_command)
|
|||
lpc2900_info->risky = !strcmp(CMD_ARGV[1], ISS_PASSWORD);
|
||||
|
||||
if (!lpc2900_info->risky) {
|
||||
command_print(CMD_CTX, "Wrong password (use '%s')", ISS_PASSWORD);
|
||||
command_print(CMD, "Wrong password (use '%s')", ISS_PASSWORD);
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"Potentially dangerous operation allowed in next command!");
|
||||
|
||||
return ERROR_OK;
|
||||
|
@ -622,7 +622,7 @@ COMMAND_HANDLER(lpc2900_handle_write_custom_command)
|
|||
|
||||
/* Check if command execution is allowed. */
|
||||
if (!lpc2900_info->risky) {
|
||||
command_print(CMD_CTX, "Command execution not allowed!");
|
||||
command_print(CMD, "Command execution not allowed!");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
lpc2900_info->risky = 0;
|
||||
|
@ -721,7 +721,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
|
|||
|
||||
/* Check if command execution is allowed. */
|
||||
if (!lpc2900_info->risky) {
|
||||
command_print(CMD_CTX, "Command execution not allowed! "
|
||||
command_print(CMD, "Command execution not allowed! "
|
||||
"(use 'password' command first)");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
@ -734,7 +734,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
|
|||
if ((first >= bank->num_sectors) ||
|
||||
(last >= bank->num_sectors) ||
|
||||
(first > last)) {
|
||||
command_print(CMD_CTX, "Illegal sector range");
|
||||
command_print(CMD, "Illegal sector range");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
|
@ -773,7 +773,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_sector_command)
|
|||
}
|
||||
}
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"Sectors security will become effective after next power cycle");
|
||||
|
||||
/* Update the sector security status */
|
||||
|
@ -803,7 +803,7 @@ COMMAND_HANDLER(lpc2900_handle_secure_jtag_command)
|
|||
|
||||
/* Check if command execution is allowed. */
|
||||
if (!lpc2900_info->risky) {
|
||||
command_print(CMD_CTX, "Command execution not allowed! "
|
||||
command_print(CMD, "Command execution not allowed! "
|
||||
"(use 'password' command first)");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
|
|
@ -772,7 +772,7 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
|
|||
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "max32xxx mass_erase <bank>");
|
||||
command_print(CMD, "max32xxx mass_erase <bank>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -784,9 +784,9 @@ COMMAND_HANDLER(max32xxx_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "max32xxx mass erase complete");
|
||||
command_print(CMD, "max32xxx mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "max32xxx mass erase failed");
|
||||
command_print(CMD, "max32xxx mass erase failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -799,7 +799,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
|
|||
uint32_t addr, len;
|
||||
|
||||
if (CMD_ARGC != 3) {
|
||||
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -811,7 +811,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
|
|||
/* Convert the range to the page numbers */
|
||||
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
|
||||
LOG_WARNING("Error parsing address");
|
||||
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
/* Mask off the top portion on the address */
|
||||
|
@ -819,7 +819,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
|
|||
|
||||
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
|
||||
LOG_WARNING("Error parsing length");
|
||||
command_print(CMD_CTX, "max32xxx protection_set <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_set <bank> <addr> <size>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -840,9 +840,9 @@ COMMAND_HANDLER(max32xxx_handle_protection_set_command)
|
|||
len = addr + (len / info->sector_size) - 1;
|
||||
|
||||
if (max32xxx_protect(bank, 1, addr, len) == ERROR_OK)
|
||||
command_print(CMD_CTX, "max32xxx protection set complete");
|
||||
command_print(CMD, "max32xxx protection set complete");
|
||||
else
|
||||
command_print(CMD_CTX, "max32xxx protection set failed");
|
||||
command_print(CMD, "max32xxx protection set failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -855,7 +855,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
|
|||
uint32_t addr, len;
|
||||
|
||||
if (CMD_ARGC != 3) {
|
||||
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -867,7 +867,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
|
|||
/* Convert the range to the page numbers */
|
||||
if (1 != sscanf(CMD_ARGV[1], "0x%"SCNx32, &addr)) {
|
||||
LOG_WARNING("Error parsing address");
|
||||
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
/* Mask off the top portion on the address */
|
||||
|
@ -875,7 +875,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
|
|||
|
||||
if (1 != sscanf(CMD_ARGV[2], "0x%"SCNx32, &len)) {
|
||||
LOG_WARNING("Error parsing length");
|
||||
command_print(CMD_CTX, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
command_print(CMD, "max32xxx protection_clr <bank> <addr> <size>");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -896,9 +896,9 @@ COMMAND_HANDLER(max32xxx_handle_protection_clr_command)
|
|||
len = addr + (len / info->sector_size) - 1;
|
||||
|
||||
if (max32xxx_protect(bank, 0, addr, len) == ERROR_OK)
|
||||
command_print(CMD_CTX, "max32xxx protection clear complete");
|
||||
command_print(CMD, "max32xxx protection clear complete");
|
||||
else
|
||||
command_print(CMD_CTX, "max32xxx protection clear failed");
|
||||
command_print(CMD, "max32xxx protection clear failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -911,7 +911,7 @@ COMMAND_HANDLER(max32xxx_handle_protection_check_command)
|
|||
int i;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "max32xxx protection_check <bank>");
|
||||
command_print(CMD, "max32xxx protection_check <bank>");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -977,6 +977,7 @@ static const struct command_registration max32xxx_command_handlers[] = {
|
|||
.mode = COMMAND_EXEC,
|
||||
.help = "max32xxx flash command group",
|
||||
.chain = max32xxx_exec_command_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -425,9 +425,9 @@ COMMAND_HANDLER(niietcm4_handle_uflash_read_byte_command)
|
|||
retval = target_read_u32(target, UFMD, &uflash_data);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
command_print(CMD_CTX, "Read userflash %s region:\n"
|
||||
"address = 0x%04x,\n"
|
||||
"value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
|
||||
command_print(CMD, "Read userflash %s region:\n"
|
||||
"address = 0x%04x,\n"
|
||||
"value = 0x%02x.", CMD_ARGV[0], uflash_addr, uflash_data);
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -467,10 +467,10 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
|
|||
|
||||
int page_num = uflash_addr/USERFLASH_PAGE_SIZE;
|
||||
|
||||
command_print(CMD_CTX, "Write userflash %s region:\n"
|
||||
"address = 0x%04x,\n"
|
||||
"value = 0x%02x.\n"
|
||||
"Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
|
||||
command_print(CMD, "Write userflash %s region:\n"
|
||||
"address = 0x%04x,\n"
|
||||
"value = 0x%02x.\n"
|
||||
"Please wait ... ", CMD_ARGV[0], uflash_addr, uflash_data);
|
||||
/* dump */
|
||||
uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
|
||||
niietcm4_dump_uflash_page(bank, uflash_dump, page_num, mem_type);
|
||||
|
@ -483,7 +483,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_write_byte_command)
|
|||
|
||||
/* write dump to userflash */
|
||||
niietcm4_load_uflash_page(bank, uflash_dump, page_num, mem_type);
|
||||
command_print(CMD_CTX, "done!");
|
||||
command_print(CMD, "done!");
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -520,7 +520,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_full_erase_command)
|
|||
retval = niietcm4_uopstatus_check(bank);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
command_print(CMD_CTX, "Userflash full erase done!");
|
||||
command_print(CMD, "Userflash full erase done!");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -563,7 +563,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_erase_command)
|
|||
return retval;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last);
|
||||
command_print(CMD, "Erase %s userflash pages %d through %d done!", CMD_ARGV[0], first, last);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -621,9 +621,9 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_check_command)
|
|||
return retval;
|
||||
|
||||
if (uflash_data & INFOWORD3_LOCK_IFB_UF)
|
||||
command_print(CMD_CTX, "All sectors of info userflash are not protected!");
|
||||
command_print(CMD, "All sectors of info userflash are not protected!");
|
||||
else
|
||||
command_print(CMD_CTX, "All sectors of info userflash are protected!");
|
||||
command_print(CMD, "All sectors of info userflash are protected!");
|
||||
} else {
|
||||
uflash_addr = UF_LOCK_ADDR;
|
||||
uflash_cmd = UFMC_MAGIC_KEY | UFMC_READ_IFB;
|
||||
|
@ -645,10 +645,10 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_check_command)
|
|||
|
||||
for (j = 0; j < 8; j++) {
|
||||
if (uflash_data & 0x1)
|
||||
command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is not protected!",
|
||||
command_print(CMD, "Userflash sector #%03d: 0x%04x (0x100) is not protected!",
|
||||
i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
|
||||
else
|
||||
command_print(CMD_CTX, "Userflash sector #%03d: 0x%04x (0x100) is protected!",
|
||||
command_print(CMD, "Userflash sector #%03d: 0x%04x (0x100) is protected!",
|
||||
i*8+j, (i*8+j)*USERFLASH_PAGE_SIZE);
|
||||
uflash_data = uflash_data >> 1;
|
||||
}
|
||||
|
@ -693,11 +693,11 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_command)
|
|||
|
||||
int set;
|
||||
if (strcmp("on", CMD_ARGV[3]) == 0) {
|
||||
command_print(CMD_CTX, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ",
|
||||
command_print(CMD, "Try to enable %s userflash sectors %d through %d protection. Please wait ... ",
|
||||
CMD_ARGV[0], first, last);
|
||||
set = 1;
|
||||
} else if (strcmp("off", CMD_ARGV[3]) == 0) {
|
||||
command_print(CMD_CTX, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ",
|
||||
command_print(CMD, "Try to disable %s userflash sectors %d through %d protection. Please wait ... ",
|
||||
CMD_ARGV[0], first, last);
|
||||
set = 0;
|
||||
} else
|
||||
|
@ -707,7 +707,7 @@ COMMAND_HANDLER(niietcm4_handle_uflash_protect_command)
|
|||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
command_print(CMD_CTX, "done!");
|
||||
command_print(CMD, "done!");
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -733,10 +733,10 @@ COMMAND_HANDLER(niietcm4_handle_bflash_info_remap_command)
|
|||
|
||||
int set;
|
||||
if (strcmp("on", CMD_ARGV[0]) == 0) {
|
||||
command_print(CMD_CTX, "Try to enable bootflash info region remap. Please wait ...");
|
||||
command_print(CMD, "Try to enable bootflash info region remap. Please wait ...");
|
||||
set = 1;
|
||||
} else if (strcmp("off", CMD_ARGV[0]) == 0) {
|
||||
command_print(CMD_CTX, "Try to disable bootflash info region remap. Please wait ...");
|
||||
command_print(CMD, "Try to disable bootflash info region remap. Please wait ...");
|
||||
set = 0;
|
||||
} else
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
@ -756,7 +756,7 @@ COMMAND_HANDLER(niietcm4_handle_bflash_info_remap_command)
|
|||
|
||||
/* write dump to userflash */
|
||||
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
|
||||
command_print(CMD_CTX, "done!");
|
||||
command_print(CMD, "done!");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -814,11 +814,11 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
|
|||
else
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
command_print(CMD_CTX, "Try to configure external memory boot interface:\n"
|
||||
"port = %s\n"
|
||||
"pin = %s\n"
|
||||
"func = %s\n"
|
||||
"Please wait ...", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2]);
|
||||
command_print(CMD, "Try to configure external memory boot interface:\n"
|
||||
"port = %s\n"
|
||||
"pin = %s\n"
|
||||
"func = %s\n"
|
||||
"Please wait ...", CMD_ARGV[0], CMD_ARGV[1], CMD_ARGV[2]);
|
||||
/* dump */
|
||||
uint32_t uflash_dump[USERFLASH_PAGE_SIZE];
|
||||
niietcm4_dump_uflash_page(bank, uflash_dump, 0, 1);
|
||||
|
@ -833,7 +833,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_cfg_command)
|
|||
|
||||
/* write dump to userflash */
|
||||
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
|
||||
command_print(CMD_CTX, "done!");
|
||||
command_print(CMD, "done!");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -861,10 +861,10 @@ COMMAND_HANDLER(niietcm4_handle_extmem_boot_command)
|
|||
int set;
|
||||
|
||||
if (strcmp("on", CMD_ARGV[0]) == 0) {
|
||||
command_print(CMD_CTX, "Try to enable boot from external memory. Please wait ...");
|
||||
command_print(CMD, "Try to enable boot from external memory. Please wait ...");
|
||||
set = 1;
|
||||
} else if (strcmp("off", CMD_ARGV[0]) == 0) {
|
||||
command_print(CMD_CTX, "Try to disable boot from external memory. Please wait ...");
|
||||
command_print(CMD, "Try to disable boot from external memory. Please wait ...");
|
||||
set = 0;
|
||||
} else
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
@ -884,7 +884,7 @@ COMMAND_HANDLER(niietcm4_handle_extmem_boot_command)
|
|||
|
||||
/* write dump to userflash */
|
||||
niietcm4_load_uflash_page(bank, uflash_dump, 0, 1);
|
||||
command_print(CMD_CTX, "done!");
|
||||
command_print(CMD, "done!");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -900,7 +900,7 @@ COMMAND_HANDLER(niietcm4_handle_service_mode_erase_command)
|
|||
return retval;
|
||||
struct target *target = bank->target;
|
||||
|
||||
command_print(CMD_CTX, "Try to perform service mode erase. Please wait ...");
|
||||
command_print(CMD, "Try to perform service mode erase. Please wait ...");
|
||||
|
||||
retval = target_write_u32(target, SERVICE_MODE_ERASE_ADDR, 1);
|
||||
if (retval != ERROR_OK)
|
||||
|
@ -923,7 +923,7 @@ COMMAND_HANDLER(niietcm4_handle_service_mode_erase_command)
|
|||
}
|
||||
busy_sleep(1); /* can use busy sleep for short times. */
|
||||
}
|
||||
command_print(CMD_CTX, "done! All data erased.");
|
||||
command_print(CMD, "done! All data erased.");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -938,7 +938,7 @@ COMMAND_HANDLER(niietcm4_handle_driver_info_command)
|
|||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
command_print(CMD_CTX, "niietcm4 flash driver\n"
|
||||
command_print(CMD, "niietcm4 flash driver\n"
|
||||
"version: %d.%d\n"
|
||||
"author: Bogdan Kolbov\n"
|
||||
"mail: kolbov@niiet.ru",
|
||||
|
|
|
@ -1118,6 +1118,7 @@ static const struct command_registration nrf5_exec_command_handlers[] = {
|
|||
.handler = nrf5_handle_mass_erase_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "Erase all flash contents of the chip.",
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -1827,11 +1827,11 @@ COMMAND_HANDLER(numicro_handle_chip_erase_command)
|
|||
|
||||
retval = numicro_fmc_cmd(target, ISPCMD_CHIPERASE, 0, 0, &rdat);
|
||||
if (retval != ERROR_OK) {
|
||||
command_print(CMD_CTX, "numicro chip_erase failed");
|
||||
command_print(CMD, "numicro chip_erase failed");
|
||||
return retval;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "numicro chip_erase complete");
|
||||
command_print(CMD, "numicro chip_erase complete");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1856,6 +1856,7 @@ static const struct command_registration numicro_exec_command_handlers[] = {
|
|||
.handler = numicro_handle_chip_erase_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "chip erase through ISP.",
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -858,7 +858,7 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
|
|||
return retval;
|
||||
|
||||
if (address < bank->base || address >= (bank->base + bank->size)) {
|
||||
command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
|
||||
command_print(CMD, "flash address '%s' is out of bounds", CMD_ARGV[0]);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -870,9 +870,9 @@ COMMAND_HANDLER(pic32mx_handle_pgm_word_command)
|
|||
res = ERROR_FLASH_OPERATION_FAILED;
|
||||
|
||||
if (res == ERROR_OK)
|
||||
command_print(CMD_CTX, "pic32mx pgm word complete");
|
||||
command_print(CMD, "pic32mx pgm word complete");
|
||||
else
|
||||
command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
|
||||
command_print(CMD, "pic32mx pgm word failed (status = 0x%x)", status);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -885,7 +885,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
|
|||
int timeout = 10;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "pic32mx unlock <bank>");
|
||||
command_print(CMD, "pic32mx unlock <bank>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -907,7 +907,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
|
|||
mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
|
||||
if (mchip_cmd & (1 << 7)) {
|
||||
/* device is not locked */
|
||||
command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
|
||||
command_print(CMD, "pic32mx is already unlocked, erasing anyway");
|
||||
}
|
||||
|
||||
/* unlock/erase device */
|
||||
|
@ -931,7 +931,7 @@ COMMAND_HANDLER(pic32mx_handle_unlock_command)
|
|||
/* select ejtag tap */
|
||||
mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
|
||||
|
||||
command_print(CMD_CTX, "pic32mx unlocked.\n"
|
||||
command_print(CMD, "pic32mx unlocked.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
|
||||
|
|
|
@ -913,9 +913,9 @@ COMMAND_HANDLER(psoc4_handle_mass_erase_command)
|
|||
|
||||
retval = psoc4_mass_erase(bank);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "psoc mass erase complete");
|
||||
command_print(CMD, "psoc mass erase complete");
|
||||
else
|
||||
command_print(CMD_CTX, "psoc mass erase failed");
|
||||
command_print(CMD, "psoc mass erase failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -1501,9 +1501,9 @@ COMMAND_HANDLER(psoc5lp_handle_mass_erase_command)
|
|||
|
||||
retval = psoc5lp_spc_erase_all(bank->target);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "PSoC 5LP erase succeeded");
|
||||
command_print(CMD, "PSoC 5LP erase succeeded");
|
||||
else
|
||||
command_print(CMD_CTX, "PSoC 5LP erase failed");
|
||||
command_print(CMD, "PSoC 5LP erase failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -1336,9 +1336,9 @@ COMMAND_HANDLER(stellaris_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stellaris mass erase complete");
|
||||
command_print(CMD, "stellaris mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "stellaris mass erase failed");
|
||||
command_print(CMD, "stellaris mass erase failed");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
@ -1186,7 +1186,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
return retval;
|
||||
|
||||
if (stm32x_erase_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to erase options");
|
||||
command_print(CMD, "stm32x failed to erase options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1194,11 +1194,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
stm32x_info->option_bytes.rdp = 0;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to lock device");
|
||||
command_print(CMD, "stm32x failed to lock device");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "stm32x locked");
|
||||
command_print(CMD, "stm32x locked");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1227,16 +1227,16 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
|
|||
return retval;
|
||||
|
||||
if (stm32x_erase_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to erase options");
|
||||
command_print(CMD, "stm32x failed to erase options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to unlock device");
|
||||
command_print(CMD, "stm32x failed to unlock device");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "stm32x unlocked.\n"
|
||||
command_print(CMD, "stm32x unlocked.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
|
||||
|
@ -1281,30 +1281,30 @@ COMMAND_HANDLER(stm32x_handle_options_read_command)
|
|||
return retval;
|
||||
|
||||
if (optionbyte & (1 << OPT_ERROR))
|
||||
command_print(CMD_CTX, "option byte complement error");
|
||||
command_print(CMD, "option byte complement error");
|
||||
|
||||
command_print(CMD_CTX, "option byte register = 0x%" PRIx32 "", optionbyte);
|
||||
command_print(CMD_CTX, "write protection register = 0x%" PRIx32 "", protection);
|
||||
command_print(CMD, "option byte register = 0x%" PRIx32 "", optionbyte);
|
||||
command_print(CMD, "write protection register = 0x%" PRIx32 "", protection);
|
||||
|
||||
command_print(CMD_CTX, "read protection: %s",
|
||||
command_print(CMD, "read protection: %s",
|
||||
(optionbyte & (1 << OPT_READOUT)) ? "on" : "off");
|
||||
|
||||
/* user option bytes are offset depending on variant */
|
||||
optionbyte >>= stm32x_info->option_offset;
|
||||
|
||||
command_print(CMD_CTX, "watchdog: %sware",
|
||||
command_print(CMD, "watchdog: %sware",
|
||||
(optionbyte & (1 << OPT_RDWDGSW)) ? "soft" : "hard");
|
||||
|
||||
command_print(CMD_CTX, "stop mode: %sreset generated upon entry",
|
||||
command_print(CMD, "stop mode: %sreset generated upon entry",
|
||||
(optionbyte & (1 << OPT_RDRSTSTOP)) ? "no " : "");
|
||||
|
||||
command_print(CMD_CTX, "standby mode: %sreset generated upon entry",
|
||||
command_print(CMD, "standby mode: %sreset generated upon entry",
|
||||
(optionbyte & (1 << OPT_RDRSTSTDBY)) ? "no " : "");
|
||||
|
||||
if (stm32x_info->has_dual_banks)
|
||||
command_print(CMD_CTX, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
|
||||
command_print(CMD, "boot: bank %d", (optionbyte & (1 << OPT_BFB2)) ? 0 : 1);
|
||||
|
||||
command_print(CMD_CTX, "user data = 0x%02" PRIx16 "", user_data);
|
||||
command_print(CMD, "user data = 0x%02" PRIx16 "", user_data);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1383,7 +1383,7 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
|
|||
}
|
||||
|
||||
if (stm32x_erase_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to erase options");
|
||||
command_print(CMD, "stm32x failed to erase options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1391,11 +1391,11 @@ COMMAND_HANDLER(stm32x_handle_options_write_command)
|
|||
stm32x_info->option_bytes.data = useropt;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32x failed to write options");
|
||||
command_print(CMD, "stm32x failed to write options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "stm32x write options complete.\n"
|
||||
command_print(CMD, "stm32x write options complete.\n"
|
||||
"INFO: %spower cycle is required "
|
||||
"for the new settings to take effect.",
|
||||
stm32x_info->can_load_options
|
||||
|
@ -1504,9 +1504,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stm32x mass erase complete");
|
||||
command_print(CMD, "stm32x mass erase complete");
|
||||
} else
|
||||
command_print(CMD_CTX, "stm32x mass erase failed");
|
||||
command_print(CMD, "stm32x mass erase failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -1415,7 +1415,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
}
|
||||
|
||||
if (stm32x_read_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
|
||||
command_print(CMD, "%s failed to read options", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1423,11 +1423,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
stm32x_info->option_bytes.RDP = 0;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
|
||||
command_print(CMD, "%s failed to lock device", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "%s locked", bank->driver->name);
|
||||
command_print(CMD, "%s locked", bank->driver->name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1454,7 +1454,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
|
|||
}
|
||||
|
||||
if (stm32x_read_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
|
||||
command_print(CMD, "%s failed to read options", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1466,11 +1466,11 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
|
|||
}
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
|
||||
command_print(CMD, "%s failed to unlock device", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "%s unlocked.\n"
|
||||
command_print(CMD, "%s unlocked.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.", bank->driver->name);
|
||||
|
||||
|
@ -1525,7 +1525,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
|
|||
int i;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "stm32x mass_erase <bank>");
|
||||
command_print(CMD, "stm32x mass_erase <bank>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1540,9 +1540,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stm32x mass erase complete");
|
||||
command_print(CMD, "stm32x mass erase complete");
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32x mass erase failed");
|
||||
command_print(CMD, "stm32x mass erase failed");
|
||||
}
|
||||
|
||||
return retval;
|
||||
|
@ -1555,7 +1555,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
|
|||
struct stm32x_flash_bank *stm32x_info = NULL;
|
||||
|
||||
if (CMD_ARGC != 1) {
|
||||
command_print(CMD_CTX, "stm32f2x options_read <bank>");
|
||||
command_print(CMD, "stm32f2x options_read <bank>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1572,20 +1572,20 @@ COMMAND_HANDLER(stm32f2x_handle_options_read_command)
|
|||
if (stm32x_info->has_boot_addr) {
|
||||
uint32_t boot_addr = stm32x_info->option_bytes.boot_addr;
|
||||
|
||||
command_print(CMD_CTX, "stm32f2x user_options 0x%03X,"
|
||||
command_print(CMD, "stm32f2x user_options 0x%03X,"
|
||||
" boot_add0 0x%04X, boot_add1 0x%04X",
|
||||
stm32x_info->option_bytes.user_options,
|
||||
boot_addr & 0xffff, (boot_addr & 0xffff0000) >> 16);
|
||||
if (stm32x_info->has_optcr2_pcrop) {
|
||||
command_print(CMD_CTX, "stm32f2x optcr2_pcrop 0x%08X",
|
||||
command_print(CMD, "stm32f2x optcr2_pcrop 0x%08X",
|
||||
stm32x_info->option_bytes.optcr2_pcrop);
|
||||
}
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32f2x user_options 0x%03X",
|
||||
command_print(CMD, "stm32f2x user_options 0x%03X",
|
||||
stm32x_info->option_bytes.user_options);
|
||||
}
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32f2x user_options 0x%02X",
|
||||
command_print(CMD, "stm32f2x user_options 0x%02X",
|
||||
stm32x_info->option_bytes.user_options);
|
||||
|
||||
}
|
||||
|
@ -1601,7 +1601,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
|
|||
uint16_t user_options, boot_addr0, boot_addr1, options_mask;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "stm32f2x options_write <bank> ...");
|
||||
command_print(CMD, "stm32f2x options_write <bank> ...");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1616,7 +1616,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
|
|||
stm32x_info = bank->driver_priv;
|
||||
if (stm32x_info->has_boot_addr) {
|
||||
if (CMD_ARGC != 4) {
|
||||
command_print(CMD_CTX, "stm32f2x options_write <bank> <user_options>"
|
||||
command_print(CMD, "stm32f2x options_write <bank> <user_options>"
|
||||
" <boot_addr0> <boot_addr1>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
@ -1625,7 +1625,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
|
|||
stm32x_info->option_bytes.boot_addr = boot_addr0 | (((uint32_t) boot_addr1) << 16);
|
||||
} else {
|
||||
if (CMD_ARGC != 2) {
|
||||
command_print(CMD_CTX, "stm32f2x options_write <bank> <user_options>");
|
||||
command_print(CMD, "stm32f2x options_write <bank> <user_options>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
}
|
||||
|
@ -1634,14 +1634,14 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
|
|||
options_mask = !stm32x_info->has_extra_options ? ~0xfc :
|
||||
~(((0xf00 << (stm32x_info->protection_bits - 12)) | 0xff) & 0xffc);
|
||||
if (user_options & options_mask) {
|
||||
command_print(CMD_CTX, "stm32f2x invalid user_options");
|
||||
command_print(CMD, "stm32f2x invalid user_options");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
stm32x_info->option_bytes.user_options = user_options;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32f2x failed to write options");
|
||||
command_print(CMD, "stm32f2x failed to write options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1649,7 +1649,7 @@ COMMAND_HANDLER(stm32f2x_handle_options_write_command)
|
|||
/* ... and reprogramming of whole flash */
|
||||
stm32x_info->probed = false;
|
||||
|
||||
command_print(CMD_CTX, "stm32f2x write options complete.\n"
|
||||
command_print(CMD, "stm32f2x write options complete.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
return retval;
|
||||
|
@ -1663,7 +1663,7 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
|
|||
uint32_t optcr2_pcrop;
|
||||
|
||||
if (CMD_ARGC != 2) {
|
||||
command_print(CMD_CTX, "stm32f2x optcr2_write <bank> <optcr2_value>");
|
||||
command_print(CMD, "stm32f2x optcr2_write <bank> <optcr2_value>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1673,11 +1673,11 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
|
|||
|
||||
stm32x_info = bank->driver_priv;
|
||||
if (!stm32x_info->has_optcr2_pcrop) {
|
||||
command_print(CMD_CTX, "no optcr2 register");
|
||||
command_print(CMD, "no optcr2 register");
|
||||
return ERROR_COMMAND_ARGUMENT_INVALID;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "INFO: To disable PCROP, set PCROP_RDP"
|
||||
command_print(CMD, "INFO: To disable PCROP, set PCROP_RDP"
|
||||
" with PCROPi bits STILL SET, then\nlock device and"
|
||||
" finally unlock it. Clears PCROP and mass erases flash.");
|
||||
|
||||
|
@ -1689,18 +1689,18 @@ COMMAND_HANDLER(stm32f2x_handle_optcr2_write_command)
|
|||
stm32x_info->option_bytes.optcr2_pcrop = optcr2_pcrop;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "stm32f2x failed to write options");
|
||||
command_print(CMD, "stm32f2x failed to write options");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "stm32f2x optcr2_write complete.");
|
||||
command_print(CMD, "stm32f2x optcr2_write complete.");
|
||||
return retval;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(stm32x_handle_otp_command)
|
||||
{
|
||||
if (CMD_ARGC < 2) {
|
||||
command_print(CMD_CTX, "stm32x otp <bank> (enable|disable|show)");
|
||||
command_print(CMD, "stm32x otp <bank> (enable|disable|show)");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1714,7 +1714,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
|
|||
} else if (strcmp(CMD_ARGV[1], "disable") == 0) {
|
||||
stm32x_otp_disable(bank);
|
||||
} else if (strcmp(CMD_ARGV[1], "show") == 0) {
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"OTP memory bank #%d is %s for write commands.",
|
||||
bank->bank_number,
|
||||
stm32x_is_otp_unlocked(bank) ? "enabled" : "disabled");
|
||||
|
@ -1722,7 +1722,7 @@ COMMAND_HANDLER(stm32x_handle_otp_command)
|
|||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
} else {
|
||||
command_print(CMD_CTX, "Failed: not an OTP bank.");
|
||||
command_print(CMD, "Failed: not an OTP bank.");
|
||||
}
|
||||
|
||||
return retval;
|
||||
|
|
|
@ -38,18 +38,18 @@
|
|||
#define FLASH_SR 0x10
|
||||
#define FLASH_CCR 0x14
|
||||
#define FLASH_OPTCR 0x18
|
||||
#define FLASH_OPTCUR 0x1C
|
||||
#define FLASH_OPTPRG 0x20
|
||||
#define FLASH_OPTSR_CUR 0x1C
|
||||
#define FLASH_OPTSR_PRG 0x20
|
||||
#define FLASH_OPTCCR 0x24
|
||||
#define FLASH_WPSNCUR 0x38
|
||||
#define FLASH_WPSNPRG 0x3C
|
||||
#define FLASH_WPSN_CUR 0x38
|
||||
#define FLASH_WPSN_PRG 0x3C
|
||||
|
||||
|
||||
/* FLASH_CR register bits */
|
||||
#define FLASH_LOCK (1 << 0)
|
||||
#define FLASH_PG (1 << 1)
|
||||
#define FLASH_SER (1 << 2)
|
||||
#define FLASH_BER_CMD (1 << 3)
|
||||
#define FLASH_BER (1 << 3)
|
||||
#define FLASH_PSIZE_8 (0 << 4)
|
||||
#define FLASH_PSIZE_16 (1 << 4)
|
||||
#define FLASH_PSIZE_32 (2 << 4)
|
||||
|
@ -61,6 +61,7 @@
|
|||
|
||||
/* FLASH_SR register bits */
|
||||
#define FLASH_BSY (1 << 0) /* Operation in progress */
|
||||
#define FLASH_QW (1 << 2) /* Operation queue in progress */
|
||||
#define FLASH_WRPERR (1 << 17) /* Write protection error */
|
||||
#define FLASH_PGSERR (1 << 18) /* Programming sequence error */
|
||||
#define FLASH_STRBERR (1 << 19) /* Strobe error */
|
||||
|
@ -114,7 +115,6 @@ struct stm32h7x_part_info {
|
|||
const struct stm32h7x_rev *revs;
|
||||
size_t num_revs;
|
||||
unsigned int page_size;
|
||||
unsigned int pages_per_sector;
|
||||
uint16_t max_flash_size_kb;
|
||||
uint8_t has_dual_bank;
|
||||
uint16_t first_bank_size_kb; /* Used when has_dual_bank is true */
|
||||
|
@ -132,7 +132,7 @@ struct stm32h7x_flash_bank {
|
|||
};
|
||||
|
||||
static const struct stm32h7x_rev stm32_450_revs[] = {
|
||||
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" },
|
||||
{ 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x2001, "X" },
|
||||
};
|
||||
|
||||
static const struct stm32h7x_part_info stm32h7x_parts[] = {
|
||||
|
@ -140,7 +140,7 @@ static const struct stm32h7x_part_info stm32h7x_parts[] = {
|
|||
.id = 0x450,
|
||||
.revs = stm32_450_revs,
|
||||
.num_revs = ARRAY_SIZE(stm32_450_revs),
|
||||
.device_str = "STM32H7xx 2M",
|
||||
.device_str = "STM32H74x/75x",
|
||||
.page_size = 128, /* 128 KB */
|
||||
.max_flash_size_kb = 2048,
|
||||
.first_bank_size_kb = 1024,
|
||||
|
@ -184,33 +184,33 @@ static inline int stm32x_get_flash_status(struct flash_bank *bank, uint32_t *sta
|
|||
return target_read_u32(target, stm32x_get_flash_reg(bank, FLASH_SR), status);
|
||||
}
|
||||
|
||||
static int stm32x_wait_status_busy(struct flash_bank *bank, int timeout)
|
||||
static int stm32x_wait_flash_op_queue(struct flash_bank *bank, int timeout)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
struct stm32h7x_flash_bank *stm32x_info = bank->driver_priv;
|
||||
uint32_t status;
|
||||
int retval;
|
||||
|
||||
/* wait for busy to clear */
|
||||
/* wait for flash operations completion */
|
||||
for (;;) {
|
||||
retval = stm32x_get_flash_status(bank, &status);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_INFO("wait_status_busy, target_read_u32 : error : remote address 0x%x", stm32x_info->flash_base);
|
||||
LOG_INFO("wait_flash_op_queue, target_read_u32 : error : remote address 0x%x", stm32x_info->flash_base);
|
||||
return retval;
|
||||
}
|
||||
|
||||
if ((status & FLASH_BSY) == 0)
|
||||
if ((status & FLASH_QW) == 0)
|
||||
break;
|
||||
|
||||
if (timeout-- <= 0) {
|
||||
LOG_INFO("wait_status_busy, time out expired, status: 0x%" PRIx32 "", status);
|
||||
LOG_INFO("wait_flash_op_queue, time out expired, status: 0x%" PRIx32 "", status);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
alive_sleep(1);
|
||||
}
|
||||
|
||||
if (status & FLASH_WRPERR) {
|
||||
LOG_INFO("wait_status_busy, WRPERR : error : remote address 0x%x", stm32x_info->flash_base);
|
||||
LOG_INFO("wait_flash_op_queue, WRPERR : error : remote address 0x%x", stm32x_info->flash_base);
|
||||
retval = ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -313,7 +313,7 @@ static int stm32x_read_options(struct flash_bank *bank)
|
|||
stm32x_info = bank->driver_priv;
|
||||
|
||||
/* read current option bytes */
|
||||
int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCUR, &optiondata);
|
||||
int retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_CUR, &optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
|
@ -321,19 +321,19 @@ static int stm32x_read_options(struct flash_bank *bank)
|
|||
stm32x_info->option_bytes.user_options = optiondata & 0xfc;
|
||||
stm32x_info->option_bytes.RDP = (optiondata >> 8) & 0xff;
|
||||
stm32x_info->option_bytes.user2_options = (optiondata >> 16) & 0xff;
|
||||
stm32x_info->option_bytes.user3_options = (optiondata >> 24) & 0x83;
|
||||
stm32x_info->option_bytes.user3_options = (optiondata >> 24) & 0xa3;
|
||||
|
||||
if (stm32x_info->option_bytes.RDP != 0xAA)
|
||||
LOG_INFO("Device Security Bit Set");
|
||||
|
||||
/* read current WPSN option bytes */
|
||||
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNCUR, &optiondata);
|
||||
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_CUR, &optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
stm32x_info->option_bytes.protection = optiondata & 0xff;
|
||||
|
||||
/* read current WPSN2 option bytes */
|
||||
retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNCUR, &optiondata);
|
||||
retval = target_read_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_CUR, &optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
stm32x_info->option_bytes.protection2 = optiondata & 0xff;
|
||||
|
@ -357,30 +357,30 @@ static int stm32x_write_options(struct flash_bank *bank)
|
|||
optiondata = stm32x_info->option_bytes.user_options;
|
||||
optiondata |= (stm32x_info->option_bytes.RDP << 8);
|
||||
optiondata |= (stm32x_info->option_bytes.user2_options & 0xff) << 16;
|
||||
optiondata |= (stm32x_info->option_bytes.user3_options & 0x83) << 24;
|
||||
optiondata |= (stm32x_info->option_bytes.user3_options & 0xa3) << 24;
|
||||
|
||||
/* program options */
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTPRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTSR_PRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
optiondata = stm32x_info->option_bytes.protection & 0xff;
|
||||
/* Program protection WPSNPRG */
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSNPRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_WPSN_PRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
optiondata = stm32x_info->option_bytes.protection2 & 0xff;
|
||||
/* Program protection WPSNPRG2 */
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSNPRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B1 + FLASH_WPSN_PRG, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
optiondata = 0x40000000;
|
||||
/* Remove OPT error flag before programming */
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCCR, optiondata);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
/* start programming cycle */
|
||||
retval = target_write_u32(target, FLASH_REG_BASE_B0 + FLASH_OPTCR, OPT_START);
|
||||
|
@ -393,14 +393,14 @@ static int stm32x_write_options(struct flash_bank *bank)
|
|||
uint32_t status;
|
||||
retval = target_read_u32(target, FLASH_REG_BASE_B0 + FLASH_SR, &status);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_INFO("stm32x_write_options: wait_status_busy : error");
|
||||
LOG_INFO("stm32x_write_options: wait_flash_op_queue : error");
|
||||
return retval;
|
||||
}
|
||||
if ((status & FLASH_BSY) == 0)
|
||||
if ((status & FLASH_QW) == 0)
|
||||
break;
|
||||
|
||||
if (timeout-- <= 0) {
|
||||
LOG_INFO("wait_status_busy, time out expired, status: 0x%" PRIx32 "", status);
|
||||
LOG_INFO("wait_flash_op_queue, time out expired, status: 0x%" PRIx32 "", status);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
alive_sleep(1);
|
||||
|
@ -459,12 +459,12 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
|
|||
/*
|
||||
Sector Erase
|
||||
To erase a sector, follow the procedure below:
|
||||
1. Check that no Flash memory operation is ongoing by checking the BSY bit in the
|
||||
1. Check that no Flash memory operation is ongoing by checking the QW bit in the
|
||||
FLASH_SR register
|
||||
2. Set the SER bit and select the sector
|
||||
you wish to erase (SNB) in the FLASH_CR register
|
||||
3. Set the STRT bit in the FLASH_CR register
|
||||
4. Wait for the BSY bit to be cleared
|
||||
4. Wait for flash operations completion
|
||||
*/
|
||||
for (int i = first; i <= last; i++) {
|
||||
LOG_DEBUG("erase sector %d", i);
|
||||
|
@ -480,7 +480,7 @@ static int stm32x_erase(struct flash_bank *bank, int first, int last)
|
|||
LOG_ERROR("Error erase sector %d", i);
|
||||
return retval;
|
||||
}
|
||||
retval = stm32x_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
|
||||
retval = stm32x_wait_flash_op_queue(bank, FLASH_ERASE_TIMEOUT);
|
||||
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("erase time-out or operation error sector %d", i);
|
||||
|
@ -687,11 +687,11 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
|
|||
/*
|
||||
Standard programming
|
||||
The Flash memory programming sequence is as follows:
|
||||
1. Check that no main Flash memory operation is ongoing by checking the BSY bit in the
|
||||
1. Check that no main Flash memory operation is ongoing by checking the QW bit in the
|
||||
FLASH_SR register.
|
||||
2. Set the PG bit in the FLASH_CR register
|
||||
3. 8 x Word access (or Force Write FW)
|
||||
4. Wait for the BSY bit to be cleared
|
||||
4. Wait for flash operations completion
|
||||
*/
|
||||
while (blocks_remaining > 0) {
|
||||
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_PG | FLASH_PSIZE_64);
|
||||
|
@ -702,7 +702,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
|
|||
if (retval != ERROR_OK)
|
||||
goto flash_lock;
|
||||
|
||||
retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
|
||||
retval = stm32x_wait_flash_op_queue(bank, FLASH_WRITE_TIMEOUT);
|
||||
if (retval != ERROR_OK)
|
||||
goto flash_lock;
|
||||
|
||||
|
@ -725,7 +725,7 @@ static int stm32x_write(struct flash_bank *bank, const uint8_t *buffer,
|
|||
if (retval != ERROR_OK)
|
||||
goto flash_lock;
|
||||
|
||||
retval = stm32x_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
|
||||
retval = stm32x_wait_flash_op_queue(bank, FLASH_WRITE_TIMEOUT);
|
||||
if (retval != ERROR_OK)
|
||||
goto flash_lock;
|
||||
}
|
||||
|
@ -951,7 +951,7 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
}
|
||||
|
||||
if (stm32x_read_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to read options",
|
||||
command_print(CMD, "%s failed to read options",
|
||||
bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -959,11 +959,11 @@ COMMAND_HANDLER(stm32x_handle_lock_command)
|
|||
stm32x_info->option_bytes.RDP = 0;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to lock device",
|
||||
command_print(CMD, "%s failed to lock device",
|
||||
bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(CMD_CTX, "%s locked", bank->driver->name);
|
||||
command_print(CMD, "%s locked", bank->driver->name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -997,7 +997,7 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
|
|||
}
|
||||
|
||||
if (stm32x_read_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to read options", bank->driver->name);
|
||||
command_print(CMD, "%s failed to read options", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1006,10 +1006,10 @@ COMMAND_HANDLER(stm32x_handle_unlock_command)
|
|||
stm32x_info->option_bytes.RDP = 0xAA;
|
||||
|
||||
if (stm32x_write_options(bank) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
|
||||
command_print(CMD, "%s failed to unlock device", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
command_print(CMD_CTX, "%s unlocked.\n", bank->driver->name);
|
||||
command_print(CMD, "%s unlocked.\n", bank->driver->name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -1029,16 +1029,16 @@ static int stm32x_mass_erase(struct flash_bank *bank)
|
|||
return retval;
|
||||
|
||||
/* mass erase flash memory bank */
|
||||
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER_CMD | FLASH_PSIZE_64);
|
||||
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR), FLASH_BER | FLASH_PSIZE_64);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
retval = target_write_u32(target, stm32x_get_flash_reg(bank, FLASH_CR),
|
||||
FLASH_BER_CMD | FLASH_PSIZE_64 | FLASH_START);
|
||||
FLASH_BER | FLASH_PSIZE_64 | FLASH_START);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
retval = stm32x_wait_status_busy(bank, 30000);
|
||||
retval = stm32x_wait_flash_op_queue(bank, 30000);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
|
@ -1055,7 +1055,7 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
|
|||
int i;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "stm32h7x mass_erase <bank>");
|
||||
command_print(CMD, "stm32h7x mass_erase <bank>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -1070,9 +1070,9 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stm32h7x mass erase complete");
|
||||
command_print(CMD, "stm32h7x mass erase complete");
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32h7x mass erase failed");
|
||||
command_print(CMD, "stm32h7x mass erase failed");
|
||||
}
|
||||
|
||||
return retval;
|
||||
|
|
|
@ -835,7 +835,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
|
|||
uint32_t action;
|
||||
|
||||
if (CMD_ARGC < 1) {
|
||||
command_print(CMD_CTX, "stm32l4x mass_erase <STM32L4 bank>");
|
||||
command_print(CMD, "stm32l4x mass_erase <STM32L4 bank>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -851,9 +851,9 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stm32l4x mass erase complete");
|
||||
command_print(CMD, "stm32l4x mass erase complete");
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32l4x mass erase failed");
|
||||
command_print(CMD, "stm32l4x mass erase failed");
|
||||
}
|
||||
|
||||
return retval;
|
||||
|
@ -862,7 +862,7 @@ COMMAND_HANDLER(stm32l4_handle_mass_erase_command)
|
|||
COMMAND_HANDLER(stm32l4_handle_option_read_command)
|
||||
{
|
||||
if (CMD_ARGC < 2) {
|
||||
command_print(CMD_CTX, "stm32l4x option_read <STM32L4 bank> <option_reg offset>");
|
||||
command_print(CMD, "stm32l4x option_read <STM32L4 bank> <option_reg offset>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -880,7 +880,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
|
|||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
command_print(CMD_CTX, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
|
||||
command_print(CMD, "Option Register: <0x%" PRIx32 "> = 0x%" PRIx32 "", reg_addr, value);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -888,7 +888,7 @@ COMMAND_HANDLER(stm32l4_handle_option_read_command)
|
|||
COMMAND_HANDLER(stm32l4_handle_option_write_command)
|
||||
{
|
||||
if (CMD_ARGC < 3) {
|
||||
command_print(CMD_CTX, "stm32l4x option_write <STM32L4 bank> <option_reg offset> <value> [mask]");
|
||||
command_print(CMD, "stm32l4x option_write <STM32L4 bank> <option_reg offset> <value> [mask]");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -906,7 +906,7 @@ COMMAND_HANDLER(stm32l4_handle_option_write_command)
|
|||
if (CMD_ARGC > 3)
|
||||
mask = strtoul(CMD_ARGV[3], NULL, 16);
|
||||
|
||||
command_print(CMD_CTX, "%s Option written.\n"
|
||||
command_print(CMD, "%s Option written.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.", bank->driver->name);
|
||||
|
||||
|
@ -937,7 +937,7 @@ COMMAND_HANDLER(stm32l4_handle_option_load_command)
|
|||
/* Write the OBLLAUNCH bit in CR -> Cause device "POR" and option bytes reload */
|
||||
retval = target_write_u32(target, stm32l4_get_flash_reg(bank, STM32_FLASH_CR), FLASH_OBLLAUNCH);
|
||||
|
||||
command_print(CMD_CTX, "stm32l4x option load (POR) completed.");
|
||||
command_print(CMD, "stm32l4x option load (POR) completed.");
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -962,7 +962,7 @@ COMMAND_HANDLER(stm32l4_handle_lock_command)
|
|||
|
||||
/* set readout protection level 1 by erasing the RDP option byte */
|
||||
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, 0, 0x000000FF) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to lock device", bank->driver->name);
|
||||
command_print(CMD, "%s failed to lock device", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -989,7 +989,7 @@ COMMAND_HANDLER(stm32l4_handle_unlock_command)
|
|||
}
|
||||
|
||||
if (stm32l4_write_option(bank, STM32_FLASH_OPTR, RDP_LEVEL_0, 0x000000FF) != ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s failed to unlock device", bank->driver->name);
|
||||
command_print(CMD, "%s failed to unlock device", bank->driver->name);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
|
|
@ -324,9 +324,9 @@ COMMAND_HANDLER(stm32lx_handle_mass_erase_command)
|
|||
for (i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_erased = 1;
|
||||
|
||||
command_print(CMD_CTX, "stm32lx mass erase complete");
|
||||
command_print(CMD, "stm32lx mass erase complete");
|
||||
} else {
|
||||
command_print(CMD_CTX, "stm32lx mass erase failed");
|
||||
command_print(CMD, "stm32lx mass erase failed");
|
||||
}
|
||||
|
||||
return retval;
|
||||
|
@ -345,9 +345,9 @@ COMMAND_HANDLER(stm32lx_handle_lock_command)
|
|||
retval = stm32lx_lock(bank);
|
||||
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "STM32Lx locked, takes effect after power cycle.");
|
||||
command_print(CMD, "STM32Lx locked, takes effect after power cycle.");
|
||||
else
|
||||
command_print(CMD_CTX, "STM32Lx lock failed");
|
||||
command_print(CMD, "STM32Lx lock failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -365,9 +365,9 @@ COMMAND_HANDLER(stm32lx_handle_unlock_command)
|
|||
retval = stm32lx_unlock(bank);
|
||||
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "STM32Lx unlocked, takes effect after power cycle.");
|
||||
command_print(CMD, "STM32Lx unlocked, takes effect after power cycle.");
|
||||
else
|
||||
command_print(CMD_CTX, "STM32Lx unlock failed");
|
||||
command_print(CMD, "STM32Lx unlock failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
|
|
@ -746,7 +746,7 @@ COMMAND_HANDLER(str9xpec_handle_part_id_command)
|
|||
|
||||
idcode = buf_get_u32(buffer, 0, 32);
|
||||
|
||||
command_print(CMD_CTX, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
|
||||
command_print(CMD, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
|
||||
|
||||
free(buffer);
|
||||
|
||||
|
@ -780,33 +780,33 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_read_command)
|
|||
|
||||
/* boot bank */
|
||||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
|
||||
command_print(CMD_CTX, "CS Map: bank1");
|
||||
command_print(CMD, "CS Map: bank1");
|
||||
else
|
||||
command_print(CMD_CTX, "CS Map: bank0");
|
||||
command_print(CMD, "CS Map: bank0");
|
||||
|
||||
/* OTP lock */
|
||||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
|
||||
command_print(CMD_CTX, "OTP Lock: OTP Locked");
|
||||
command_print(CMD, "OTP Lock: OTP Locked");
|
||||
else
|
||||
command_print(CMD_CTX, "OTP Lock: OTP Unlocked");
|
||||
command_print(CMD, "OTP Lock: OTP Unlocked");
|
||||
|
||||
/* LVD Threshold */
|
||||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
|
||||
command_print(CMD_CTX, "LVD Threshold: 2.7v");
|
||||
command_print(CMD, "LVD Threshold: 2.7v");
|
||||
else
|
||||
command_print(CMD_CTX, "LVD Threshold: 2.4v");
|
||||
command_print(CMD, "LVD Threshold: 2.4v");
|
||||
|
||||
/* LVD reset warning */
|
||||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
|
||||
command_print(CMD_CTX, "LVD Reset Warning: VDD or VDDQ Inputs");
|
||||
command_print(CMD, "LVD Reset Warning: VDD or VDDQ Inputs");
|
||||
else
|
||||
command_print(CMD_CTX, "LVD Reset Warning: VDD Input Only");
|
||||
command_print(CMD, "LVD Reset Warning: VDD Input Only");
|
||||
|
||||
/* LVD reset select */
|
||||
if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
|
||||
command_print(CMD_CTX, "LVD Reset Selection: VDD or VDDQ Inputs");
|
||||
command_print(CMD, "LVD Reset Selection: VDD or VDDQ Inputs");
|
||||
else
|
||||
command_print(CMD_CTX, "LVD Reset Selection: VDD Input Only");
|
||||
command_print(CMD, "LVD Reset Selection: VDD Input Only");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -885,7 +885,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_options_write_command)
|
|||
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
|
||||
command_print(CMD_CTX, "str9xpec write options complete.\n"
|
||||
command_print(CMD, "str9xpec write options complete.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
|
||||
|
@ -1017,7 +1017,7 @@ COMMAND_HANDLER(str9xpec_handle_flash_unlock_command)
|
|||
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
|
||||
return ERROR_FLASH_OPERATION_FAILED;
|
||||
|
||||
command_print(CMD_CTX, "str9xpec unlocked.\n"
|
||||
command_print(CMD, "str9xpec unlocked.\n"
|
||||
"INFO: a reset or power cycle is required "
|
||||
"for the new settings to take effect.");
|
||||
|
||||
|
@ -1045,19 +1045,19 @@ COMMAND_HANDLER(str9xpec_handle_flash_enable_turbo_command)
|
|||
tap0 = str9xpec_info->tap;
|
||||
if (tap0 == NULL) {
|
||||
/* things are *WRONG* */
|
||||
command_print(CMD_CTX, "**STR9FLASH** (tap0) invalid chain?");
|
||||
command_print(CMD, "**STR9FLASH** (tap0) invalid chain?");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
tap1 = tap0->next_tap;
|
||||
if (tap1 == NULL) {
|
||||
/* things are *WRONG* */
|
||||
command_print(CMD_CTX, "**STR9FLASH** (tap1) invalid chain?");
|
||||
command_print(CMD, "**STR9FLASH** (tap1) invalid chain?");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
tap2 = tap1->next_tap;
|
||||
if (tap2 == NULL) {
|
||||
/* things are *WRONG* */
|
||||
command_print(CMD_CTX, "**STR9FLASH** (tap2) invalid chain?");
|
||||
command_print(CMD, "**STR9FLASH** (tap2) invalid chain?");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -1177,9 +1177,10 @@ static const struct command_registration str9xpec_config_command_handlers[] = {
|
|||
},
|
||||
{
|
||||
.name = "part_id",
|
||||
.usage = "<bank>",
|
||||
.handler = str9xpec_handle_part_id_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.help = "print part id of str9xpec flash bank <num>",
|
||||
.help = "print part id of str9xpec flash bank",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -0,0 +1,211 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io> *
|
||||
* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net> *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
|
||||
***************************************************************************/
|
||||
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include "imp.h"
|
||||
#include <target/image.h>
|
||||
|
||||
#define SWM050_DELAY 100
|
||||
|
||||
#define SWM050_FLASH_PAGE_SIZE 0x200
|
||||
#define SWM050_FLASH_PAGES 16
|
||||
|
||||
#define SWM050_CPU_ID 0xE000ED00
|
||||
#define SWM050_CPU_ID_VAL 0x410CC200
|
||||
|
||||
#define SWM050_FLASH_REG1 0x1F000000
|
||||
#define SWM050_FLASH_REG2 0x1F000038
|
||||
#define SWM050_FLASH_KEY 0xAAAAAAAA
|
||||
|
||||
#define SWM050_SYSCTL_CFG_0 0x400F0000
|
||||
#define SWM050_SYSCTL_DBLF 0x400F0008
|
||||
|
||||
static int swm050_erase(struct flash_bank *bank, int first, int last)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
int retval, curr_page;
|
||||
uint32_t curr_addr;
|
||||
|
||||
if (target->state != TARGET_HALTED) {
|
||||
LOG_ERROR("Target not halted");
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
}
|
||||
|
||||
/* Perform erase */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x4);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
for (curr_page = first; curr_page <= last; curr_page++) {
|
||||
curr_addr = bank->base + (SWM050_FLASH_PAGE_SIZE * curr_page);
|
||||
/* Perform write */
|
||||
retval = target_write_u32(target, curr_addr, SWM050_FLASH_KEY);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
alive_sleep(SWM050_DELAY);
|
||||
}
|
||||
|
||||
/* Close flash interface */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int swm050_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
int retval;
|
||||
|
||||
if (target->state != TARGET_HALTED) {
|
||||
LOG_ERROR("Target not halted");
|
||||
retval = ERROR_TARGET_NOT_HALTED;
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Perform write */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x1);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
retval = target_write_memory(target, bank->base + offset, 4, count/4, buffer);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
/* Close flash interface */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int swm050_probe(struct flash_bank *bank)
|
||||
{
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int swm050_mass_erase(struct flash_bank *bank)
|
||||
{
|
||||
struct target *target = bank->target;
|
||||
int retval;
|
||||
|
||||
if (target->state != TARGET_HALTED) {
|
||||
LOG_ERROR("Target not halted");
|
||||
return ERROR_TARGET_NOT_HALTED;
|
||||
}
|
||||
|
||||
/* Perform mass erase */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x6);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG2, 0x1);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
retval = target_write_u32(target, 0x0, SWM050_FLASH_KEY);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
alive_sleep(SWM050_DELAY);
|
||||
|
||||
/* Close flash interface */
|
||||
retval = target_write_u32(target, SWM050_FLASH_REG1, 0x0);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(swm050_handle_mass_erase_command)
|
||||
{
|
||||
if (CMD_ARGC < 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
struct flash_bank *bank;
|
||||
int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
retval = swm050_mass_erase(bank);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD, "swm050 mass erase complete");
|
||||
else
|
||||
command_print(CMD, "swm050 mass erase failed");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
FLASH_BANK_COMMAND_HANDLER(swm050_flash_bank_command)
|
||||
{
|
||||
if (bank->sectors) {
|
||||
free(bank->sectors);
|
||||
bank->sectors = NULL;
|
||||
}
|
||||
bank->write_start_alignment = 4;
|
||||
bank->write_end_alignment = 4;
|
||||
bank->size = SWM050_FLASH_PAGE_SIZE * SWM050_FLASH_PAGES;
|
||||
|
||||
bank->num_sectors = SWM050_FLASH_PAGES;
|
||||
bank->sectors = alloc_block_array(0, SWM050_FLASH_PAGE_SIZE, SWM050_FLASH_PAGES);
|
||||
if (!bank->sectors)
|
||||
return ERROR_FAIL;
|
||||
|
||||
for (int i = 0; i < bank->num_sectors; i++)
|
||||
bank->sectors[i].is_protected = 0;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static const struct command_registration swm050_exec_command_handlers[] = {
|
||||
{
|
||||
.name = "mass_erase",
|
||||
.handler = swm050_handle_mass_erase_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.usage = "bank_id",
|
||||
.help = "Erase entire flash device.",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
static const struct command_registration swm050_command_handlers[] = {
|
||||
{
|
||||
.name = "swm050",
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "swm050 flash command group",
|
||||
.usage = "",
|
||||
.chain = swm050_exec_command_handlers,
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
struct flash_driver swm050_flash = {
|
||||
.name = "swm050",
|
||||
.commands = swm050_command_handlers,
|
||||
.flash_bank_command = swm050_flash_bank_command,
|
||||
.erase = swm050_erase,
|
||||
.write = swm050_write,
|
||||
.read = default_flash_read,
|
||||
.probe = swm050_probe,
|
||||
.auto_probe = swm050_probe,
|
||||
.erase_check = default_flash_blank_check,
|
||||
.free_driver_priv = default_flash_free_driver_priv,
|
||||
};
|
|
@ -111,7 +111,7 @@ COMMAND_HANDLER(handle_flash_info_command)
|
|||
if (retval == ERROR_FLASH_OPER_UNSUPPORTED)
|
||||
LOG_WARNING("Flash protection check is not implemented.");
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"#%d : %s at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32
|
||||
", buswidth %i, chipwidth %i",
|
||||
p->bank_number,
|
||||
|
@ -140,7 +140,7 @@ COMMAND_HANDLER(handle_flash_info_command)
|
|||
else if (!show_sectors || !prot_block_available)
|
||||
protect_state = "protection state unknown";
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
|
||||
j,
|
||||
block_array[j].offset,
|
||||
|
@ -152,7 +152,7 @@ COMMAND_HANDLER(handle_flash_info_command)
|
|||
if (p->driver->info != NULL) {
|
||||
retval = p->driver->info(p, buf, sizeof(buf));
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "%s", buf);
|
||||
command_print(CMD, "%s", buf);
|
||||
else
|
||||
LOG_ERROR("error retrieving flash info");
|
||||
}
|
||||
|
@ -176,12 +176,12 @@ COMMAND_HANDLER(handle_flash_probe_command)
|
|||
if (p) {
|
||||
retval = p->driver->probe(p);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"flash '%s' found at " TARGET_ADDR_FMT,
|
||||
p->driver->name,
|
||||
p->base);
|
||||
} else {
|
||||
command_print(CMD_CTX, "flash bank '#%s' is out of bounds", CMD_ARGV[0]);
|
||||
command_print(CMD, "flash bank '#%s' is out of bounds", CMD_ARGV[0]);
|
||||
retval = ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -202,9 +202,9 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
|
|||
int j;
|
||||
retval = p->driver->erase_check(p);
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "successfully checked erase state");
|
||||
command_print(CMD, "successfully checked erase state");
|
||||
else {
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"unknown error when checking erase state of flash bank #%s at "
|
||||
TARGET_ADDR_FMT,
|
||||
CMD_ARGV[0],
|
||||
|
@ -222,7 +222,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
|
|||
erase_state = "erase state unknown";
|
||||
|
||||
blank = false;
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"\t#%3i: 0x%8.8" PRIx32 " (0x%" PRIx32 " %" PRIi32 "kB) %s",
|
||||
j,
|
||||
p->sectors[j].offset,
|
||||
|
@ -232,7 +232,7 @@ COMMAND_HANDLER(handle_flash_erase_check_command)
|
|||
}
|
||||
|
||||
if (blank)
|
||||
command_print(CMD_CTX, "\tBank is erased");
|
||||
command_print(CMD, "\tBank is erased");
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -267,7 +267,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
|
|||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], length);
|
||||
|
||||
if (length <= 0) {
|
||||
command_print(CMD_CTX, "Length must be >0");
|
||||
command_print(CMD, "Length must be >0");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
|
@ -289,7 +289,7 @@ COMMAND_HANDLER(handle_flash_erase_address_command)
|
|||
retval = flash_erase_address_range(target, do_pad, address, length);
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
|
||||
command_print(CMD_CTX, "erased address " TARGET_ADDR_FMT " (length %"
|
||||
command_print(CMD, "erased address " TARGET_ADDR_FMT " (length %"
|
||||
PRIi32 ")"
|
||||
" in %fs (%0.3f KiB/s)", address, length,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, length));
|
||||
|
@ -320,13 +320,13 @@ COMMAND_HANDLER(handle_flash_erase_command)
|
|||
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[2], last);
|
||||
|
||||
if (!(first <= last)) {
|
||||
command_print(CMD_CTX, "ERROR: "
|
||||
command_print(CMD, "ERROR: "
|
||||
"first sector must be <= last");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (!(last <= (uint32_t)(p->num_sectors - 1))) {
|
||||
command_print(CMD_CTX, "ERROR: "
|
||||
command_print(CMD, "ERROR: "
|
||||
"last sector must be <= %" PRIu32,
|
||||
p->num_sectors - 1);
|
||||
return ERROR_FAIL;
|
||||
|
@ -338,7 +338,7 @@ COMMAND_HANDLER(handle_flash_erase_command)
|
|||
retval = flash_driver_erase(p, first, last);
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
|
||||
command_print(CMD_CTX, "erased sectors %" PRIu32 " "
|
||||
command_print(CMD, "erased sectors %" PRIu32 " "
|
||||
"through %" PRIu32 " on flash bank %d "
|
||||
"in %fs", first, last, p->bank_number, duration_elapsed(&bench));
|
||||
}
|
||||
|
@ -377,14 +377,14 @@ COMMAND_HANDLER(handle_flash_protect_command)
|
|||
COMMAND_PARSE_ON_OFF(CMD_ARGV[3], set);
|
||||
|
||||
if (!(first <= last)) {
|
||||
command_print(CMD_CTX, "ERROR: "
|
||||
command_print(CMD, "ERROR: "
|
||||
"first %s must be <= last",
|
||||
(p->num_prot_blocks) ? "block" : "sector");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
if (!(last <= (uint32_t)(num_blocks - 1))) {
|
||||
command_print(CMD_CTX, "ERROR: "
|
||||
command_print(CMD, "ERROR: "
|
||||
"last %s must be <= %" PRIu32,
|
||||
(p->num_prot_blocks) ? "block" : "sector",
|
||||
num_blocks - 1);
|
||||
|
@ -393,7 +393,7 @@ COMMAND_HANDLER(handle_flash_protect_command)
|
|||
|
||||
retval = flash_driver_protect(p, set, first, last);
|
||||
if (retval == ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s protection for %s %" PRIu32
|
||||
command_print(CMD, "%s protection for %s %" PRIu32
|
||||
" through %" PRIu32 " on flash bank %d",
|
||||
(set) ? "set" : "cleared",
|
||||
(p->num_prot_blocks) ? "blocks" : "sectors",
|
||||
|
@ -421,12 +421,12 @@ COMMAND_HANDLER(handle_flash_write_image_command)
|
|||
auto_erase = 1;
|
||||
CMD_ARGV++;
|
||||
CMD_ARGC--;
|
||||
command_print(CMD_CTX, "auto erase enabled");
|
||||
command_print(CMD, "auto erase enabled");
|
||||
} else if (strcmp(CMD_ARGV[0], "unlock") == 0) {
|
||||
auto_unlock = true;
|
||||
CMD_ARGV++;
|
||||
CMD_ARGC--;
|
||||
command_print(CMD_CTX, "auto unlock enabled");
|
||||
command_print(CMD, "auto unlock enabled");
|
||||
} else
|
||||
break;
|
||||
}
|
||||
|
@ -463,7 +463,7 @@ COMMAND_HANDLER(handle_flash_write_image_command)
|
|||
}
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
|
||||
command_print(CMD_CTX, "wrote %" PRIu32 " bytes from file %s "
|
||||
command_print(CMD, "wrote %" PRIu32 " bytes from file %s "
|
||||
"in %fs (%0.3f KiB/s)", written, CMD_ARGV[0],
|
||||
duration_elapsed(&bench), duration_kbps(&bench, written));
|
||||
}
|
||||
|
@ -602,7 +602,7 @@ COMMAND_HANDLER(handle_flash_fill_command)
|
|||
}
|
||||
|
||||
if ((retval == ERROR_OK) && (duration_measure(&bench) == ERROR_OK)) {
|
||||
command_print(CMD_CTX, "wrote %" PRIu32 " bytes to " TARGET_ADDR_FMT
|
||||
command_print(CMD, "wrote %" PRIu32 " bytes to " TARGET_ADDR_FMT
|
||||
" in %fs (%0.3f KiB/s)", size_bytes, address,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, size_bytes));
|
||||
}
|
||||
|
@ -716,7 +716,7 @@ COMMAND_HANDLER(handle_flash_write_bank_command)
|
|||
free(buffer);
|
||||
|
||||
if ((ERROR_OK == retval) && (duration_measure(&bench) == ERROR_OK)) {
|
||||
command_print(CMD_CTX, "wrote %zu bytes from file %s to flash bank %u"
|
||||
command_print(CMD, "wrote %zu bytes from file %s to flash bank %u"
|
||||
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
|
||||
length, CMD_ARGV[1], bank->bank_number, offset,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, length));
|
||||
|
@ -798,7 +798,7 @@ COMMAND_HANDLER(handle_flash_read_bank_command)
|
|||
}
|
||||
|
||||
if (duration_measure(&bench) == ERROR_OK)
|
||||
command_print(CMD_CTX, "wrote %zd bytes to file %s from flash bank %u"
|
||||
command_print(CMD, "wrote %zd bytes to file %s from flash bank %u"
|
||||
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
|
||||
written, CMD_ARGV[1], p->bank_number, offset,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, written));
|
||||
|
@ -900,23 +900,23 @@ COMMAND_HANDLER(handle_flash_verify_bank_command)
|
|||
}
|
||||
|
||||
if (duration_measure(&bench) == ERROR_OK)
|
||||
command_print(CMD_CTX, "read %zd bytes from file %s and flash bank %u"
|
||||
command_print(CMD, "read %zd bytes from file %s and flash bank %u"
|
||||
" at offset 0x%8.8" PRIx32 " in %fs (%0.3f KiB/s)",
|
||||
length, CMD_ARGV[1], p->bank_number, offset,
|
||||
duration_elapsed(&bench), duration_kbps(&bench, length));
|
||||
|
||||
differ = memcmp(buffer_file, buffer_flash, length);
|
||||
command_print(CMD_CTX, "contents %s", differ ? "differ" : "match");
|
||||
command_print(CMD, "contents %s", differ ? "differ" : "match");
|
||||
if (differ) {
|
||||
uint32_t t;
|
||||
int diffs = 0;
|
||||
for (t = 0; t < length; t++) {
|
||||
if (buffer_flash[t] == buffer_file[t])
|
||||
continue;
|
||||
command_print(CMD_CTX, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
|
||||
command_print(CMD, "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
|
||||
diffs, t + offset, buffer_flash[t], buffer_file[t]);
|
||||
if (diffs++ >= 127) {
|
||||
command_print(CMD_CTX, "More than 128 errors, the rest are not printed.");
|
||||
command_print(CMD, "More than 128 errors, the rest are not printed.");
|
||||
break;
|
||||
}
|
||||
keep_alive();
|
||||
|
@ -952,7 +952,7 @@ COMMAND_HANDLER(handle_flash_padded_value_command)
|
|||
|
||||
COMMAND_PARSE_NUMBER(u8, CMD_ARGV[1], p->default_padded_value);
|
||||
|
||||
command_print(CMD_CTX, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \
|
||||
command_print(CMD, "Default padded value set to 0x%" PRIx8 " for flash bank %u", \
|
||||
p->default_padded_value, p->bank_number);
|
||||
|
||||
return retval;
|
||||
|
@ -985,7 +985,7 @@ static const struct command_registration flash_exec_command_handlers[] = {
|
|||
.name = "erase_sector",
|
||||
.handler = handle_flash_erase_command,
|
||||
.mode = COMMAND_EXEC,
|
||||
.usage = "bank_id first_sector_num last_sector_num",
|
||||
.usage = "bank_id first_sector_num (last_sector_num|'last')",
|
||||
.help = "Erase a range of sectors in a flash bank.",
|
||||
},
|
||||
{
|
||||
|
@ -1167,7 +1167,7 @@ COMMAND_HANDLER(handle_flash_banks_command)
|
|||
|
||||
unsigned n = 0;
|
||||
for (struct flash_bank *p = flash_bank_list(); p; p = p->next, n++) {
|
||||
LOG_USER("#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
|
||||
command_print(CMD, "#%d : %s (%s) at " TARGET_ADDR_FMT ", size 0x%8.8" PRIx32 ", "
|
||||
"buswidth %u, chipwidth %u", p->bank_number,
|
||||
p->name, p->driver->name, p->base, p->size,
|
||||
p->bus_width, p->chip_width);
|
||||
|
@ -1239,12 +1239,14 @@ static const struct command_registration flash_config_command_handlers[] = {
|
|||
.mode = COMMAND_CONFIG,
|
||||
.handler = handle_flash_init_command,
|
||||
.help = "Initialize flash devices.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "banks",
|
||||
.mode = COMMAND_ANY,
|
||||
.handler = handle_flash_banks_command,
|
||||
.help = "Display table with information about flash banks.",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "list",
|
||||
|
@ -1260,6 +1262,7 @@ static const struct command_registration flash_command_handlers[] = {
|
|||
.mode = COMMAND_ANY,
|
||||
.help = "NOR flash command group",
|
||||
.chain = flash_config_command_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -301,7 +301,7 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
|
|||
int start = (0 == strncmp(CMD_ARGV[i], "0x", 2)) ? 2 : 0;
|
||||
|
||||
if (1 != sscanf(&CMD_ARGV[i][start], "%" SCNx32 "", &flashKeys[i])) {
|
||||
command_print(CMD_CTX, "could not process flash key %s",
|
||||
command_print(CMD, "could not process flash key %s",
|
||||
CMD_ARGV[i]);
|
||||
LOG_ERROR("could not process flash key %s", CMD_ARGV[i]);
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
@ -310,19 +310,19 @@ COMMAND_HANDLER(tms470_handle_flash_keyset_command)
|
|||
|
||||
keysSet = 1;
|
||||
} else if (CMD_ARGC != 0) {
|
||||
command_print(CMD_CTX, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
|
||||
command_print(CMD, "tms470 flash_keyset <key0> <key1> <key2> <key3>");
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
if (keysSet) {
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "",
|
||||
flashKeys[0],
|
||||
flashKeys[1],
|
||||
flashKeys[2],
|
||||
flashKeys[3]);
|
||||
} else
|
||||
command_print(CMD_CTX, "flash keys not set");
|
||||
command_print(CMD, "flash keys not set");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -352,12 +352,12 @@ COMMAND_HANDLER(tms470_handle_osc_megahertz_command)
|
|||
|
||||
if (oscMHz <= 0) {
|
||||
LOG_ERROR("osc_megahertz must be positive and non-zero!");
|
||||
command_print(CMD_CTX, "osc_megahertz must be positive and non-zero!");
|
||||
command_print(CMD, "osc_megahertz must be positive and non-zero!");
|
||||
oscMHz = 12;
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "osc_megahertz=%d", oscMHz);
|
||||
command_print(CMD, "osc_megahertz=%d", oscMHz);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -375,7 +375,7 @@ COMMAND_HANDLER(tms470_handle_plldis_command)
|
|||
plldis = plldis ? 1 : 0;
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "plldis=%d", plldis);
|
||||
command_print(CMD, "plldis=%d", plldis);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
@ -1284,9 +1284,9 @@ COMMAND_HANDLER(xmc4xxx_handle_flash_password_command)
|
|||
|
||||
fb->pw_set = true;
|
||||
|
||||
command_print(CMD_CTX, "XMC4xxx flash passwords set to:\n");
|
||||
command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw1);
|
||||
command_print(CMD_CTX, "-0x%08"PRIx32"\n", fb->pw2);
|
||||
command_print(CMD, "XMC4xxx flash passwords set to:\n");
|
||||
command_print(CMD, "-0x%08"PRIx32"\n", fb->pw1);
|
||||
command_print(CMD, "-0x%08"PRIx32"\n", fb->pw2);
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1329,7 +1329,8 @@ static const struct command_registration xmc4xxx_exec_command_handlers[] = {
|
|||
.usage = "bank_id user_level[0-1]",
|
||||
.help = "Permanently Removes flash protection (read and write) "
|
||||
"for the specified user level",
|
||||
}, COMMAND_REGISTRATION_DONE
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
static const struct command_registration xmc4xxx_command_handlers[] = {
|
||||
|
|
|
@ -89,7 +89,7 @@ COMMAND_HANDLER(handle_hello_command)
|
|||
const char *sep, *name;
|
||||
int retval = CALL_COMMAND_HANDLER(handle_hello_args, &sep, &name);
|
||||
if (ERROR_OK == retval)
|
||||
command_print(CMD_CTX, "Greetings%s%s!", sep, name);
|
||||
command_print(CMD, "Greetings%s%s!", sep, name);
|
||||
return retval;
|
||||
}
|
||||
|
||||
|
@ -105,8 +105,8 @@ const struct command_registration hello_command_handlers[] = {
|
|||
.name = "foo",
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "example command handler skeleton",
|
||||
|
||||
.chain = foo_command_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
|
|
@ -16,6 +16,7 @@ noinst_LTLIBRARIES += %D%/libhelper.la
|
|||
%D%/jep106.c \
|
||||
%D%/jim-nvp.c \
|
||||
%D%/binarybuffer.h \
|
||||
%D%/bits.h \
|
||||
%D%/configuration.h \
|
||||
%D%/ioutil.h \
|
||||
%D%/list.h \
|
||||
|
|
|
@ -118,7 +118,7 @@ static inline uint32_t buf_get_u32(const uint8_t *_buffer,
|
|||
uint32_t result = 0;
|
||||
for (unsigned i = first; i < first + num; i++) {
|
||||
if (((buffer[i / 8] >> (i % 8)) & 1) == 1)
|
||||
result |= 1 << (i - first);
|
||||
result |= 1U << (i - first);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
|
|
@ -0,0 +1,84 @@
|
|||
/*
|
||||
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
|
||||
* Author(s): Antonio Borneo <borneo.antonio@gmail.com> for STMicroelectronics
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The content of this file is mainly copied/inspired from Linux kernel
|
||||
* code in include/linux/types.h include/linux/bitmap.h include/linux/bitops.h
|
||||
*/
|
||||
|
||||
#ifndef OPENOCD_HELPER_BITS_H
|
||||
#define OPENOCD_HELPER_BITS_H
|
||||
|
||||
#include <helper/types.h>
|
||||
|
||||
#define BIT(nr) (1UL << (nr))
|
||||
#define BITS_PER_BYTE 8
|
||||
#define BITS_PER_LONG (BITS_PER_BYTE * sizeof(long))
|
||||
#define BITS_TO_LONGS(nr) DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
|
||||
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
|
||||
#define BIT_WORD(nr) ((nr) / BITS_PER_LONG)
|
||||
#define DECLARE_BITMAP(name, bits) unsigned long name[BITS_TO_LONGS(bits)]
|
||||
|
||||
/**
|
||||
* bitmap_zero - Clears all the bits in memory
|
||||
* @dst: the address of the bitmap
|
||||
* @nbits: the number of bits to clear
|
||||
*/
|
||||
static inline void bitmap_zero(unsigned long *dst, unsigned int nbits)
|
||||
{
|
||||
unsigned int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
|
||||
memset(dst, 0, len);
|
||||
}
|
||||
|
||||
/**
|
||||
* clear_bit - Clear a bit in memory
|
||||
* @nr: the bit to set
|
||||
* @addr: the address to start counting from
|
||||
*/
|
||||
static inline void clear_bit(unsigned int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long mask = BIT_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
|
||||
|
||||
*p &= ~mask;
|
||||
}
|
||||
|
||||
/**
|
||||
* set_bit - Set a bit in memory
|
||||
* @nr: the bit to set
|
||||
* @addr: the address to start counting from
|
||||
*/
|
||||
static inline void set_bit(unsigned int nr, volatile unsigned long *addr)
|
||||
{
|
||||
unsigned long mask = BIT_MASK(nr);
|
||||
unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
|
||||
|
||||
*p |= mask;
|
||||
}
|
||||
|
||||
/**
|
||||
* test_bit - Determine whether a bit is set
|
||||
* @nr: bit number to test
|
||||
* @addr: Address to start counting from
|
||||
*/
|
||||
static inline int test_bit(unsigned int nr, const volatile unsigned long *addr)
|
||||
{
|
||||
return 1UL & (addr[BIT_WORD(nr)] >> (nr % BITS_PER_LONG));
|
||||
}
|
||||
|
||||
#endif /* OPENOCD_HELPER_BITS_H */
|
|
@ -190,7 +190,7 @@ struct command_context *current_command_context(Jim_Interp *interp)
|
|||
}
|
||||
|
||||
static int script_command_run(Jim_Interp *interp,
|
||||
int argc, Jim_Obj * const *argv, struct command *c, bool capture)
|
||||
int argc, Jim_Obj * const *argv, struct command *c)
|
||||
{
|
||||
target_call_timer_callbacks_now();
|
||||
LOG_USER_N("%s", ""); /* Keep GDB connection alive*/
|
||||
|
@ -200,15 +200,9 @@ static int script_command_run(Jim_Interp *interp,
|
|||
if (NULL == words)
|
||||
return JIM_ERR;
|
||||
|
||||
struct log_capture_state *state = NULL;
|
||||
if (capture)
|
||||
state = command_log_capture_start(interp);
|
||||
|
||||
struct command_context *cmd_ctx = current_command_context(interp);
|
||||
int retval = run_command(cmd_ctx, c, (const char **)words, nwords);
|
||||
|
||||
command_log_capture_finish(state);
|
||||
|
||||
script_command_args_free(words, nwords);
|
||||
return command_retval_set(interp, retval);
|
||||
}
|
||||
|
@ -220,7 +214,7 @@ static int script_command(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
struct command *c = interp->cmdPrivData;
|
||||
assert(c);
|
||||
script_debug(interp, c->name, argc, argv);
|
||||
return script_command_run(interp, argc, argv, c, true);
|
||||
return script_command_run(interp, argc, argv, c);
|
||||
}
|
||||
|
||||
static struct command *command_root(struct command *c)
|
||||
|
@ -316,7 +310,7 @@ static struct command *command_new(struct command_context *cmd_ctx,
|
|||
* arguments.
|
||||
*/
|
||||
if ((cr->jim_handler == NULL) && (cr->usage == NULL)) {
|
||||
LOG_DEBUG("BUG: command '%s%s%s' does not have the "
|
||||
LOG_ERROR("BUG: command '%s%s%s' does not have the "
|
||||
"'.usage' field filled out",
|
||||
parent && parent->name ? parent->name : "",
|
||||
parent && parent->name ? " " : "",
|
||||
|
@ -357,27 +351,11 @@ static int register_command_handler(struct command_context *cmd_ctx,
|
|||
struct command *c)
|
||||
{
|
||||
Jim_Interp *interp = cmd_ctx->interp;
|
||||
char *ocd_name = alloc_printf("ocd_%s", c->name);
|
||||
if (NULL == ocd_name)
|
||||
return JIM_ERR;
|
||||
|
||||
LOG_DEBUG("registering '%s'...", ocd_name);
|
||||
LOG_DEBUG("registering '%s'...", c->name);
|
||||
|
||||
Jim_CmdProc *func = c->handler ? &script_command : &command_unknown;
|
||||
int retval = Jim_CreateCommand(interp, ocd_name, func, c, NULL);
|
||||
free(ocd_name);
|
||||
if (JIM_OK != retval)
|
||||
return retval;
|
||||
|
||||
/* we now need to add an overrideable proc */
|
||||
char *override_name = alloc_printf(
|
||||
"proc %s {args} {eval ocd_bouncer %s $args}",
|
||||
c->name, c->name);
|
||||
if (NULL == override_name)
|
||||
return JIM_ERR;
|
||||
|
||||
retval = Jim_Eval_Named(interp, override_name, 0, 0);
|
||||
free(override_name);
|
||||
int retval = Jim_CreateCommand(interp, c->name, func, c, NULL);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -502,7 +480,7 @@ void command_output_text(struct command_context *context, const char *data)
|
|||
context->output_handler(context, data);
|
||||
}
|
||||
|
||||
void command_print_sameline(struct command_context *context, const char *format, ...)
|
||||
void command_print_sameline(struct command_invocation *cmd, const char *format, ...)
|
||||
{
|
||||
char *string;
|
||||
|
||||
|
@ -510,13 +488,13 @@ void command_print_sameline(struct command_context *context, const char *format,
|
|||
va_start(ap, format);
|
||||
|
||||
string = alloc_vprintf(format, ap);
|
||||
if (string != NULL) {
|
||||
if (string != NULL && cmd) {
|
||||
/* we want this collected in the log + we also want to pick it up as a tcl return
|
||||
* value.
|
||||
*
|
||||
* The latter bit isn't precisely neat, but will do for now.
|
||||
*/
|
||||
LOG_USER_N("%s", string);
|
||||
Jim_AppendString(cmd->ctx->interp, cmd->output, string, -1);
|
||||
/* We already printed it above
|
||||
* command_output_text(context, string); */
|
||||
free(string);
|
||||
|
@ -525,7 +503,7 @@ void command_print_sameline(struct command_context *context, const char *format,
|
|||
va_end(ap);
|
||||
}
|
||||
|
||||
void command_print(struct command_context *context, const char *format, ...)
|
||||
void command_print(struct command_invocation *cmd, const char *format, ...)
|
||||
{
|
||||
char *string;
|
||||
|
||||
|
@ -533,7 +511,7 @@ void command_print(struct command_context *context, const char *format, ...)
|
|||
va_start(ap, format);
|
||||
|
||||
string = alloc_vprintf(format, ap);
|
||||
if (string != NULL) {
|
||||
if (string != NULL && cmd) {
|
||||
strcat(string, "\n"); /* alloc_vprintf guaranteed the buffer to be at least one
|
||||
*char longer */
|
||||
/* we want this collected in the log + we also want to pick it up as a tcl return
|
||||
|
@ -541,7 +519,7 @@ void command_print(struct command_context *context, const char *format, ...)
|
|||
*
|
||||
* The latter bit isn't precisely neat, but will do for now.
|
||||
*/
|
||||
LOG_USER_N("%s", string);
|
||||
Jim_AppendString(cmd->ctx->interp, cmd->output, string, -1);
|
||||
/* We already printed it above
|
||||
* command_output_text(context, string); */
|
||||
free(string);
|
||||
|
@ -628,6 +606,9 @@ static int run_command(struct command_context *context,
|
|||
if (c->jim_handler_data)
|
||||
context->current_target_override = c->jim_handler_data;
|
||||
|
||||
cmd.output = Jim_NewEmptyStringObj(context->interp);
|
||||
Jim_IncrRefCount(cmd.output);
|
||||
|
||||
int retval = c->handler(&cmd);
|
||||
|
||||
if (c->jim_handler_data)
|
||||
|
@ -642,15 +623,17 @@ static int run_command(struct command_context *context,
|
|||
}
|
||||
} else if (retval == ERROR_COMMAND_CLOSE_CONNECTION) {
|
||||
/* just fall through for a shutdown request */
|
||||
} else if (retval != ERROR_OK) {
|
||||
/* we do not print out an error message because the command *should*
|
||||
* have printed out an error
|
||||
*/
|
||||
char *full_name = command_name(c, ' ');
|
||||
LOG_DEBUG("Command '%s' failed with error code %d",
|
||||
full_name ? full_name : c->name, retval);
|
||||
free(full_name);
|
||||
} else {
|
||||
if (retval != ERROR_OK) {
|
||||
char *full_name = command_name(c, ' ');
|
||||
LOG_DEBUG("Command '%s' failed with error code %d",
|
||||
full_name ? full_name : c->name, retval);
|
||||
free(full_name);
|
||||
}
|
||||
/* Use the command output as the Tcl result */
|
||||
Jim_SetResult(context->interp, cmd.output);
|
||||
}
|
||||
Jim_DecrRefCount(context->interp, cmd.output);
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -669,9 +652,11 @@ int command_run_line(struct command_context *context, char *line)
|
|||
* happen when the Jim Tcl interpreter is provided by eCos for
|
||||
* instance.
|
||||
*/
|
||||
struct target *saved_target_override = context->current_target_override;
|
||||
context->current_target_override = NULL;
|
||||
|
||||
Jim_Interp *interp = context->interp;
|
||||
struct command_context *old_context = Jim_GetAssocData(interp, "context");
|
||||
Jim_DeleteAssocData(interp, "context");
|
||||
retcode = Jim_SetAssocData(interp, "context", NULL, context);
|
||||
if (retcode == JIM_OK) {
|
||||
|
@ -684,25 +669,19 @@ int command_run_line(struct command_context *context, char *line)
|
|||
Jim_DeleteAssocData(interp, "retval");
|
||||
}
|
||||
Jim_DeleteAssocData(interp, "context");
|
||||
int inner_retcode = Jim_SetAssocData(interp, "context", NULL, old_context);
|
||||
if (retcode == JIM_OK)
|
||||
retcode = inner_retcode;
|
||||
}
|
||||
context->current_target_override = saved_target_override;
|
||||
if (retcode == JIM_OK) {
|
||||
const char *result;
|
||||
int reslen;
|
||||
|
||||
result = Jim_GetString(Jim_GetResult(interp), &reslen);
|
||||
if (reslen > 0) {
|
||||
int i;
|
||||
char buff[256 + 1];
|
||||
for (i = 0; i < reslen; i += 256) {
|
||||
int chunk;
|
||||
chunk = reslen - i;
|
||||
if (chunk > 256)
|
||||
chunk = 256;
|
||||
strncpy(buff, result + i, chunk);
|
||||
buff[chunk] = 0;
|
||||
LOG_USER_N("%s", buff);
|
||||
}
|
||||
LOG_USER_N("\n");
|
||||
command_output_text(context, result);
|
||||
command_output_text(context, "\n");
|
||||
}
|
||||
retval = ERROR_OK;
|
||||
} else if (retcode == JIM_EXIT) {
|
||||
|
@ -712,6 +691,7 @@ int command_run_line(struct command_context *context, char *line)
|
|||
return retcode;
|
||||
} else {
|
||||
Jim_MakeErrorMessage(interp);
|
||||
/* error is broadcast */
|
||||
LOG_USER("%s", Jim_GetString(Jim_GetResult(interp), NULL));
|
||||
|
||||
if (retval == ERROR_OK) {
|
||||
|
@ -827,8 +807,6 @@ static COMMAND_HELPER(command_help_find, struct command *head,
|
|||
if (0 == CMD_ARGC)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
*out = command_find(head, CMD_ARGV[0]);
|
||||
if (NULL == *out && strncmp(CMD_ARGV[0], "ocd_", 4) == 0)
|
||||
*out = command_find(head, CMD_ARGV[0] + 4);
|
||||
if (NULL == *out)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
if (--CMD_ARGC == 0)
|
||||
|
@ -982,34 +960,85 @@ COMMAND_HANDLER(handle_help_command)
|
|||
}
|
||||
|
||||
static int command_unknown_find(unsigned argc, Jim_Obj *const *argv,
|
||||
struct command *head, struct command **out, bool top_level)
|
||||
struct command *head, struct command **out)
|
||||
{
|
||||
if (0 == argc)
|
||||
return argc;
|
||||
const char *cmd_name = Jim_GetString(argv[0], NULL);
|
||||
struct command *c = command_find(head, cmd_name);
|
||||
if (NULL == c && top_level && strncmp(cmd_name, "ocd_", 4) == 0)
|
||||
c = command_find(head, cmd_name + 4);
|
||||
if (NULL == c)
|
||||
return argc;
|
||||
*out = c;
|
||||
return command_unknown_find(--argc, ++argv, (*out)->children, out, false);
|
||||
return command_unknown_find(--argc, ++argv, (*out)->children, out);
|
||||
}
|
||||
|
||||
static char *alloc_concatenate_strings(int argc, Jim_Obj * const *argv)
|
||||
{
|
||||
char *prev, *all;
|
||||
int i;
|
||||
|
||||
assert(argc >= 1);
|
||||
|
||||
all = strdup(Jim_GetString(argv[0], NULL));
|
||||
if (!all) {
|
||||
LOG_ERROR("Out of memory");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
for (i = 1; i < argc; ++i) {
|
||||
prev = all;
|
||||
all = alloc_printf("%s %s", all, Jim_GetString(argv[i], NULL));
|
||||
free(prev);
|
||||
if (!all) {
|
||||
LOG_ERROR("Out of memory");
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
return all;
|
||||
}
|
||||
|
||||
static int run_usage(Jim_Interp *interp, int argc_valid, int argc, Jim_Obj * const *argv)
|
||||
{
|
||||
struct command_context *cmd_ctx = current_command_context(interp);
|
||||
char *command;
|
||||
int retval;
|
||||
|
||||
assert(argc_valid >= 1);
|
||||
assert(argc >= argc_valid);
|
||||
|
||||
command = alloc_concatenate_strings(argc_valid, argv);
|
||||
if (!command)
|
||||
return JIM_ERR;
|
||||
|
||||
retval = command_run_linef(cmd_ctx, "usage %s", command);
|
||||
if (retval != ERROR_OK) {
|
||||
LOG_ERROR("unable to execute command \"usage %s\"", command);
|
||||
return JIM_ERR;
|
||||
}
|
||||
|
||||
if (argc_valid == argc)
|
||||
LOG_ERROR("%s: command requires more arguments", command);
|
||||
else {
|
||||
free(command);
|
||||
command = alloc_concatenate_strings(argc - argc_valid, argv + argc_valid);
|
||||
if (!command)
|
||||
return JIM_ERR;
|
||||
LOG_ERROR("invalid subcommand \"%s\"", command);
|
||||
}
|
||||
|
||||
free(command);
|
||||
return retval;
|
||||
}
|
||||
|
||||
static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
||||
{
|
||||
const char *cmd_name = Jim_GetString(argv[0], NULL);
|
||||
if (strcmp(cmd_name, "unknown") == 0) {
|
||||
if (argc == 1)
|
||||
return JIM_OK;
|
||||
argc--;
|
||||
argv++;
|
||||
}
|
||||
script_debug(interp, cmd_name, argc, argv);
|
||||
|
||||
struct command_context *cmd_ctx = current_command_context(interp);
|
||||
struct command *c = cmd_ctx->commands;
|
||||
int remaining = command_unknown_find(argc, argv, c, &c, true);
|
||||
int remaining = command_unknown_find(argc, argv, c, &c);
|
||||
/* if nothing could be consumed, then it's really an unknown command */
|
||||
if (remaining == argc) {
|
||||
const char *cmd = Jim_GetString(argv[0], NULL);
|
||||
|
@ -1017,7 +1046,6 @@ static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
return JIM_OK;
|
||||
}
|
||||
|
||||
bool found = true;
|
||||
Jim_Obj *const *start;
|
||||
unsigned count;
|
||||
if (c->handler || c->jim_handler) {
|
||||
|
@ -1025,14 +1053,10 @@ static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
count = remaining + 1;
|
||||
start = argv + (argc - remaining - 1);
|
||||
} else {
|
||||
c = command_find(cmd_ctx->commands, "usage");
|
||||
if (NULL == c) {
|
||||
LOG_ERROR("unknown command, but usage is missing too");
|
||||
return JIM_ERR;
|
||||
}
|
||||
count = argc - remaining;
|
||||
start = argv;
|
||||
found = false;
|
||||
run_usage(interp, count, argc, start);
|
||||
return JIM_ERR;
|
||||
}
|
||||
/* pass the command through to the intended handler */
|
||||
if (c->jim_handler) {
|
||||
|
@ -1043,7 +1067,7 @@ static int command_unknown(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
return (*c->jim_handler)(interp, count, start);
|
||||
}
|
||||
|
||||
return script_command_run(interp, count, start, c, found);
|
||||
return script_command_run(interp, count, start, c);
|
||||
}
|
||||
|
||||
static int jim_command_mode(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
||||
|
@ -1053,7 +1077,7 @@ static int jim_command_mode(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
|
||||
if (argc > 1) {
|
||||
struct command *c = cmd_ctx->commands;
|
||||
int remaining = command_unknown_find(argc - 1, argv + 1, c, &c, true);
|
||||
int remaining = command_unknown_find(argc - 1, argv + 1, c, &c);
|
||||
/* if nothing could be consumed, then it's an unknown command */
|
||||
if (remaining == argc - 1) {
|
||||
Jim_SetResultString(interp, "unknown", -1);
|
||||
|
@ -1082,32 +1106,6 @@ static int jim_command_mode(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
|||
return JIM_OK;
|
||||
}
|
||||
|
||||
static int jim_command_type(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
|
||||
{
|
||||
if (1 == argc)
|
||||
return JIM_ERR;
|
||||
|
||||
struct command_context *cmd_ctx = current_command_context(interp);
|
||||
struct command *c = cmd_ctx->commands;
|
||||
int remaining = command_unknown_find(argc - 1, argv + 1, c, &c, true);
|
||||
/* if nothing could be consumed, then it's an unknown command */
|
||||
if (remaining == argc - 1) {
|
||||
Jim_SetResultString(interp, "unknown", -1);
|
||||
return JIM_OK;
|
||||
}
|
||||
|
||||
if (c->jim_handler)
|
||||
Jim_SetResultString(interp, "native", -1);
|
||||
else if (c->handler)
|
||||
Jim_SetResultString(interp, "simple", -1);
|
||||
else if (remaining == 0)
|
||||
Jim_SetResultString(interp, "group", -1);
|
||||
else
|
||||
Jim_SetResultString(interp, "unknown", -1);
|
||||
|
||||
return JIM_OK;
|
||||
}
|
||||
|
||||
int help_add_command(struct command_context *cmd_ctx, struct command *parent,
|
||||
const char *cmd_name, const char *help_text, const char *usage)
|
||||
{
|
||||
|
@ -1119,7 +1117,7 @@ int help_add_command(struct command_context *cmd_ctx, struct command *parent,
|
|||
.name = cmd_name,
|
||||
.mode = COMMAND_ANY,
|
||||
.help = help_text,
|
||||
.usage = usage,
|
||||
.usage = usage ? : "",
|
||||
};
|
||||
nc = register_command(cmd_ctx, parent, &cr);
|
||||
if (NULL == nc) {
|
||||
|
@ -1144,8 +1142,9 @@ int help_add_command(struct command_context *cmd_ctx, struct command *parent,
|
|||
if (usage) {
|
||||
bool replaced = false;
|
||||
if (nc->usage) {
|
||||
if (*nc->usage)
|
||||
replaced = true;
|
||||
free(nc->usage);
|
||||
replaced = true;
|
||||
}
|
||||
nc->usage = strdup(usage);
|
||||
if (replaced)
|
||||
|
@ -1227,15 +1226,6 @@ static const struct command_registration command_subcommand_handlers[] = {
|
|||
"Returns 'unknown' if an unknown command is given. "
|
||||
"Command can be multiple tokens.",
|
||||
},
|
||||
{
|
||||
.name = "type",
|
||||
.mode = COMMAND_ANY,
|
||||
.jim_handler = jim_command_type,
|
||||
.usage = "command_name [...]",
|
||||
.help = "Returns the type of built-in command:"
|
||||
"'native', 'simple', 'group', or 'unknown'. "
|
||||
"Command can be multiple tokens.",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
||||
|
@ -1294,6 +1284,7 @@ static const struct command_registration command_builtin_handlers[] = {
|
|||
.mode = COMMAND_ANY,
|
||||
.help = "core command group (introspection)",
|
||||
.chain = command_subcommand_handlers,
|
||||
.usage = "",
|
||||
},
|
||||
COMMAND_REGISTRATION_DONE
|
||||
};
|
||||
|
@ -1403,6 +1394,7 @@ void process_jim_events(struct command_context *cmd_ctx)
|
|||
return ERROR_COMMAND_ARGUMENT_INVALID; \
|
||||
} \
|
||||
char *end; \
|
||||
errno = 0; \
|
||||
*ul = func(str, &end, 0); \
|
||||
if (*end) { \
|
||||
LOG_ERROR("Invalid command argument"); \
|
||||
|
|
|
@ -79,6 +79,7 @@ struct command_invocation {
|
|||
const char *name;
|
||||
unsigned argc;
|
||||
const char **argv;
|
||||
Jim_Obj *output;
|
||||
};
|
||||
|
||||
/**
|
||||
|
@ -121,6 +122,11 @@ struct command_invocation {
|
|||
*/
|
||||
#define COMMAND_HELPER(name, extra ...) __COMMAND_HANDLER(name, extra)
|
||||
|
||||
/**
|
||||
* Use this macro to access the command being handled,
|
||||
* rather than accessing the variable directly. It may be moved.
|
||||
*/
|
||||
#define CMD (cmd)
|
||||
/**
|
||||
* Use this macro to access the context of the command being handled,
|
||||
* rather than accessing the variable directly. It may be moved.
|
||||
|
@ -348,9 +354,9 @@ struct command_context *copy_command_context(struct command_context *cmd_ctx);
|
|||
*/
|
||||
void command_done(struct command_context *context);
|
||||
|
||||
void command_print(struct command_context *context, const char *format, ...)
|
||||
void command_print(struct command_invocation *cmd, const char *format, ...)
|
||||
__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
|
||||
void command_print_sameline(struct command_context *context, const char *format, ...)
|
||||
void command_print_sameline(struct command_invocation *cmd, const char *format, ...)
|
||||
__attribute__ ((format (PRINTF_ATTRIBUTE_FORMAT, 2, 3)));
|
||||
int command_run_line(struct command_context *context, char *line);
|
||||
int command_run_linef(struct command_context *context, const char *format, ...)
|
||||
|
@ -404,7 +410,7 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
|
|||
do { \
|
||||
int retval_macro_tmp = parse_ ## type(in, &(out)); \
|
||||
if (ERROR_OK != retval_macro_tmp) { \
|
||||
command_print(CMD_CTX, stringify(out) \
|
||||
command_print(CMD, stringify(out) \
|
||||
" option value ('%s') is not valid", in); \
|
||||
return retval_macro_tmp; \
|
||||
} \
|
||||
|
@ -424,9 +430,9 @@ DECLARE_PARSE_WRAPPER(_target_addr, target_addr_t);
|
|||
bool value; \
|
||||
int retval_macro_tmp = command_parse_bool_arg(in, &value); \
|
||||
if (ERROR_OK != retval_macro_tmp) { \
|
||||
command_print(CMD_CTX, stringify(out) \
|
||||
command_print(CMD, stringify(out) \
|
||||
" option value ('%s') is not valid", in); \
|
||||
command_print(CMD_CTX, " choices are '%s' or '%s'", \
|
||||
command_print(CMD, " choices are '%s' or '%s'", \
|
||||
on, off); \
|
||||
return retval_macro_tmp; \
|
||||
} \
|
||||
|
|
|
@ -113,10 +113,10 @@ COMMAND_HANDLER(handle_cat_command)
|
|||
|
||||
int retval = load_file(CMD_ARGV[0], &data, &len);
|
||||
if (retval == ERROR_OK) {
|
||||
command_print(CMD_CTX, "%s", data);
|
||||
command_print(CMD, "%s", data);
|
||||
free(data);
|
||||
} else
|
||||
command_print(CMD_CTX, "%s not found", CMD_ARGV[0]);
|
||||
command_print(CMD, "%s not found", CMD_ARGV[0]);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -146,10 +146,10 @@ COMMAND_HANDLER(handle_meminfo_command)
|
|||
info = mallinfo();
|
||||
|
||||
if (prev > 0)
|
||||
command_print(CMD_CTX, "Diff: %d", prev - info.fordblks);
|
||||
command_print(CMD, "Diff: %d", prev - info.fordblks);
|
||||
prev = info.fordblks;
|
||||
|
||||
command_print(CMD_CTX, "Available ram: %d", info.fordblks);
|
||||
command_print(CMD, "Available ram: %d", info.fordblks);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -217,7 +217,7 @@ COMMAND_HANDLER(handle_cp_command)
|
|||
if (retval != ERROR_OK)
|
||||
break;
|
||||
|
||||
command_print(CMD_CTX, "%zu", len - pos);
|
||||
command_print(CMD, "%zu", len - pos);
|
||||
|
||||
pos += chunk;
|
||||
|
||||
|
@ -226,9 +226,9 @@ COMMAND_HANDLER(handle_cp_command)
|
|||
}
|
||||
|
||||
if (retval == ERROR_OK)
|
||||
command_print(CMD_CTX, "Copied %s to %s", CMD_ARGV[0], CMD_ARGV[1]);
|
||||
command_print(CMD, "Copied %s to %s", CMD_ARGV[0], CMD_ARGV[1]);
|
||||
else
|
||||
command_print(CMD_CTX, "copy failed");
|
||||
command_print(CMD, "copy failed");
|
||||
|
||||
if (data != NULL)
|
||||
free(data);
|
||||
|
@ -472,6 +472,7 @@ static const struct command_registration ioutil_command_handlers[] = {
|
|||
.handler = handle_meminfo_command,
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "display free heap space",
|
||||
.usage = "",
|
||||
},
|
||||
#endif
|
||||
{
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -213,7 +213,7 @@ COMMAND_HANDLER(handle_debug_level_command)
|
|||
} else if (CMD_ARGC > 1)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
command_print(CMD_CTX, "debug_level: %i", debug_level);
|
||||
command_print(CMD, "debug_level: %i", debug_level);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -236,7 +236,7 @@ COMMAND_HANDLER(handle_log_output_command)
|
|||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static struct command_registration log_command_handlers[] = {
|
||||
static const struct command_registration log_command_handlers[] = {
|
||||
{
|
||||
.name = "log_output",
|
||||
.handler = handle_log_output_command,
|
||||
|
|
|
@ -151,6 +151,7 @@ extern int debug_level;
|
|||
#define ERROR_WAIT (-5)
|
||||
/* ERROR_TIMEOUT is already taken by winerror.h. */
|
||||
#define ERROR_TIMEOUT_REACHED (-6)
|
||||
#define ERROR_NOT_IMPLEMENTED (-7)
|
||||
|
||||
|
||||
#endif /* OPENOCD_HELPER_LOG_H */
|
||||
|
|
|
@ -34,9 +34,12 @@
|
|||
#if IS_DARWIN
|
||||
#include <libproc.h>
|
||||
#endif
|
||||
/* sys/sysctl.h is deprecated on Linux from glibc 2.30 */
|
||||
#ifndef __linux__
|
||||
#ifdef HAVE_SYS_SYSCTL_H
|
||||
#include <sys/sysctl.h>
|
||||
#endif
|
||||
#endif
|
||||
#if IS_WIN32 && !IS_CYGWIN
|
||||
#include <windows.h>
|
||||
#endif
|
||||
|
@ -269,19 +272,14 @@ int parse_cmdline_args(struct command_context *cmd_ctx, int argc, char *argv[])
|
|||
break;
|
||||
case 'd': /* --debug | -d */
|
||||
{
|
||||
char *command = alloc_printf("debug_level %s", optarg ? optarg : "3");
|
||||
int retval = command_run_line(cmd_ctx, command);
|
||||
free(command);
|
||||
int retval = command_run_linef(cmd_ctx, "debug_level %s", optarg ? optarg : "3");
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
break;
|
||||
}
|
||||
case 'l': /* --log_output | -l */
|
||||
if (optarg) {
|
||||
char *command = alloc_printf("log_output %s", optarg);
|
||||
command_run_line(cmd_ctx, command);
|
||||
free(command);
|
||||
}
|
||||
if (optarg)
|
||||
command_run_linef(cmd_ctx, "log_output %s", optarg);
|
||||
break;
|
||||
case 'c': /* --command | -c */
|
||||
if (optarg)
|
||||
|
|
|
@ -3,43 +3,6 @@
|
|||
# Embedded into OpenOCD executable
|
||||
#
|
||||
|
||||
|
||||
# We need to explicitly redirect this to the OpenOCD command
|
||||
# as Tcl defines the exit proc
|
||||
proc exit {} {
|
||||
ocd_throw exit
|
||||
}
|
||||
|
||||
# All commands are registered with an 'ocd_' prefix, while the "real"
|
||||
# command is a wrapper that calls this function. Its primary purpose is
|
||||
# to discard 'handler' command output.
|
||||
# Due to the two nested proc calls, this wrapper has to explicitly run
|
||||
# the wrapped command in the stack frame two levels above.
|
||||
proc ocd_bouncer {name args} {
|
||||
set cmd [format "ocd_%s" $name]
|
||||
set type [eval ocd_command type $cmd $args]
|
||||
set errcode error
|
||||
set skiplevel [expr [eval info level] > 1 ? 2 : 1]
|
||||
if {$type == "native"} {
|
||||
return [uplevel $skiplevel $cmd $args]
|
||||
} else {if {$type == "simple"} {
|
||||
set errcode [catch {uplevel $skiplevel $cmd $args}]
|
||||
if {$errcode == 0} {
|
||||
return ""
|
||||
} else {
|
||||
# 'classic' commands output error message as part of progress output
|
||||
set errmsg ""
|
||||
}
|
||||
} else {if {$type == "group"} {
|
||||
catch {eval ocd_usage $name $args}
|
||||
set errmsg [format "%s: command requires more arguments" \
|
||||
[concat $name " " $args]]
|
||||
} else {
|
||||
set errmsg [format "invalid subcommand \"%s\"" $args]
|
||||
}}}
|
||||
return -code $errcode $errmsg
|
||||
}
|
||||
|
||||
# Try flipping / and \ to find file if the filename does not
|
||||
# match the precise spelling
|
||||
proc find {filename} {
|
||||
|
|
|
@ -66,30 +66,6 @@ static int jim_adapter_name(Jim_Interp *interp, int argc, Jim_Obj * const *argv)
|
|||
return JIM_OK;
|
||||
}
|
||||
|
||||
static int default_khz(int khz, int *jtag_speed)
|
||||
{
|
||||
LOG_ERROR("Translation from khz to jtag_speed not implemented");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
static int default_speed_div(int speed, int *khz)
|
||||
{
|
||||
LOG_ERROR("Translation from jtag_speed to khz not implemented");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
static int default_power_dropout(int *dropout)
|
||||
{
|
||||
*dropout = 0; /* by default we can't detect power dropout */
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
static int default_srst_asserted(int *srst_asserted)
|
||||
{
|
||||
*srst_asserted = 0; /* by default we can't detect srst asserted */
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
COMMAND_HANDLER(interface_transport_command)
|
||||
{
|
||||
char **transports;
|
||||
|
@ -114,10 +90,10 @@ COMMAND_HANDLER(handle_interface_list_command)
|
|||
if (strcmp(CMD_NAME, "interface_list") == 0 && CMD_ARGC > 0)
|
||||
return ERROR_COMMAND_SYNTAX_ERROR;
|
||||
|
||||
command_print(CMD_CTX, "The following debug interfaces are available:");
|
||||
command_print(CMD, "The following debug interfaces are available:");
|
||||
for (unsigned i = 0; NULL != jtag_interfaces[i]; i++) {
|
||||
const char *name = jtag_interfaces[i]->name;
|
||||
command_print(CMD_CTX, "%u: %s", i + 1, name);
|
||||
command_print(CMD, "%u: %s", i + 1, name);
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
|
@ -150,29 +126,7 @@ COMMAND_HANDLER(handle_interface_command)
|
|||
|
||||
jtag_interface = jtag_interfaces[i];
|
||||
|
||||
/* LEGACY SUPPORT ... adapter drivers must declare what
|
||||
* transports they allow. Until they all do so, assume
|
||||
* the legacy drivers are JTAG-only
|
||||
*/
|
||||
if (!jtag_interface->transports)
|
||||
LOG_WARNING("Adapter driver '%s' did not declare "
|
||||
"which transports it allows; assuming "
|
||||
"legacy JTAG-only", jtag_interface->name);
|
||||
retval = allow_transports(CMD_CTX, jtag_interface->transports
|
||||
? jtag_interface->transports : jtag_only);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
|
||||
if (jtag_interface->khz == NULL)
|
||||
jtag_interface->khz = default_khz;
|
||||
if (jtag_interface->speed_div == NULL)
|
||||
jtag_interface->speed_div = default_speed_div;
|
||||
if (jtag_interface->power_dropout == NULL)
|
||||
jtag_interface->power_dropout = default_power_dropout;
|
||||
if (jtag_interface->srst_asserted == NULL)
|
||||
jtag_interface->srst_asserted = default_srst_asserted;
|
||||
|
||||
return ERROR_OK;
|
||||
return allow_transports(CMD_CTX, jtag_interface->transports);
|
||||
}
|
||||
|
||||
/* no valid interface was found (i.e. the configuration option,
|
||||
|
@ -394,7 +348,7 @@ next:
|
|||
modes[5] = "";
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "%s %s%s%s%s%s",
|
||||
command_print(CMD, "%s %s%s%s%s%s",
|
||||
modes[0], modes[1],
|
||||
modes[2], modes[3], modes[4], modes[5]);
|
||||
|
||||
|
@ -411,7 +365,7 @@ COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
|
|||
|
||||
jtag_set_nsrst_delay(delay);
|
||||
}
|
||||
command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
|
||||
command_print(CMD, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -425,7 +379,7 @@ COMMAND_HANDLER(handle_adapter_nsrst_assert_width_command)
|
|||
|
||||
jtag_set_nsrst_assert_width(width);
|
||||
}
|
||||
command_print(CMD_CTX, "adapter_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
|
||||
command_print(CMD, "adapter_nsrst_assert_width: %u", jtag_get_nsrst_assert_width());
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -450,9 +404,9 @@ COMMAND_HANDLER(handle_adapter_khz_command)
|
|||
return retval;
|
||||
|
||||
if (cur_speed)
|
||||
command_print(CMD_CTX, "adapter speed: %d kHz", cur_speed);
|
||||
command_print(CMD, "adapter speed: %d kHz", cur_speed);
|
||||
else
|
||||
command_print(CMD_CTX, "adapter speed: RCLK - adaptive");
|
||||
command_print(CMD, "adapter speed: RCLK - adaptive");
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
@ -464,7 +418,7 @@ COMMAND_HANDLER(handle_usb_location_command)
|
|||
if (CMD_ARGC == 1)
|
||||
jtag_usb_set_location(CMD_ARGV[0]);
|
||||
|
||||
command_print(CMD_CTX, "adapter usb location: %s", jtag_usb_get_location());
|
||||
command_print(CMD, "adapter usb location: %s", jtag_usb_get_location());
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -476,8 +430,8 @@ static const struct command_registration adapter_usb_command_handlers[] = {
|
|||
.name = "location",
|
||||
.handler = &handle_usb_location_command,
|
||||
.mode = COMMAND_CONFIG,
|
||||
.help = "set the USB bus location of the USB device",
|
||||
.usage = "<bus>-port[.port]...",
|
||||
.help = "display or set the USB bus location of the USB device",
|
||||
.usage = "[<bus>-port[.port]...]",
|
||||
},
|
||||
#endif /* HAVE_LIBUSB_GET_PORT_NUMBERS */
|
||||
COMMAND_REGISTRATION_DONE
|
||||
|
@ -555,6 +509,7 @@ static const struct command_registration interface_command_handlers[] = {
|
|||
.handler = handle_interface_list_command,
|
||||
.mode = COMMAND_ANY,
|
||||
.help = "List all built-in debug adapter interfaces (drivers)",
|
||||
.usage = "",
|
||||
},
|
||||
{
|
||||
.name = "reset_config",
|
||||
|
|
|
@ -150,7 +150,7 @@ static int aice_execute_reset(struct jtag_command *cmd)
|
|||
static int last_trst;
|
||||
int retval = ERROR_OK;
|
||||
|
||||
DEBUG_JTAG_IO("reset trst: %d", cmd->cmd.reset->trst);
|
||||
LOG_DEBUG_IO("reset trst: %d", cmd->cmd.reset->trst);
|
||||
|
||||
if (cmd->cmd.reset->trst != last_trst) {
|
||||
if (cmd->cmd.reset->trst)
|
||||
|
@ -269,10 +269,10 @@ COMMAND_HANDLER(aice_handle_aice_info_command)
|
|||
{
|
||||
LOG_DEBUG("aice_handle_aice_info_command");
|
||||
|
||||
command_print(CMD_CTX, "Description: %s", param.device_desc);
|
||||
command_print(CMD_CTX, "Serial number: %s", param.serial);
|
||||
command_print(CMD, "Description: %s", param.device_desc);
|
||||
command_print(CMD, "Serial number: %s", param.serial);
|
||||
if (strncmp(aice_port->name, "aice_pipe", 9) == 0)
|
||||
command_print(CMD_CTX, "Adapter: %s", param.adapter_name);
|
||||
command_print(CMD, "Adapter: %s", param.adapter_name);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
|
@ -165,9 +165,9 @@ COMMAND_HANDLER(handle_scan_chain_command)
|
|||
|
||||
aice_scan_jtag_chain();
|
||||
tap = jtag_all_taps();
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
" TapName Enabled IdCode Expected IrLen IrCap IrMask");
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"-- ------------------- -------- ---------- ---------- ----- ----- ------");
|
||||
|
||||
while (tap) {
|
||||
|
@ -183,7 +183,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
|
|||
expected = buf_get_u32(tap->expected, 0, tap->ir_length);
|
||||
expected_mask = buf_get_u32(tap->expected_mask, 0, tap->ir_length);
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"%2d %-18s %c 0x%08x %s %5d 0x%02x 0x%02x",
|
||||
tap->abs_chain_position,
|
||||
tap->dotted_name,
|
||||
|
@ -200,7 +200,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
|
|||
if (tap->ignore_version)
|
||||
expected_id[2] = '*';
|
||||
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
" %s",
|
||||
expected_id);
|
||||
}
|
||||
|
|
|
@ -400,7 +400,7 @@ static int aice_usb_write(uint8_t *out_buffer, int out_length)
|
|||
result = usb_bulk_write_ex(aice_handler.usb_handle, aice_handler.usb_write_ep,
|
||||
(char *)out_buffer, out_length, AICE_USB_TIMEOUT);
|
||||
|
||||
DEBUG_JTAG_IO("aice_usb_write, out_length = %i, result = %i",
|
||||
LOG_DEBUG_IO("aice_usb_write, out_length = %i, result = %i",
|
||||
out_length, result);
|
||||
|
||||
return result;
|
||||
|
@ -412,7 +412,7 @@ static int aice_usb_read(uint8_t *in_buffer, int expected_size)
|
|||
int32_t result = usb_bulk_read_ex(aice_handler.usb_handle, aice_handler.usb_read_ep,
|
||||
(char *)in_buffer, expected_size, AICE_USB_TIMEOUT);
|
||||
|
||||
DEBUG_JTAG_IO("aice_usb_read, result = %" PRId32, result);
|
||||
LOG_DEBUG_IO("aice_usb_read, result = %" PRId32, result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
@ -2812,7 +2812,7 @@ static int aice_issue_reset_hold(uint32_t coreid)
|
|||
/* set no_dbgi_pin to 0 */
|
||||
uint32_t pin_status;
|
||||
aice_read_ctrl(AICE_READ_CTRL_GET_JTAG_PIN_STATUS, &pin_status);
|
||||
if (pin_status | 0x4)
|
||||
if (pin_status & 0x4)
|
||||
aice_write_ctrl(AICE_WRITE_CTRL_JTAG_PIN_STATUS, pin_status & (~0x4));
|
||||
|
||||
/* issue restart */
|
||||
|
|
|
@ -193,33 +193,33 @@ int jtag_build_buffer(const struct scan_command *cmd, uint8_t **buffer)
|
|||
|
||||
bit_count = 0;
|
||||
|
||||
DEBUG_JTAG_IO("%s num_fields: %i",
|
||||
LOG_DEBUG_IO("%s num_fields: %i",
|
||||
cmd->ir_scan ? "IRSCAN" : "DRSCAN",
|
||||
cmd->num_fields);
|
||||
|
||||
for (i = 0; i < cmd->num_fields; i++) {
|
||||
if (cmd->fields[i].out_value) {
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
char *char_buf = buf_to_str(cmd->fields[i].out_value,
|
||||
(cmd->fields[i].num_bits > DEBUG_JTAG_IOZ)
|
||||
? DEBUG_JTAG_IOZ
|
||||
: cmd->fields[i].num_bits, 16);
|
||||
if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) {
|
||||
char *char_buf = buf_to_str(cmd->fields[i].out_value,
|
||||
(cmd->fields[i].num_bits > DEBUG_JTAG_IOZ)
|
||||
? DEBUG_JTAG_IOZ
|
||||
: cmd->fields[i].num_bits, 16);
|
||||
|
||||
LOG_DEBUG("fields[%i].out_value[%i]: 0x%s", i,
|
||||
cmd->fields[i].num_bits, char_buf);
|
||||
free(char_buf);
|
||||
#endif
|
||||
LOG_DEBUG("fields[%i].out_value[%i]: 0x%s", i,
|
||||
cmd->fields[i].num_bits, char_buf);
|
||||
free(char_buf);
|
||||
}
|
||||
buf_set_buf(cmd->fields[i].out_value, 0, *buffer,
|
||||
bit_count, cmd->fields[i].num_bits);
|
||||
} else {
|
||||
DEBUG_JTAG_IO("fields[%i].out_value[%i]: NULL",
|
||||
LOG_DEBUG_IO("fields[%i].out_value[%i]: NULL",
|
||||
i, cmd->fields[i].num_bits);
|
||||
}
|
||||
|
||||
bit_count += cmd->fields[i].num_bits;
|
||||
}
|
||||
|
||||
/*DEBUG_JTAG_IO("bit_count totalling: %i", bit_count); */
|
||||
/*LOG_DEBUG_IO("bit_count totalling: %i", bit_count); */
|
||||
|
||||
return bit_count;
|
||||
}
|
||||
|
@ -242,16 +242,16 @@ int jtag_read_buffer(uint8_t *buffer, const struct scan_command *cmd)
|
|||
uint8_t *captured = buf_set_buf(buffer, bit_count,
|
||||
malloc(DIV_ROUND_UP(num_bits, 8)), 0, num_bits);
|
||||
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
char *char_buf = buf_to_str(captured,
|
||||
(num_bits > DEBUG_JTAG_IOZ)
|
||||
if (LOG_LEVEL_IS(LOG_LVL_DEBUG_IO)) {
|
||||
char *char_buf = buf_to_str(captured,
|
||||
(num_bits > DEBUG_JTAG_IOZ)
|
||||
? DEBUG_JTAG_IOZ
|
||||
: num_bits, 16);
|
||||
: num_bits, 16);
|
||||
|
||||
LOG_DEBUG("fields[%i].in_value[%i]: 0x%s",
|
||||
i, num_bits, char_buf);
|
||||
free(char_buf);
|
||||
#endif
|
||||
LOG_DEBUG("fields[%i].in_value[%i]: 0x%s",
|
||||
i, num_bits, char_buf);
|
||||
free(char_buf);
|
||||
}
|
||||
|
||||
if (cmd->fields[i].in_value)
|
||||
buf_cpy(captured, cmd->fields[i].in_value, num_bits);
|
||||
|
|
|
@ -1007,7 +1007,7 @@ static bool jtag_examine_chain_match_tap(const struct jtag_tap *tap)
|
|||
return true;
|
||||
|
||||
/* optionally ignore the JTAG version field - bits 28-31 of IDCODE */
|
||||
uint32_t mask = tap->ignore_version ? ~(0xf << 28) : ~0;
|
||||
uint32_t mask = tap->ignore_version ? ~(0xfU << 28) : ~0U;
|
||||
uint32_t idcode = tap->idcode & mask;
|
||||
|
||||
/* Loop over the expected identification codes and test for a match */
|
||||
|
@ -1107,7 +1107,7 @@ static int jtag_examine_chain(void)
|
|||
|
||||
if ((idcode & 1) == 0) {
|
||||
/* Zero for LSB indicates a device in bypass */
|
||||
LOG_INFO("TAP %s does not have IDCODE", tap->dotted_name);
|
||||
LOG_INFO("TAP %s has invalid IDCODE (0x%x)", tap->dotted_name, idcode);
|
||||
tap->hasidcode = false;
|
||||
tap->idcode = 0;
|
||||
|
||||
|
@ -1348,19 +1348,6 @@ int adapter_init(struct command_context *cmd_ctx)
|
|||
return retval;
|
||||
jtag = jtag_interface;
|
||||
|
||||
/* LEGACY SUPPORT ... adapter drivers must declare what
|
||||
* transports they allow. Until they all do so, assume
|
||||
* the legacy drivers are JTAG-only
|
||||
*/
|
||||
if (!transports_are_declared()) {
|
||||
LOG_ERROR("Adapter driver '%s' did not declare "
|
||||
"which transports it allows; assuming "
|
||||
"JTAG-only", jtag->name);
|
||||
retval = allow_transports(cmd_ctx, jtag_only);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
}
|
||||
|
||||
if (jtag->speed == NULL) {
|
||||
LOG_INFO("This adapter doesn't support configurable speed");
|
||||
return ERROR_OK;
|
||||
|
@ -1611,14 +1598,18 @@ static int adapter_khz_to_speed(unsigned khz, int *speed)
|
|||
{
|
||||
LOG_DEBUG("convert khz to interface specific speed value");
|
||||
speed_khz = khz;
|
||||
if (jtag != NULL) {
|
||||
LOG_DEBUG("have interface set up");
|
||||
int speed_div1;
|
||||
int retval = jtag->khz(jtag_get_speed_khz(), &speed_div1);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
*speed = speed_div1;
|
||||
if (!jtag)
|
||||
return ERROR_OK;
|
||||
LOG_DEBUG("have interface set up");
|
||||
if (!jtag->khz) {
|
||||
LOG_ERROR("Translation from khz to jtag_speed not implemented");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
int speed_div1;
|
||||
int retval = jtag->khz(jtag_get_speed_khz(), &speed_div1);
|
||||
if (ERROR_OK != retval)
|
||||
return retval;
|
||||
*speed = speed_div1;
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
@ -1681,7 +1672,13 @@ int jtag_get_speed_readable(int *khz)
|
|||
int retval = jtag_get_speed(&jtag_speed_var);
|
||||
if (retval != ERROR_OK)
|
||||
return retval;
|
||||
return jtag ? jtag->speed_div(jtag_speed_var, khz) : ERROR_OK;
|
||||
if (!jtag)
|
||||
return ERROR_OK;
|
||||
if (!jtag->speed_div) {
|
||||
LOG_ERROR("Translation from jtag_speed to khz not implemented");
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
return jtag->speed_div(jtag_speed_var, khz);
|
||||
}
|
||||
|
||||
void jtag_set_verify(bool enable)
|
||||
|
@ -1712,12 +1709,20 @@ int jtag_power_dropout(int *dropout)
|
|||
LOG_ERROR("No Valid JTAG Interface Configured.");
|
||||
exit(-1);
|
||||
}
|
||||
return jtag->power_dropout(dropout);
|
||||
if (jtag->power_dropout)
|
||||
return jtag->power_dropout(dropout);
|
||||
|
||||
*dropout = 0; /* by default we can't detect power dropout */
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int jtag_srst_asserted(int *srst_asserted)
|
||||
{
|
||||
return jtag->srst_asserted(srst_asserted);
|
||||
if (jtag->srst_asserted)
|
||||
return jtag->srst_asserted(srst_asserted);
|
||||
|
||||
*srst_asserted = 0; /* by default we can't detect srst asserted */
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
enum reset_types jtag_get_reset_config(void)
|
||||
|
|
|
@ -343,35 +343,27 @@ static int amt_jtagaccel_execute_queue(void)
|
|||
while (cmd) {
|
||||
switch (cmd->type) {
|
||||
case JTAG_RESET:
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
LOG_DEBUG("reset trst: %i srst %i",
|
||||
cmd->cmd.reset->trst,
|
||||
cmd->cmd.reset->srst);
|
||||
#endif
|
||||
LOG_DEBUG_IO("reset trst: %i srst %i",
|
||||
cmd->cmd.reset->trst,
|
||||
cmd->cmd.reset->srst);
|
||||
if (cmd->cmd.reset->trst == 1)
|
||||
tap_set_state(TAP_RESET);
|
||||
amt_jtagaccel_reset(cmd->cmd.reset->trst, cmd->cmd.reset->srst);
|
||||
break;
|
||||
case JTAG_RUNTEST:
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
LOG_DEBUG("runtest %i cycles, end in %i",
|
||||
cmd->cmd.runtest->num_cycles,
|
||||
cmd->cmd.runtest->end_state);
|
||||
#endif
|
||||
LOG_DEBUG_IO("runtest %i cycles, end in %i",
|
||||
cmd->cmd.runtest->num_cycles,
|
||||
cmd->cmd.runtest->end_state);
|
||||
amt_jtagaccel_end_state(cmd->cmd.runtest->end_state);
|
||||
amt_jtagaccel_runtest(cmd->cmd.runtest->num_cycles);
|
||||
break;
|
||||
case JTAG_TLR_RESET:
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
LOG_DEBUG("statemove end in %i", cmd->cmd.statemove->end_state);
|
||||
#endif
|
||||
LOG_DEBUG_IO("statemove end in %i", cmd->cmd.statemove->end_state);
|
||||
amt_jtagaccel_end_state(cmd->cmd.statemove->end_state);
|
||||
amt_jtagaccel_state_move();
|
||||
break;
|
||||
case JTAG_SCAN:
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
LOG_DEBUG("scan end in %i", cmd->cmd.scan->end_state);
|
||||
#endif
|
||||
LOG_DEBUG_IO("scan end in %i", cmd->cmd.scan->end_state);
|
||||
amt_jtagaccel_end_state(cmd->cmd.scan->end_state);
|
||||
scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
|
||||
type = jtag_scan_type(cmd->cmd.scan);
|
||||
|
@ -382,9 +374,7 @@ static int amt_jtagaccel_execute_queue(void)
|
|||
free(buffer);
|
||||
break;
|
||||
case JTAG_SLEEP:
|
||||
#ifdef _DEBUG_JTAG_IO_
|
||||
LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
|
||||
#endif
|
||||
LOG_DEBUG_IO("sleep %" PRIi32, cmd->cmd.sleep->us);
|
||||
jtag_sleep(cmd->cmd.sleep->us);
|
||||
break;
|
||||
default:
|
||||
|
@ -548,7 +538,7 @@ COMMAND_HANDLER(amt_jtagaccel_handle_parport_port_command)
|
|||
}
|
||||
}
|
||||
|
||||
command_print(CMD_CTX, "parport port = %u", amt_jtagaccel_port);
|
||||
command_print(CMD, "parport port = %u", amt_jtagaccel_port);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
@ -556,7 +546,7 @@ COMMAND_HANDLER(amt_jtagaccel_handle_parport_port_command)
|
|||
COMMAND_HANDLER(amt_jtagaccel_handle_rtck_command)
|
||||
{
|
||||
if (CMD_ARGC == 0) {
|
||||
command_print(CMD_CTX,
|
||||
command_print(CMD,
|
||||
"amt_jtagaccel RTCK feature %s",
|
||||
(rtck_enabled) ? "enabled" : "disabled");
|
||||
return ERROR_OK;
|
||||
|
@ -596,6 +586,7 @@ static const struct command_registration amtjtagaccel_command_handlers[] = {
|
|||
|
||||
struct jtag_interface amt_jtagaccel_interface = {
|
||||
.name = "amt_jtagaccel",
|
||||
.transports = jtag_only,
|
||||
.commands = amtjtagaccel_command_handlers,
|
||||
|
||||
.init = amt_jtagaccel_init,
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue