Spencer Oliver
f9feeacb7f
pic32: update pic32mx flash driver
...
Update devices as per the latest programming manual.
We now use the full DEVID to identify the target. Previously we used
a 8bit id but that has now been changed in the manual.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-04-14 09:17:17 +01:00
Luca Ellero
ecd5e5de7f
Replace byte-access to memory with faster word-access
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Freescale iMX53 doesn't seem to like unaligned accesses to his memory
mapped registers.
Anyway this patch makes dump_image/load_image 4X faster for every
access through APB.
Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:33:11 +02:00
Luca Ellero
81f238f522
Add opcodes for load/store registers words immediate post-indexed
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Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:32:24 +02:00
Luca Ellero
041953f3b1
Add preliminary support for Freescale iMX53
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Signed-off-by: Luca Ellero <lroluk@gmail.com>
2011-04-13 21:32:00 +02:00
Alexandre Pereira da Silva
5cc83a880a
Add the REV A tap id to the LPC3250 configuration
2011-04-13 21:28:44 +02:00
Michel JAOUEN
08303f10aa
cortex_a :apb mem read/write working with mmu_on
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Conflicts:
src/target/cortex_a.c
2011-04-13 10:57:02 +02:00
Michel JAOUEN
28ddd16ddc
cortex_a : multiple target on the same dap
2011-04-13 10:56:52 +02:00
Michel JAOUEN
a7844aa4e8
cortex_a : use dap ref from armv4_5common
2011-04-13 10:56:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d6027ca6a8
at91: add at91sam9263 chip register definition
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:19:36 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ba71e8c521
at91: add chip register definition and generic init support
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for
- pio
- pmc
- rstc
- wdt
- sdramc
- smc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 19:18:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
28e6dcee85
add at91sam9263-ek support
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:16:28 +02:00
Jean-Christophe PLAGNIOL-VILLARD
22437fac28
add at91sam9261-ek support
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:14:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5d538084be
at91: add at91sam9261 chip register definition
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:13:59 +02:00
Jean-Christophe PLAGNIOL-VILLARD
13cf987bb8
jlink: jlink_debug_buffer use inline function when _DEBUG_USB_COMMS_ not define
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
2011-04-09 10:12:08 +02:00
Ali Lown
c7a17b8466
Buffering for up to 64 bytes in USB Blaster.
...
Uses a global buffer.
Add self to acknowledgements.
2011-04-08 18:26:09 +02:00
Ali Lown
24943498e6
Add support for LED to USB Blaster code.
2011-04-08 18:26:09 +02:00
Spencer Oliver
becfbeaacd
build: correctly use AC_LANG_PROGRAM
...
With newer versions of autoconf >= 2.68 we receive warnings about the
incorrect use of AC_LANG_PROGRAM. This fixes those warnings.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-04-06 09:12:34 +01:00
Michel JAOUEN
5e86c5173c
cortex_a : implement jtag console for cortex_a
2011-04-06 06:45:39 +02:00
Drasko DRASKOVIC
719f9ecde3
Added mips_ejtag_drscan_32_out() for optimization.
2011-04-05 08:21:29 +02:00
Drasko DRASKOVIC
bc9afcd4d1
Corrected waiting on PrAcc in wait_for_pracc_rw(). Added necessary check that PrAcc is "1" before FASTDATA access.
2011-04-05 08:21:25 +02:00
Drasko DRASKOVIC
b125689459
Added correct endianess treatment for big endian targets. Now it is possible to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
2011-04-05 08:21:17 +02:00
Øyvind Harboe
3fea99097e
pandaboard: use new -dbgbase option to workaround broken ROM table
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-02 09:00:01 +02:00
Øyvind Harboe
a1d9f16320
cortex_a: delete dbgbase hack vestiges
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 21:00:44 +02:00
Michel JAOUEN
930d70f1a3
cortex_a: fix gaffe in first implementation of -dbgbase
2011-04-01 18:59:02 +02:00
Øyvind Harboe
3b7c9585db
Merge remote branch 'origin/master' into HEAD
2011-04-01 13:02:24 +02:00
Øyvind Harboe
a0b83e82f7
mips: fix gaffe in previous commit
...
accidentally invoked return jtag_execute_queue() in the
middle of a fn. Hmm.... I would have expected gcc or
at least lint to catch this.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 12:32:41 +02:00
Øyvind Harboe
977df18f50
cortex_a: remove broken dbgbase patchup code
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the patchup code would get false positives when checking
whether a dbgbase had to be corrected.
The solution is to have autodetect default, with manual override
in scripts.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 10:00:41 +02:00
Phil
364cfaac1d
Added s19 to (fast_)load_image documentation to match the online help.
2011-04-01 09:02:03 +02:00
Øyvind Harboe
378567da4e
mips: illustrates how to improve performance
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Do not require unecessary roundtrips for clocking out
data.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 08:59:11 +02:00
Øyvind Harboe
2615bf4398
types: write memory now uses const
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-04-01 08:59:07 +02:00
Øyvind Harboe
d76fd2aac7
mips: delete kludgy code that modifies data sent to write_memory()
...
Could this cause confusion as data sent to write would be flipped
and then if the caller subsequently used the data, e.g. a
compare mismatch might happen?
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
1b9e80f7e6
startup: fix bugs in cleanup upon errors during startup
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Importantly adapter cleanup will now happen upon startup failure.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
0c1ebf2673
mips: mips32_pracc_exec error propagation fixes
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
83ab5ad240
mips: mips_ejtag_get_impcode error propagation added
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:46:56 +02:00
Øyvind Harboe
667c65552e
mips: fix mips_ejtag_set_instr error handling
...
this fn does not fail, it queues data.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:36:45 +02:00
Øyvind Harboe
e1f5055bb0
mips: fix error handling for jtag_execute_queue()
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 23:08:53 +02:00
Øyvind Harboe
f169f86bd1
xscale: fix gaffe in phys write
...
it would *read* instead of *write* to memory
when the MMU was disabled.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 18:46:14 +02:00
Øyvind Harboe
8d338f3296
cortex-a: use -dbgbase option
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 09:30:48 +02:00
Øyvind Harboe
b75bdb7b04
target: add -dbgbase option to target configuration
...
Really a Cortex-A specific option, but there is no
system in place to support target specific options
currently and there has been no need for such a system
until now.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-31 09:30:48 +02:00
Olivier Schonken
ac6f8f9616
at91sam3: Modified cidr comparisson to ignore version bits
...
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
2011-03-30 16:01:00 +02:00
Øyvind Harboe
3e83991560
docs: add HACKING file to help users get started with patches
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-30 15:58:11 +02:00
Alexandre Pereira da Silva
56f705525c
Clarify LPC32XX address cycles message
...
Hi,
This is a more descriptive message about LPC32XX error, when the nand
chip needs 5 address cycles.
Thanks.
2011-03-30 08:04:15 +02:00
Alexandre Pereira da Silva
54ec0c4a8a
Add Micron 2GiB nand
...
Hi,
This will add support for a new nand chip device.
Thanks.
2011-03-30 08:04:01 +02:00
Andrew Lyon
be14e8cbb0
bugfix for step <address> mips_m4k
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The patch below fixes step <address> on mips_m4k.
Spencer Oliver <spen@spen-soft.co.uk>:
The current code is used on all other arch's - is
there a underlying issue with those aswell ?
2011-03-29 12:50:54 +02:00
Øyvind Harboe
68bd107c6d
command: fix leak when executing commands
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found via valgrind, not observed/reported.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-27 23:51:30 +02:00
Øyvind Harboe
dec80e1cff
cortex_a: rename cortex_a8.c/h to cortex_a.c/h
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 11:29:10 +01:00
Øyvind Harboe
a843789ede
omap4430: tried to add in workaround for broken dbgbase query
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:21:16 +01:00
Øyvind Harboe
fc574c64bb
cortex a9: merge cortex a9 and a8 code
...
better to keep this in a single file.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:10:21 +01:00
Øyvind Harboe
6c5e1781a1
omap4430: cortex a9 and a8 are now merged again
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-22 09:10:21 +01:00
Øyvind Harboe
ec2b8d71ac
zy1000: fix bug in ir scan handling
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set cur_instr to BYPASS as optimisation code will
rely on checking the cached value.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-03-21 13:47:02 +01:00