Commit Graph

2 Commits (f712098323c46213a7658f6b91b3775055bc6d6a)

Author SHA1 Message Date
Uwe Hermann b6068f5a48 Glyn Tonga2: Faster JTAG speed after CPU/RAM init.
Change-Id: Ib08dae0035355138c468483a7ee2d73aadedf430
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/564
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-04-13 08:57:29 +00:00
Uwe Hermann d4599b8b3f Add a board file for the Glyn Tonga2.
This is a Toshiba TMPA900CMXBG (ARM9) based SO-DIMM CPU module with 64MB
DDR SDRAM, 256MB NAND flash, and on-board Ethernet.

The board file provides a tonga2_init function which sets up the
PLL/clocks and memory (SDRAM and SRAM), which allows writing a boot-loader
into RAM via JTAG.

Change-Id: I60522b97997bdf50e1f25aebab910d93a98522fb
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Reviewed-on: http://openocd.zylin.com/19
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-10-13 22:28:16 +00:00