These chips are capable of reading the flash registers while they're
running.
Change-Id: I76b90b2bae1aa79b5a063b2073faa5d3ed93cfd7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The device was correctly used in stm32lx_probe but missing from stm32lx_get_info.
Change-Id: If288b8df3210a945e727e4e27cfbdb948db32fc7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1491
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
gcc (Gentoo Hardened 4.6.3 p1.13) produces a warning about the variable
assigned but not used. write() can sometimes write less than the specified
count so it's marked with warn_unused_result in the system headers and its
return value can't be ignored. The most correct solution would be to have a
loop writing the buffer until all bytes are written or an error is
returned but here it's impractical.
Change-Id: I75f7482e2b26fe0e6d70d34947518d3a8f0afe5c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1490
Reviewed-by: Laszlo Papp <lpapp@kde.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Double const is bogus and breaks the build on Clang 3.3.
Change-Id: I9f9394d17f66289ac74ae6dd48f3165483b72e9e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1489
Reviewed-by: Laszlo Papp <lpapp@kde.org>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
This fixes the build with Clang 3.3.
Change-Id: I729b4791c16178cdd4a87f7e1c04019da2c84b26
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1488
Reviewed-by: Laszlo Papp <lpapp@kde.org>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This fixes a bunch of errors like this:
aice_usb.c: In function 'aice_pack_htdc':
aice_usb.c:63:4: error: cast increases required alignment of target type [-Werror=cast-align]
Compile-tested only.
I think this can be seen as another justification for an ARM Jenkins
build target.
Also, the aice code I've seen so far seems to be assuming it runs on a
little-endian machine so probably there're some endianness issues
hiding. Hsiangkai, please get an old PowerPC Mac (or at least some
fast usb-equipped MIPS SOHO WiFi AP/router for which you can
cross-compile OpenOCD with OpenWrt) and do some real-life testing for
your code on Big-Endian. I propose it to be a requirement for any
non-trivial code submitted by a commercial entity of reasonable size.
Change-Id: I45e05257687d0020d7172b26a8666ebc1950e00c
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1477
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
On XScale architecture, to write debug control register DCSR
and activate JTAG debug (ie. to choose Halt Mode), the
enabling can only be done while the board is held in reset
state (ie. PXAxx #RST line held low).
The current implementation writes to the register before
asserting the SRST line. Swap the order to activate the SRST
line before writing to DCSR.
Change-Id: I914b9d53d39bdeb5fe4ee5e11068cafafe0da4d2
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-on: http://openocd.zylin.com/1458
Tested-by: jenkins
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Replace hexadecimal masks for vector catching with words
representing the caught exception, such as dabt for data
abort, etc ...
This way, the new xscale command is :
- xscale vector_catch
Reads back to the user the current vector catching status
- xscale vector_catch reset dabt pabt
Sets the caught vectors to data abort and prefetch abort
for example.
This is mostly taken from Cortex-M3 openocd code.
Change-Id: I66591d5796f0e07f0f31edc8d28722e1e48aa8c5
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-on: http://openocd.zylin.com/1456
Tested-by: jenkins
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Only the support for at91sam3s8b is tested on real hardware.
Change-Id: I4ce23bc2f6131d9cf3ff1b301ab9e470d20845ab
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1424
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update is untested due to missing hardware.
Change-Id: Ibe286b741ebbb1c8ae0bd3dea4b8f3e12320ab34
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1423
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to the "AT91SAM ARM-based Flash MCU SAM3S Series datasheet"
(http://www.atmel.com/Images/doc11090s.pdf) p. 30 the lock region
size for the at91sam3sd9 family is 32 kbyte.
This fix is only based on the datasheet due to missing hardware.
Change-Id: Ic47b0642e4f11a60de477eaa0167038103b8ff15
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1422
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add Thumb-2 code to write flash memories that don't support DQ5 polling
* Make sure default values for unlock commands are set even if there is no PRI information given by the flash
* Add a fixup to disable DQ5 polling for the SST 39VF3201C
Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40
Signed-off-by: IS2T development team <dev.is2t@gmail.com>
Reviewed-on: http://openocd.zylin.com/1449
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This prevents segmentation fault that can occur on cortex_a targets if
gdb connection is established before it's halted and CPSR examined.
Change-Id: Id996200e0fd95440496509c1fecaabbdbf425e23
Tested-by: Henrik Nordstrom <hno@squid-cache.org>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
if gdb server (openocd) answers qfThreadInfo with an empty string during boot,
gdb will not request thread info anymore. to keep thread awareness in gdb,
we have to answer with a non empty string, 'l' indicates an end of list,
and is a valid answer here.
Change-Id: I7870a5db1090c786f306db16a25871e69b8a9760
Signed-off-by: Zied Guermazi <guermazi.zied@gmail.com>
Reviewed-on: http://openocd.zylin.com/1432
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
soft_reset_halt was only really intended for the older arm arch, eg. armv4/5.
Newer arch such as armv7m/mips do not need this as they have better alternatives.
Change-Id: Ifb360680b7e4bfa5365f3c79d82574bded952b45
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1442
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add pin controls (pin6 and pin8). These pins can be
controled either :
- with a fixed value (0 or 1)
- by TRST or SRST reset signal (driven low when signal
activated).
Change-Id: Ie6a3e57fc6ba6a38fdb9a009c976e3febab8f578
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Reviewed-on: http://openocd.zylin.com/1448
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Fixes are:
- Discard any stale data from the previous connection.
- Disable CR/LF translation on the (virtual USB) serial port.
- Increase the average USB packet size. The 1 KiB buffer was underutilised.
- Option "buspirate_speed fast" now works out of the box.
- Some extra comments, error checking, etc.
Change-Id: I72c49d943a8ce9c5e5d1644ef90cb1482f93c618
Signed-off-by: R. Diez <rdiezmail-openocd@yahoo.de>
Reviewed-on: http://openocd.zylin.com/1437
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fixes regression introduced in 9785f51f that caused write outside
allocated memory during probe of devices with <1024K flash.
Reported-by: Alexander Pakhomov <ker0sin@yandex.ru>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: Ifba8833e436064624efbf678162538fd351a5702
Reviewed-on: http://openocd.zylin.com/1450
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
mips_m4k_bulk_write_memory was only called from target_write_buffer as an
optimization when the word count was large enough.
Remove mips_m4k_bulk_write_memory from the target type, causing the default
implementation to call the regular mips_m4k_write_memory instead.
Perform the dispatch to bulk write in mips_m4k_write_memory, enabling the
optimization for target_write_memory() writes with size 4, in addition to
target_write_buffer() writes.
It also enables making the choice of bulk write vs regular write
specifically for the architecture and not relying on the generic target
code to make a sensible decision.
Change-Id: I295f21a67ceaa195802403f2518ea2e0a025c1c7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1215
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
This will enable the user to use either name when calling flash driver cmds.
For example the stm32f3x family use the same flash driver as the stm32f1x, so
the user has to use 'stm32f1x mass_erase 0' which can be confusing.
Now the user can also use 'stm32f3x mass_erase 0' with the same result.
Change-Id: I14280674c8dfa2ce1c01e327af7f38e36150462c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1428
Tested-by: jenkins
If mem_ap_sel_write_atomic_u32 fails then tmp_buff may not be released.
Detected by clang.
Change-Id: I3d5416bd47d0eea61f61ec02ac5e43c82f114108
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1433
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change scope of the variable gdb_reg_list_idx from global to module.
Change-Id: Ib8273c0769c11c1d5a338e4711efbddb8e8a0243
Signed-off-by: Jim Norris <u17263@att.net>
Reviewed-on: http://openocd.zylin.com/1441
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This makes libusb handling more consistent: if any driver requires
libusb, first check for libusb-1 availability, if not found and
libusb0 is ok for this case, try libusb0.
A user-visible bug fixed by this is that when a user was selecting a
driver that required libusb-1 but was lacking the necessary dev files
or libraries, configure didn't complain (but the build was failing of
course).
--enable-stlink doesn't really require libusb-1 but since it's using the
same automake symbol HLAADAPTER, ti_icdi is getting built too which needs
libusb1 unconditionally. Since using libusb-0.1 makes little sense anyway,
leave that as is.
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Change-Id: I630a4ad9e4583743d45b2233bf5d8f4e5c0aab82
Reviewed-on: http://openocd.zylin.com/1434
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Print a user-friendly message when libusb_open() fails, e.g.
Error: libusb_open() failed with LIBUSB_ERROR_ACCESS
when there's a permissions problem.
Also output a configure warning if libusb older than 1.0.9 is detected.
Change-Id: I800f71f06672fe06c0a98a4e469f853b5021bcfe
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1430
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
962b3eb40c included the old GPL address.
Change-Id: I7affbdc3fc1c9251ea90796ab9eeef4d56ba4308
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1440
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds support for JTAG programming by bitbanging GPIOs exposed on
the RaspberryPi's expansion header.
Tested by connecting directly to an STM32VLDiscovery board, without any
additional circuity. I observed maximum about 4MHz on the TCK pin with an
old analogue 'scope and about 100kHz when setting the speed to 100kHz.
Busyloop waiting is needed because even with a single 0ns nanosleep call
(with FIFO priority) it lowers the TCK speed to ~30kHz which is way too low
to be useful.
The speed testing with adapter_khz 2000 gave the following results:
sudo chrt -f 1 nice -n -19 ./src/openocd \
-f interface/raspberrypi-native.cfg \
-c "set WORKAREASIZE 0x2000" \
-f target/stm32f1x.cfg -c "adapter_khz 2000"
wrote 131072 bytes from file random.bin in 3.973677s (32.212 KiB/s)
dumped 131072 bytes in 1.445699s (88.538 KiB/s)
This is 3.7 times faster for writing and 14.3 times faster for reading
compared to the generic sysfsgpio driver; probably the writing speed is
limited by the target itself here and reading speed might be considerably
higher too with appropriate connection and a capable target.
BCM2835 name is choosen over BCM2708 because the published peripherals
datasheet uses the particular model name and not family name.
Change-Id: Ib78168be27f53c2a3c88c3dd8154d1190c318c78
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/758
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Updated OpenJTAG driver from www.openjtag.org to work with latest version of OpenOCD.
Change-Id: I2917f4e5835fb9ca5265e81dc38515fa97ae9503
Signed-off-by: Ryan Corbin <corbin.ryan@gmail.com>
Reviewed-on: http://openocd.zylin.com/1406
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add target code for Andes targets.
Change-Id: Ibf0e1b61b06127ca7d9ed502d98d7e2aeebbbe82
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1259
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Andes AICE uses USB to transfer packets between OpenOCD and AICE.
It uses high-level USB commands to control targets instead of using
JTAG signals. I define an interface as aice_port_api_s. It contains
all basic operations needed by target-dependent code.
Change-Id: I117bc4f938fab2732e44c509ea68b30172d6fdb9
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1256
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Rewrite the Altera USB Blaster dongle driver :
- make extensive use of byte-shift mode, to improve JTAG
speed.
This is the main reason of the rewrite. It improves the
memory dumps with a factor 3 at least, and upload 100
times, from 1 kBytes/sec to 100 kBytes/sec with a
USB-Blaster connected to an Altera Virtual JTAG TAP +
OpenRISC CPU.
- split the low level API part (between FTDI and FTD2xx)
from core driver, so that in the future, if both libftdi
and ftd2xx can coexist, the driver will be able to switch
dynamically from one access to the other.
Change-Id: I2ee9cedf4a5eb27501f337993ee0cdee52517e7c
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Marek Czerski <ma.czerski@gmail.com>
Tested-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/467
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Alexandre Becoulet <alexandre.becoulet@free.fr>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This file is used by all the Cortex-M family not just Cortex-M3.
Change-Id: Ie8680535b220c66bb8fcd862510407a46a73e8a0
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1429
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Native compilation on RaspberryPi with
gcc (Debian 4.6.3-1) 4.6.3
Target: arm-linux-gnueabi
ends with error:
cortex_a.c: In function 'cortex_a8_read_apb_ab_memory':
cortex_a.c:2063:40: error: cast increases required alignment of target type [-Werror=cast-align]
cc1: all warnings being treated as errors
Also check for malloc failure.
This patch is compile-tested only.
Change-Id: I580c505424d03ac3a565de54182db22277c52ac1
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1369
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The speed table generation (by using explicit
make -f Makefile.rlink) was broken since
865efd828a Dec 2 2009 which did a bunch of
renaming and included hand-editing of a generated rlink_speed_table.c file.
This patch is compile-tested, i.e. the new generated rlink_speed_table.c
links fine with the rlink driver.
Change-Id: I1789a2f2f5bf20183b772d55c55fe68a0bd05cf5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1431
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This should cover all the cases when RESET_SRST_NO_GATING is set
without RESET_HAS_SRST. This might happen when RESET_SRST_NO_GATING is
automatically set by a target code (and not from tcl).
However, there're some other places (mips_m4k, arm7_9_common) where
adding RESET_SRST_PULLS_TRST would lead to trying to use SRST even if
it's not present. Currently it's impossible for the user to enable
that flag without enabling SRST.
Change-Id: Ib1c6f68feed0b8057d55afd5f260bb22ab332ced
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Commit d9ba56c295 did a bunch of
renaming of cortex_a8 to cortex_a, including the names in config
files. However that introduced a regression as the name in target_type
struct remained unchanged.
This adds the last missing bit: actual renaming of the target name as
understood by OpenOCD.
Also change the (hopefully) last instance of using it in the supplied
config files, namely from imx6.cfg.
Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1420
Tested-by: jenkins
Reviewed-by: Chris Johns <chrisj@rtems.org>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since gethostbyname() is deprecated and inconvenient, rewrite to use
getaddrinfo() using an implementation more or less copied from its man
page. This automatically enables support for IPv6.
This also fixes a FTBFS on ARM due to alignment issues.
Change-Id: I990a49506cac4b26faf77587937e506138371f7c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1379
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
There seems to be a few missing semihosting calls. I
am not sure why this one is actually missing, since it
seems simple enough to implement. It was tested using
an HTC HD7 connected to openocd through a "home brew"
ftdi 4232H board.
Change-Id: Ie17dc96c6d48227a3dc9ff1e21201a85498a10b1
Signed-off-by: Brandon Warhurst <roboknight@gmail.com>
Reviewed-on: http://openocd.zylin.com/1345
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This modifies telnet server to allow using common readline combinations to
move up/down history, without the need to touch cursor keys.
Change-Id: Ib659075883e91794b44f391f7c29bbdfdd679d10
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1376
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The following warnings prevent OpenOCD from building:
efm32.c: In function 'efm32x_read_lock_data':
efm32.c:373:8: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:386:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:394:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:402:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c: In function 'efm32x_get_page_lock':
efm32.c:430:17: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c: In function 'efm32x_set_page_lock':
efm32.c:441:19: error: cast increases required alignment of target type [-Werror=cast-align]
cc1: all warnings being treated as errors
This patch is compile-tested only.
Change-Id: Ia3a8f342e0f5e30c8ea4de9435c5c7a80bc100e3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1370
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
When e.g. SRST is not specified, the current code results in assigning 0 to
srst_fd and subsequently a stray '1' is output on screen on reset.
Avoid this by not doing bogus initialisation.
Change-Id: Iadb847a384a927ae746124cf6e4e3c6cc8b11406
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1375
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Add the connect under reset options to the online help for
reset_config.
Change-Id: I4b9a87b234de01531390b39b898a848841d1e834
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1377
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
In target_call_event_callbacks(), it will execute
1. target_handle_event (use Jim_EvalObj() to evaluate event
statements in config files)
2. call user registered callbacks
Before calling user registered callbacks, target_handle_event has
been executed. So, there is no need to call target_handle_event()
in gdb event callback. It will execute event statements in config
files twice.
Change-Id: I84629e324fa3eb909907badf2319b4138ba89f07
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1372
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rename cortex_a8 target to use a more correct cortex_a name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.
cfg files have also been updated to the new target name.
Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1130
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Rename cortex_m3 target to use a more correct cortex_m name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.
cfg files have also been updated to the new target name.
Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1129
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Sometimes the target may have breakpoint registers set from a previous
debug session, we can either sync them or as we have chosen here clear them.
Change-Id: I439a623ebbf010246a70e5596d04aa7d546da731
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1363
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Ensure FlexRAM usage is limited to half the FlexRAM size when programming.
Assume the FlexNVM sector size is equal to half the FlexRAM.
Fix sector erase checking which had an error introduced when the
kinetis_ftfx_command( ) signature was changed.
Change-Id: I88edd9c7d4a4ba474cad7b00052feaeedfa8ced8
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/1358
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Seems commit fc2abe63fd caused a regression
in that the arm reg cmd no longer worked. The issue was caused because we
changed the value of ARM_MODE_THREAD which was being checked in arm_init_arch_info.
Change-Id: Id571d4ab336d1b0e2b93363147af245d24b65ca5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1362
Tested-by: jenkins
Reviewed-by: Luca Bruno <lucab@debian.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The format of 'M' packet is 'M addr,length:XX...'. The data
follows ':' immediately. No need to '+2' to SEPARATOR in
unhexify(), because SEPARATOR points to data correctly.
Change-Id: I15b5758b540816cc727752e7bf68cd45e623f603
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1360
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch adds flash programming support for internal flash of the
LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768
and LPC2468). It should also work with LPC1800's with onchip flash.
The "base" parameter of the "flash bank" command is now significant
for the lpc4300 variant and required to determine the bank number
parameter needed by the IAP routines.
NOTE: I could only program flash successfully when the chip is powered
with "P2_7" pulled low to put it in ISP mode. When running from flash
(and not the ISP ROM), the target fails to halt and the sector erase
fails. This is similar to the behavior I remember when trying out the
spifi driver on a LPC4350... lots of power cycles to make progress, one
To burn, one to run. So I am not confident my config is set up correctly.
Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3
Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1126
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
OSBDM: add new VID:PID implemented in OSJTAG/OSBDM firmware somewhere
between versions 30.13 and 31.21. PFLASH programming works with this
patch, tested on a Freescale Kinetis TWR-K20D72M using its onboard OSBDM
JTAG adapter.
Note: flash program testing required hacking kinetis_write() to force
longword programming, as the FTFL program section commands formulated by
kinetis_write() currently fail on this board's PK20DX256VLL7 processor.
Change-Id: Ib7b92ff2fe9ebf6158fb1489f554a19e96cd9651
Signed-off-by: R. Steve McKown <rsmckown@gmail.com>
Reviewed-on: http://openocd.zylin.com/1348
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Now all the functions with only fetch accesses are modified.
The same delay between scans has been added to mips32_pracc_fastdata_xfer(), it should work
at the same scan rates as the other pracc functions, but it needs higher scan_delays
to work.
Change-Id: Ifb31d8ea6de9d22674385782913d221a2494dbbf
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1196
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Functions mips32_pracc_read_mem(), mips32_cp0_read() and mips32_pracc_read_regs() are now modified.
mips32_cp0_read() is very similar to mips32_read_u32() with one store access.
mips32_pracc_read_regs() is the only function that can not be executed from only one queue.
Now this function is modified to use reg8, it saves all the registers but does not restore reg8.
To remedy this, mips_ejtag_config_step() is called after mips32_save_context() in
mips_m4k_debug_entry(). Function mips_ejtag_config_step() is modified to use reg8 and
restore it from ejtag info instead of using DeSave for save/restore.
Change-Id: Icc224f6d7e41abdec94199483401cb512cc0b450
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1195
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Each pracc function defines a variable ctx of type struct pracc_queue_info.
To simplify the code tree auxiliary functions are defined: pracc_queue_init(), pracc_add() and
pracc_queue_free().
The second parameter in pracc_add() is the store address if the instruction is a store at dmseg,
otherwise it should be 0.
The code is executed by mips32_pracc_queue_exec(). If ejtag_info->mode is 0 mips32_pracc_exec()
is called and it should work like with current code.
To generate the delay between scans the number of clock ticks are calculated with the help of
jtag_get_speed_khz(). Due to delays in the execution of each single ftdi instruction the number of ticks
are higher as it should be, specially at higher scan rates.
mips32_pracc_read_u32() should now work with the new code.
Change-Id: I471590a4fc89b56af10bd46c48767b4c64de154f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1194
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch and the following patches define another way of doing processor access without the need to read back
the pracc address as needed in current pracc code.
Current pracc code is executed linearly and unconditionally. The processor starts execution at 0xff200200
and the fetch address is ever incremented by 4, including the last instruction in the delay slot of the branch to start.
Most of the processor accesses are fetch and some are store accesses.
After a previous patch regarding the way of restoring registers (reg8 and reg9), there are no load processor accesses.
The pracc address for a store depends only on the store instruction given before.
m4k core has a 5 stage pipeline and the memory access is done in the 3rth stage. This means that the store access
will not arrive immediately after a store instruction, it appears after another instruction enters the pipeline.
For reference: MD00249 mips32 m4k manual.
A new struct pracc_queue_info is defined to help each function in generating the code. The field pracc_list holds in the
lower half the list of instructions and in the upper half the store addressess, if any. In this way the list can be used by
current code or by the new one to generate the sequence of pracc accesses.
For every pracc access only one scan to register "all" is used by calling the new function mips_ejtag_add_scan_96().
This function does not call jtag_execute_queue(), all the scans needed can be queued before calling for execution.
The pracc bit is not checked before execution, is checked after the queue has been executed.
Without calling the wait function the code works much faster, but the scan frequency must be limited. For pic32mx
with core clock at 4Mhz works up to 600Khz and with 8Mhz up to 1200. To increase the scan frequency a delay
between scans is added by calling jtag_add_cloks().
A time delay in nano seconds is stored in scan_delay, a new field in ejtag_info, and a handler is provided for it.
A mode field is added to ejtag_info to hold the working mode. If a time delay of 2ms (2000000 ns) or higher is set,
current code is executed, if lower, new code is executed.
Initial default values are set in function mips32_init_arch_info. A reset does not change this settings.
Change-Id: I266bdb386b24744435b6e29d8489a68c0c15ff65
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1193
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The em357 driver only supported one page configuration (192k in 96 2048k)
pages. This is fine for em357 chips since that's the size they have, but
ST's STM32W chips (pretty much the same) have different flash
configurations available (64, 128, 192, 256k). I can't find anywhere
that would indicate the size of the chip anywhere in memory so the
selection must be manual, using the 'size' parameter. For backwards
compatibility, any size not known to be in use defaults to the 192k
configuration. I don't have any em357 devices to test, but I also found
that I had to re-assert the FPEC clock enable before performing an
erase. This is a single line and shouldn't break any configurations.
My testing so far has only been with a 64k device with 8k of RAM.
Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1336
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Disable polling the target before we issue a 'reset run'. This stops errors or
warnings if the target disables the SWD or JTAG interface as part of the
application code.
Change-Id: I5019dffdad41a8e210003ece1caf89069ee0f223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1331
Tested-by: jenkins
We need to make sure that srst is asserted before we attempt to switch into
jtag or swd mode otherwise we receive a error (-9) - invalid device id.
Change-Id: I625166c751cfba8e8a5290f40122bb9afc9dbb39
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1315
Tested-by: jenkins
If parport_toggling_time is called before the adapter speed has been
configured then the call fails. Probably not the best fix, but does at least
enable parport_toggling_time to be used again.
This regression was added in commit 740b9e25b4
Change-Id: I90300916d6bda5ef053c557e5ac136c4f002bdd1
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1309
Tested-by: jenkins
The final bit was incorrectly added as output data, even if no data was
to be written. Changed it to match handling of other bits.
Change-Id: I91e5ba0c932876bfb579c22e6c7ef0300baa1534
Signed-off-by: Yann Vernier <yann.vernier@orsoc.se>
Reviewed-on: http://openocd.zylin.com/1049
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add command to fix CSW_SPROT in register AP_CSW.
This solves dap apmem access in non secure access.
Change-Id: I7cfcb6434d75f5cfd4a2630a059901cdeea010ce
Signed-off-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-on: http://openocd.zylin.com/1276
Tested-by: jenkins
Reviewed-by: mike brown
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
After calling mips32_cp0_read() nothing has been queued, the call to jtag_exec_queue() is unnecessary.
Change-Id: Ie25438045a8e9b6b1b170df7b52609d45f284b5a
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In current devel code there are 3 functions (related to m4k code) that need to restore register 8 from pracc stack:
mips32_pracc_read_u32()
mips32_cp0_read()
mips32_pracc_write_mem_generic()
And mips32_pracc_read_mem() needs to restore regs 8 and 9 from pracc stack.
Values in this registers should be the same as read by mips32_pracc_read_regs() when entering debug
mode and can be modified by mips32_pracc_write_regs() when leaving debug mode.
There is no need to read their values from the processor registers every time.
The fields reg8 and reg9 are added to struct mips_ejtag to store these register values
and the call to mips32_save_context() is shifted in mips_m4k_debug_entry() in order
to store them before any other function needs to restore these registers.
For the same reason in function mips_m4k_step() the call to mips_m4k_set_breakpoint(), if needed,
should be made after calling mips_m4k_debug_entry().
For single word write the number of pracc accesses are now 9 or 8, from 13 or 12 in current code,
single word read takes now 10 instead of 12.
This patch is really the first in a set of patches for an alternate m4k pracc code
much faster that current code. At least for me with pic32mx works fine.
Change-Id: Ibd9df5e8b9f78ce05a180949ba6a561c761b61d6
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1146
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In this function after loading the handler code and the jump code there is a call
to wait_for_pracc_rw() to verify that a pracc access is pending.
Next the address is read to verify that the handler is running, the address should be at
fastdata area.
Next, another call is made to wait_for_pracc_rw(). This call is not needed, we now already
that a pracc access is pending.
Better we call this function before loading the end address to be sure it is loaded correctly.
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Change-Id: If311450ea634786fc28cf1a8e18ed24ce5257d20
Reviewed-on: http://openocd.zylin.com/1142
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
To show up the fail try to step with the core clock set to 31.25Khz
and with a ftdi/hs adapter or with a wiggler, -not with ft2232-.
The scan frequency should be set to 300Khz or higher, at lower frequency probably will not fail.
The code exits with error because the pracc address is at 0x0.
It also fails when using the "all" register, but in this case the code works without any message because the
pracc address is at 0xff202004 when it fails.
I never saw this fail with the core clock set to 500Khz or higher, but ...
The workaround simply puts a 1 ms delay after the execution of the DERET instruction.
Change-Id: I38e8c01a9c39aedd3282140543b83a0844d8ad29
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/1139
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.
Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Fixes system hang for devices that don't ignore
transactions to bad addresses.
Change-Id: Ia98344d7efc12951ef79dbc82b8f792b70a22cee
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/1115
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Moved JTAG code out of transport-neutral file (arm_adi_v5.c) into
transport specific file (adi_v5_jtag.c).
Added ap_block_read to dap_ops interface (arm_adi_v5.h) to support
the move.
Change-Id: I796d3984f138aad052b97c77ac9c12ffd1158f74
Signed-off-by: mike brown <mike@theshedworks.org.uk>
Reviewed-on: http://openocd.zylin.com/1277
Tested-by: jenkins
Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.
Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The commit "gdbserver: use common hexify/unhexify routines" [3d62c3d]
mis-replaced a call to "str_to_hex" with a call to "unhexify". "hexify"
should have been used instead.
Change-Id: I5f5904b1b422f819a6308e2c0740ea43d22c7d0b
Signed-off-by: Christian Gudrian <christian.gudrian@gmx.de>
Reviewed-on: http://openocd.zylin.com/1308
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
This regression was caused due to the recent addition of R4 support and
the removal of the bulk_write_memory handler.
Change-Id: Ide692737f235c0e9906becb6f3502ba52c5907aa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1246
Tested-by: jenkins
The only caller was arm_nandwrite(). Replace that call with
target_write_buffer() instead, which in turn may end up calling the same
bulk_write_memory target API function.
Change-Id: If34c7474df5cf14af3b732fb4774816818f28e79
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1214
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove dummy implementations from all targets except arm7_9 and mips, which
are the only ones with real implementations. Replace with a single default
implementation simply calling target_write_memory().
Change-Id: I9228104240bc0b50661be20bc7909713ccda2164
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1213
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds support for usbprog-jtag and usbvlab that are mostly compatible
to opendous except for IN and OUT endpoints and usb transfer mode.
Change-Id: I44557c2449fe7473295038efa6ae4fc8d80ec7bf
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/687
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
usb_blaster_device_desc was allocated, but never freed.
Change-Id: I764bd092c71b8c260b98aab0e7a1710fd7bfa9fd
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1224
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
If command parport_cable is not executed, parport_cable points to
const char array in read-only memory as default. On exit free()
will try to free this read-only memory. This patch uses strdup to
allocate memory when defining default setting.
Change-Id: I290e707ac6a37e9dc1b45c85ca51d8bd6aac6761
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1223
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Appending bits to TAP buffer doesn't check if there's enough space left.
This patch adds this check to fix TAP overflow error.
Change-Id: If80d5ab4a24983ad24f3cab31f9676d1590ebf5d
Signed-off-by: Stefan Mahr <stefan.mahr@sphairon.com>
Reviewed-on: http://openocd.zylin.com/1216
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
With this option a different channel of the ft2232 chip can be selected using
a previously existing layout. It was made for a partner called Salvador
Tropea.
Change-Id: Ia0dedb2f50e232d089e73788735edc8f47ee23e6
Signed-off-by: Rodrigo Melo <rmelo@inti.gob.ar>
Reviewed-on: http://openocd.zylin.com/1095
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The kinetis datasheets specify the flash registers as bytes rather
than as words, as the previous implementation did. This also makes
a few code sections slightly less endian-magical.
Change-Id: If8f4adfc7f4341085ae5b6eacbf7d74bbd74cf08
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a program proc that simplifies using OpenOCD as a standalone
programmer.
Change-Id: I6ece492cd878c170b734e8bb2e09fe8c4557d5a6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1199
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This reduces the number of gdb conversion routines we have to maintain.
Change-Id: Ia43d6cac86cbe4f76fe0875b9d9c16ac340296db
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1128
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.
It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.
Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stm32f0 and stm32f3 share the same option byte location, but the format
differs.
Adding an option_offset fixes the broken options_read cmd and incorrectly
setting Hardware Watchdog when unlocking a f3x device.
Change-Id: I82d66b6198294ea9eedb44ca8b2fb368c0cb15e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1184
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
When the ftdi driver calls finally the mpsse_flush function, it first
initiate the USB in and finally the corresponding USB out transaction.
Because data in is requested too early the USB device will always answer
the first USB in by a NAK. That can prevented by a simple reordering of
the out and then the in transfer and can improve the Jtag performance for
high JTAG clock rates.
Change-Id: I17abf1487c914c92e2e447ee6d30562ef629f327
Signed-off-by: Peter Henn <Peter.Henn@web.de>
Reviewed-on: http://openocd.zylin.com/942
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Move the global target back off timer to the target struct. This will
fix the wrong error handling with multi target devices like smp systems.
Change-Id: Ia327182ed5d13ca87323700017a8c40ecc6b25a3
Signed-off-by: Mathias K <kesmtp@freenet.de>
Reviewed-on: http://openocd.zylin.com/1179
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The USB buffer will need space for both TMS and TDI buffers.
Each holds tap_buffer_size bytes maximum, so tap_buffer_size must be
smaller than half of usb buf_size.
Change-Id: Id8f39936a894cbd98deb89eec5a859aef1e2b783
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1136
Tested-by: jenkins
Reviewed-by: simon qian <simonqian.openocd@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Because we were always running using target state TARGET_RUNNING target
algorithm's were a bit verbose compared to other targets.
This brings the hla target inline with the other targets.
Change-Id: I3a257fdc878b87660fac8b5eca22b421eee5b349
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1134
Tested-by: jenkins
The was missed when the armv7m was moved over to using the std arm
core_cache, probably because it is disabled by default.
Change-Id: I2f5a18ef6dd783b36e8c29f4c52379104bda4583
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1138
Tested-by: jenkins
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.
Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update adds support for the STM32Lx 384kb dual bank flash. Previously there was a problem when writing an
image that was larger than 192Kb. That lead to openocd printing out two error messages like
"Error: access denied / write protected" and "Error: invalid program address". The reason was that the stm32lx
driver tried to write half pages which overlapped into the next flash bank.
A new configuration file stm32lx_dual_bank.cfg can be used for stm32lx chips with dual bank flash (256kb or 384kb devices).
A sanity check was added for probed flash size values to fix the issue seen on some ST samples that answered incorrectly.
Change-Id: I69e25131983d88613be8606b438f98870c5f1e52
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1125
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
It has been seen on some stm32 targets that the flash size register that
is probed by the driver may contain an invalid size.
This change enables the user to override the probed value.
Change-Id: I09359e59a96f9133d3d939670957d32a830a944e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1132
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
adapter_init (core.c) won't check speed configuration
of the selected interface if it's not needed (.speed = NULL).
When it's not needed, we can now omit adapter_khz in
init scripts and we don't have to implement dummy handlers
for speed_div and khz functions.
It also removes calls to adapter_khz in interface configuration
files when not used anymore.
Change-Id: I6eb1894385503fede542a368f297cec6565eed44
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1131
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This makes sure we are using privileged mode when executing any loaders.
Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we restore the core mode after executing any algorithm.
We also now check that we actually need to swap the core mode, we may
already be in the correct mode.
Change-Id: Ia48af2c108e0f9868aae241bf25f60323503f092
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1107
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This removes the armv7m::core_cache and uses the generic arm::core_cache.
Change-Id: If854281b31486cea8be005008f6a71a691b4c208
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/968
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This simplifies the armv7m_core_reg structure ready for the move to using
the generic struct arm_reg.
Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/967
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
To simplify things change over to using the generic core_mode struct rather
than maintaining a armv7m specific one.
Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/966
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current implementation of hexify was not correctly handling signed chars.
This function is currently used by the ti-icdi driver and as such was causing
random write issues.
As a note perhaps a better long term fix would be to change to using uint8_t
buffers rather than char. This will require changes to the ti-icdi driver
aswell.
Change-Id: I572e69ff2b99227a7d412de056458c0393794b03
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1124
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
LOG_OUTPUT is not intended for general output so use the correct LOG_*
functions instead.
Change-Id: I48d0fe765637024dbafc68f2ea08219d3ff42754
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1104
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
ThreadX support was not working due to it being first in the list of RTOS - regression.
Auto-detect off, an RTOS was always be marked as successfully detected, even if symbols are not found.
Lines 223-227 were unnecessary as they are done in rtos_try_next()
Added lots of comments
Improved readability by separating: GDB not finding a symbol vs no more symbols being available
Regression caused by patch which was allowed only 52 minutes for review : http://openocd.zylin.com/895
Change-Id: Ib4decb01db595ddb3796837c6d8338ce6b9a91ca
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/986
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
All the other drivers will only change the state if required.
This brings all the other drivers inline with this behaviour.
The original issue relates to problems on xscale commit 7989000e09
Change-Id: Ifc90ec2eef68a70a14f37c00931a07982bfa200c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1114
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
There is no constraint about idProduct in USB spec. So, pids[i] may be 0 for USB devices.
Change-Id: I19d8974f4e7082e8b7e1f2d33c019ac4e61bc1e2
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1091
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The makes sure the DWT component is always enabled so that watchpoints
work as expected.
This does need merging into the existing cortex_m logic, however at the
moment this is non trivial.
Change-Id: Ic6cccd1badb51f70a2ca8ea9ab6923788a94c1bf
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
An issue has been seen with the stm32lx flash driver that if a
power cycle/reset is applied after a erase, any ram loader will Hard Fault
on execution.
A similar issue is mentioned in the errata for the device.
Two solution's seem to workaround this issue:
1, Handle the exception, this means adding exception vectors to the loader
and changing the exception address using nvic vtor register.
2. falling back to using slower direct page writes - approx 50% slower.
Using solution 1 would mean restrictions are placed on the loader location.
Solution 2 was chosen mainly as it was simpler too implement.
Change-Id: I429f06b5a3e3b1d8de90071a88a7df11fc9b46a7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1010
Tested-by: jenkins
Waiting 20secs is a bit much excessive, we could probably reduce to 5.
Change-Id: Iffb97adb99c2541a075fe78dbc88a53ddf340214
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1009
Tested-by: jenkins
Handle any leading bytes upto the next 128 byte page, enabling us to safely
use the faster page write.
Rather than use a separate word/byte write to program any trailing bytes
we use a combined write function.
Use memcpy for byte writes and change loader to using bytes.
Change-Id: Ie0164a30388f018dd00e752cf5ff87d4f96ced97
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1008
Tested-by: jenkins
Fixed flash page size detection according to EFM32 GG/LG errata.
MEM_INFO_PAGE_SIZE register containts invalid value in devices with
revision number lower than 18 and should not be used.
Change-Id: Idb2832246efcbbec2fd98a5c458f72a36df386fb
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1116
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When current tap state and end state are the same, transitions are added which is not what should happen.
The usbprog driver was already patched like this long time ago.
Change-Id: I339e87156bdc7b5c83c10c14025b749605d3871a
Signed-off-by: Roman Reichel <romanreichel@aol.de>
Reviewed-on: http://openocd.zylin.com/1113
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Limited (no page unprotect, no block writes) implementation of EFM32
flash support. Verified with EFM32 development kit and STLink V2 adapter
using SWD.
Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c
Signed-off-by: Roman D <me@iamroman.org>
Reviewed-on: http://openocd.zylin.com/1106
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is only minimal support to enable use to catch a Hard Fault in
the stm32l flash bootloader.
Change-Id: I21d6a11893e2f1d173ebff1a651d6f52bf6eec32
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1103
Reviewed-by: Peter Stuge <peter@stuge.se>
Tested-by: jenkins
Currently we have to supply the arg's to this cmd in a set order, this
change fixes that issue.
Change-Id: I14a15732e1917a91009e1ac14fba39ca1523c739
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/992
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Make sure we do not mask out the BFB2 boot bank bit, as this is used on
the larger XL devices.
Change-Id: Iacfdf874140e409e0c4ca9b9aee8f5c2f90dc9be
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/991
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The STM32F0 and F3 devices use a different default RDP to configure a
unlocked device, make sure we use that.
Change-Id: I170779461412c4c202c2cfc8d90baedb7e388150
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/984
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The user is able to use 2bytes of the options byte data for whatever
purpose they wish. Make sure we preserve this during an option erase/write.
Change-Id: Ibf951b11c59a148e671b1eb47fdc9b4f49ccae15
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/983
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Some debuggers (stlink) can't issue 16 bit writes and have to use a
loader to write flash memory.
Currently the loader is not used for option bytes, causing
stm32x_write_options to fail silently on such hardware.
Fix this by using stm32x_write_block to write option bytes as well.
Change-Id: I49c29d53ab5e162463cb349d4c89bef96467e587
Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com>
Reviewed-on: http://openocd.zylin.com/480
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current stm32lx driver will fail if no working area is
provided - fallback to using slow writes if this is the case.
Change-Id: I92b1535fec4aebc855c63ce2c54b10f168f3c07e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1007
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andreas Fritiofson
Spencer Oliver
Paul Fertser
Robert Jarzmik
Ulf Wetzker
IS2T
Zied Guermazi
Evan Hunter
Antonio Borneo
R. Diez
Brent Roman
Jim Norris
Ryan Corbin
Hsiangkai Wang
Brandon Warhurst
Ravaz
Christopher Kilgour
Oleksij Rempel
Freddie Chopin
Matt Dittrich
R. Steve McKown
Salvador Arroyo
Ben Nahill
Peter Dietzsch
Yann Vernier
Michel JAOUEN
Henrik Nilsson
mike brown
Thomas Schmid
Christian Gudrian
Stefan Mahr
Rodrigo Melo
Alex Austin
Øyvind Harboe
Peter Henn
Mathias K
Joerg Fischer
Johan Almquist
Franck Jullien
Roman D
Roman Reichel
Szymon Modzelewski