The current configuration leads to the following error when trying to
program the target:
SWD IDCODE 0x2ba01477
timed out while waiting for target halted
TARGET: efm32.cpu - Not halted
in procedure 'program'
in procedure 'reset' called at file "embedded:startup.tcl", line 478
in procedure 'ocd_bouncer'
Use the default reset handling of the target (SYSRESETREQ) to reset the
system rather than SRST to fix the problem.
Tested on EFM32GG, EFM32TG and EZR32WG STK.
Change-Id: I788c41baf08b20814cbe0934b563424c4bc144b8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3420
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn
or CortexXn. Further it's Cortex-M0+, not M0plus.
Cf. http://www.arm.com/products/processors/index.php
Consistently write it the official way, so that it stops propagating.
Originally spotted in the documentation, it mainly affects code comments
but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output.
Found via:
git grep -i "Cortex "
git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu"
git grep -i "CortexM"
Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3483
Tested-by: jenkins
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change type of use_raw to boolean. This parameter was already
assigned a boolean variable (in COMMAND_PARSE_ENABLE) and used
as a boolean.
Change-Id: I22f8308246cb25ec9ec2395599e406160410a2a8
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3496
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Return ERROR_NAND_DEVICE_NOT_PROBED to prevent calling functions
from segfaulting when nand device has not yet been probed (ie nand
verify)
Change-Id: Ibc4da0aad00e6cc6c83008882b054d981453dc36
Signed-off-by: Ivo Manca <pinkel@gmail.com>
Reviewed-on: http://openocd.zylin.com/3495
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Both the STM32F429I-DISC{O,1} boards are equipped with the same MCU, but
differ by the debugging chip:
- the STM32F429I-DISCO uses the ST-LINK/V2 chip;
- the STM32F429I-DISC1 uses the ST-LINK/V2-B chip (which matches the USB
VID/PID set in stlink-v2-1.cfg).
Change-Id: I07d637f72d26cf5d714472638da974eb6ca02325
Signed-off-by: Samuel Martin <s.martin49@gmail.com>
Reviewed-on: http://openocd.zylin.com/3492
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Memory accesses are not made through the APB-AP, they are made through
the CPU (which happens to be controlled over the APB-AP). Rename all
irrelevant uses of the APB-AP term. And fix the long standing typo in
the function names...
Change-Id: Ide466fb2728930968bdba698f0dd9012cc9dbdf9
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3216
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
According to the MSP432P4xx Family TRM (SLAU356A) Figure 4-7,
0x9AF is the part number for MSP432P401xx devices.
Verified on TI MSP-EXP432P401R LaunchPad.
Change-Id: I22b57c42f2a0dc8263fab6b480cf8c169c7dc295
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3486
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This was found on multiple XMC4500:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11db
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1db, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
On multiple XMC4700 and an XMC4800 this was found instead:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11df
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1df, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.
Change-Id: If369a6d16524004ba439b878f090a313a9f3a760
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3482
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Not documented in the Reference Manuals but found on multiple XMC1100/1202:
Valid ROM table present
Component base address 0xf0000000
Peripheral ID 0x00001c11ed
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1ed, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name it "XMC1000 ROM", since it didn't differ between XMC1100 and XMC1200.
Change-Id: I98a5a524c0d0836f395400fbac24fd496b2ec141
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3481
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
ulink_calculate_frequency() is used exclusively when
_DEBUG_JTAG_IO_ is set, no need to compile this
function if it is not used.
Declaring it static in the same commit.
Change-Id: I243ffdf69a1dc3bee6d16e4bb8d78396b6ea5144
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3241
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The original ULINK adapter has been introduced by Keil in 2002 and got
replaced in 2008 by the incompatible ULINK2. It is not listed on their
website any more. For information about it, browse archive.org
for http://www.keil.com/ulink1/ or http://www.keil.com/ulink/
Change-Id: Ie52d381580acab53ddb40499594dbdc2d27ef1b6
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3371
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Consistently increase the space-indentation of the .full values to
nicely align with the new "Qualcomm QDSS Component v1" .type value.
Change-Id: Icd28d8f3fc7c3afcccb9dcfe138ac57d64927d1a
Suggested-by: Freddie Chopin <freddie.chopin@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3480
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Note:
WCR (Wire Control Register) is replaced by DLCR (Data Link Control
Register). And only TURNROUND field is modifiable.
[andreas.fritiofson@gmail.com]:
Rename DP_IDCODE to DP_DPIDR as well.
Sort list by address and align it using spaces instead of tabs. Add
comments about supporting DP versions.
Remove non-functional wcr command completely.
Change-Id: Ic6b781b07c8eead8b0237d497846d0da060cb1ba
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3244
Tested-by: jenkins
Commit dfc6658cf9 ("Kinetis: flash
driver described in openocd.texi") inserted a kinetis section between
fm3 and lpc2000. Then commit 43ff5acd45
("flash: New Spansion FM4 flash driver") was merged, inserting the fm4
section between kinetis and lpc2000, instead of after fm3. Finally
kinetis_ke was added between kinetis and fm4 in commit
5396ec5dcc ("flash: Added support for
Freescale Kinetis KE family.").
Restore the alphabetical order by moving the fm4 section to before
kinetis.
Change-Id: I77e47c3cd5b2cd8570b62ff2f7be8526aaf57ad0
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3484
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Marc Schink <openocd-dev@marcschink.de>
Instead of placing Atmel last, after ANY_ID, place it after ARM (it's
arm_adi_v5 despite 0x4BB) and sort it with the other vendors, i.e.
before ADI and Qualcomm. Adapt column alignment.
Drop the redundant "Atmel" comment to clarify that Analog is not Atmel.
Change-Id: Ic06785db079cf58d49815a639236636c180e5e17
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3479
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
On APQ8016 was found a CoreSight component designed by
Qualcomm, according to db410c HRM [1] it has a partnumber
following this schema:
[11:8] is 0x4 meaning Qualcomm designed Coresight component in QDSS. Reads as 0x4.
[7:6] is Subsystem/core family ID (e.g. denote QDSS family or generation).
[5:4] is Subsystem/core configuration options (e.g. denote cache options, etc.).
[3:2] is Subsystem/core fuse options.
[1:0] is Subsystem/core future use field
Reads as 0x440.
[1] - https://developer.qualcomm.com/download/sd410/hardware-register-description-qualcomm-snapdragon-410.pdf
Change-Id: I9b4b41fd17c59d2f5ae35b53278d06d6087665f8
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3408
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
On hi6220 'dap info' returned some unknown components from ARM.
Collected from ARM docs, mostly ROM table entries.
Typo fix for Cortex-M3 FPB.
Change-Id: I96bbf7349061937b3afc8bb8d6d1650f2609f82d
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3407
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Initial release of Ambiq Micro Apollo flash driver
supporting our sub-threshold (low power) Cortex M4F part,
and Evaluation Kit.
We have been shipping openocd to our customers for about one year.
The EVK boards are SWD only using ftdi. We also use two of the
other COM instances to display debug information.
It takes about 15 seconds to flash 512K, and mass erase is
about 5 seconds.
Tested by internal verification group, FAE's, and customer sites.
Merged commit 'refs/changes/17/3417/1' as suggested. Makefile.am
and drivers.c follow the new format to avoid conflicts.
Removed unused fault_capture command.
Added documentation for flash driver.
Change-Id: Iae92d869369c6827244f0071f9cb522d8d91fed8
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Reviewed-on: http://openocd.zylin.com/3230
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Clean up working area in case writing fails. Probably inherited from
armv7m_blank_check_memory(). Fix adapted from armv7m_checksum_memory().
Change-Id: I784bef481d1eba833ab6a9c34249fe9d43a16081
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3470
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Clean up the working area in case writing fails.
Adapted from armv7m_checksum_memory().
Change-Id: I4e5950f568ed70a72a1dcfd77e3321110b17e1de
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3469
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Spotted by gcc:
arm7_9_common.c: In function ‘arm7_9_unset_breakpoint’:
arm7_9_common.c:353:4: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation]
if (current_instr == arm7_9->thumb_bkpt)
^~
arm7_9_common.c:356:5: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘if’
if (retval != ERROR_OK)
^~
The logic won't change once the braces have been added, as the new 'retval'
check only makes sense within the if().
Change-Id: I6a303e118f2150e5eb25c9268ad06de5d8a533b2
Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Reviewed-on: http://openocd.zylin.com/3477
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Among other things, this fixes building on Cygwin and MSYS.
Change-Id: I8bdceb49dc72b5f666388cfd97876eba8e1d2b13
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3478
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The ioutil helper functions copyfile and copydir were last and only used
in ecosboard.c which has been removed with commit 39650e22.
Removing the dead code.
Change-Id: I36c7c4c5009d755b4513a14a9f9e214d1ee500e8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3240
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The cortex_a specific assert_reset function must only apply nSRST if
the reset configuration states that JTAG can be used while nSRST is
asserted.
Change-Id: If604a65fdea5bcb46ec723ada547a4e8d6fa8c59
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3356
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
For STLINK_SWD_AP_FAULT git://git.ac6.fr/openocd commit 657e3e885b9ee10
returns ERROR_OK with the comment:
Change in error status when reading outside RAM.
This fix allows CDT plugin to visualize memory.
Change-Id: Id8e220961b748ef9467fd84de62b1dc84ace63f8
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3373
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The capability to lock the debug interface on EFM32
controllers was lacking in OpenOCD.
After receiving some pointers by zapb_ and PaulFertser
on IRC (thanks guys!) I have added this capability.
This works by writing the required bits in the debug
lock word to '0'.
Note: there is currently no way to re-enable the debug
interface from OpenOCD as doing this requires specific
pin wiggling that is currently not implemented yet.
However: having the capability to lock the debug interface
is useful when building a volume programming jig.
You can flash the program code, verify and then
lock the debug interface so that the device cannot
be read when it is deployed in the field.
Change-Id: If2d562dfdb4b95519785a4395f755d9ae3d0cf12
Signed-off-by: Lieven Hollevoet <hollie@lika.be>
Reviewed-on: http://openocd.zylin.com/3389
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This udev rule makes the Altera USB Blaster clone I have on my desk
accessible to the plugdev group.
Change-Id: Ic5e8052c66a270b6a6f89e29de49d9785f18fc1e
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/3423
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
If an error occurs during xmc4xxx_blank_check_memory() aka .erase_check,
it would break out of the loop over flash sectors and return ERROR_OK.
Instead return the error code so that tcl.c can notify the user.
Change-Id: Ie2c1b7933eef2b240b28f8a292634fbbf5b31706
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3425
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The function libusb_get_port_numbers(), required for the command
ftdi_location, is only available in recent version of libusb1.
Compilation will break if the function is not available. This patch
enables the command only if libusb1 contains the necessary function.
Change-Id: I091e72dafa4ed22eea51692751d43246a8152987
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3396
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Basically, same as upstream 4e5d56bdf892e18832a6540b63ebf709966bce2a.
Unescaped left brace in string literals is deprecated since
perl v5.21.1.
Change-Id: I0e5f23bef821d2dca6ff4909ddbb06f4992718d4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3228
Tested-by: jenkins
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
The parts are listed in Rev I of the Datasheet
Change-Id: Icdd9108a0f1f19f666fce79de7f25df9f46de866
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3424
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
I suppose 0xff300008 is the correct value for EJTAG_V20_DBS.
20 miliseconds is too much for scan delay, 2ms is enough in mips_m4k scan_delay handler.
mips32 scan_delay has the correct value.
Change-Id: Ie9dc650065a58e845687058a4c930f85909beec9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/2271
Tested-by: jenkins
Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
BMIPS always needs 2 additional instructions to reach the core.
Seems there is a 2 instructions fifo between the tap and the core, or it behaves in this way.
No idea of the purpose of this fifo, I can only guess.
Of course function mips32_pracc_clean_text_jump() must add this additional instructions (NOPs).
Only tested on bcm3348..
Change-Id: I3183d3ce865d469d7262ba4b15446e5743a5f1df
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/2270
Tested-by: jenkins
Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The XMC1000 family uses a very different flash interface from XMC4000.
Tested on XMC 2Go and XMC1100 Boot Kit.
Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3418
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Part IDs taken from
Atmel-42402C-SAM L22_Datasheet_Complete-01/2016
(revision C)
Change-Id: I1eb76a92097a8327da10faa0551e7fc962a549f8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3426
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Before this change jim_target_reset() checked examined state of a target
and failed without calling .assert_reset in particular target layer
(and without comprehensible warning to user).
Cortex-M target (which refuses access to DP under active SRST):
If connection is lost then reset process fails before asserting SRST
and connection with MCU is not restored.
This resulted in:
1) A lot of Cortex-M MCUs required use of reset button or cycling power
after firmware blocked SWD access somehow (sleep, misconfigured clock etc).
If firmware blocks SWD access early during initialization, a MCU could
become completely inaccessible by SWD.
2) If OpenOCD is (re)started and a MCU is in a broken state unresponsive
to SWD, reset command does not work even if it could help to restore communication.
Hopefully this scenario is not possible under full JTAG.
jim_target_reset() in target.c now does not check examined state
and delegates this task to a particular target. All targets have been checked
and xx_assert_reset() (or xx_deassert_reset()) procedures were changed
to check examined state if needed. Targets except arm11, cortex_a and cortex_m
just fail if target is not examined although it may be possible to use
at least hw reset. Left as TODO for developers familiar with these targets.
cortex_m_assert_reset(): memory access errors are stored
instead of immediate returning them to a higher level.
Errors from less important reads/writes are ignored.
Requested reset always leads to a configured action.
arm11_assert_reset() just asserts hw reset in case of not examined target.
cortex_a_assert_reset() works as usual in case of not examined target.
Change-Id: I84fa869f4f58e2fa83b6ea75de84440d9dc3d929
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2606
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Cortex-M0+ and M4 motor control MCUs KV10, KV11, KV30, KV31,
KV42, KV44 and KV46 added to SDID identification.
Watchdog disable code changed to work on Cortex-M0+ (KV1x)
Protection size set to 1K for 16K flash devices (KV10Z16)
- cherry picked from Andrey Smirnov's change #2051
Change-Id: Ia6f4868eaf7e2cb6ad6a736210c703a67e0027be
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3235
Tested-by: jenkins
Reviewed-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Change-Id: I55ab830aed34a02c53f3419facc81c7354368e30
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3422
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Färber <afaerber@suse.de>
To avoid conflicts between flash drivers being added, consistently use
an alphabetical sort order for the three places new drivers get added:
* Makefile.am NOR_DRIVERS (note: automake disallows a trailing backslash)
* drivers.c struct flash_driver forward declarations
* drivers.c flash_drivers array
Change-Id: Idcd6a8e12821ef10958a6b3ad7bac0dc63cadd08
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3417
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Taken from git://git.ac6.fr/openocd commit e8ed67c42227b7072
STM32F446 (0x434) now is's own case.
Change-Id: I5061db7102b4c923c9f39d3d2f0cc69d29fca0a4
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3375
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Marc Schink
Andreas Färber
Ivo Manca
Samuel Martin
Andreas Fritiofson
Uwe Bonnes
Alexander Kurz
Jiri Kastner
Rick Foos
James Mastros
Aleksander Morgado
Robert Jordens
Matthias Welwarsky
Lieven Hollevoet
Christopher Head
Paul Fertser
Peter D. Gray
Salvador Arroyo
Salvador Arroyo
Tomas Vanek