Commit Graph

8097 Commits (c54da116791369cb125161914005e32a1b45a1a9)

Author SHA1 Message Date
Tim Newsome c54da11679
Merge pull request #220 from riscv/reg_error
Remove errors when accessing a non-existent register
2018-03-07 12:22:15 -08:00
Tim Newsome 298d885fdf
Merge pull request #223 from riscv/upstream
Match upstream.
2018-03-07 12:20:35 -08:00
Tim Newsome 3d571df785 Match upstream.
Change-Id: I3d8b3cb9913ea7d09a5981f6d11b0af67ef0c9c7
2018-03-06 13:07:34 -08:00
Tim Newsome 84c0fdd5d1 Don't always error if a debug program fails
This is often expected, and the calling code should decide whether to
emit an error or not.

Change-Id: Ic21f38b4c75f01e6b40034fdc60dde6ba7a55f4a
2018-03-02 20:02:32 -08:00
Tim Newsome 1d00d03dc0 Remove unable to read register error message
It confuses users of IDEs like Eclipse, which request to read registers
that don't exist on the target.

Fixes #176

Change-Id: Ie2504140bfc70eba0d88fd763aacd87895aa20ff
2018-03-02 19:41:31 -08:00
Tim Newsome 5767fa8e04
Merge pull request #219 from riscv/propagate_errors
Only propagate register errors on some targets
2018-03-02 12:07:55 -08:00
Tim Newsome 1d9418fbb0 Only propagate register errors on some targets
Without this change, connecting to ARM targets is impossible.

Fixes #115.

Change-Id: Ie33c7e15ac1bed8c9cbd8e6a78de92d5498c5999
2018-03-01 15:11:11 -08:00
Tim Newsome 0c8235d11f
Merge pull request #216 from kaspar030/fix_some_fallthroughs
target/riscv: add some switch fallthrough comments
2018-02-28 12:31:22 -08:00
Tim Newsome d388f1cbb2
Merge pull request #218 from riscv/auth
Add `riscv authdata_read` and `riscv authdata_write` commands to support arbitrary authentication through TCL scripts
2018-02-28 09:20:31 -08:00
Tim Newsome 39716b15ab Fix authentication for multi-core targets.
When authdata_write sets the authenticated bit, examine() every OpenOCD
target that is connected to the DM that we were authenticated to.

Change-Id: I542a1e141e2bd23d085e507069a6767e66a196cd
2018-02-27 14:22:06 -08:00
Tim Newsome 10108b623d Add `authdata_read` and `authdata_write` commands.
They can be used to authenticate to a Debug Module.

There's a bit of a chicken and egg problem here, because the RISCV
commands aren't available until the target is initialized, but
initialization involves examine(), which can't interact with the target
until authentication has happened. So to use this you run `init`, which
will print out an error, and then run the `riscv authdata_read` and
`riscv authdata_write` commands. When authdata_write() notices that the
authenticated bit went high, it will call examine() again.

Example usage (very simple challenge-response protocol):
```
init

set challenge [ocd_riscv authdata_read]
riscv authdata_write [expr $challenge + 1]

reset halt
```

Change-Id: Id9ead00a7eca111e5ec879c4af4586c30af51f4d
2018-02-27 09:27:00 -08:00
Tim Newsome 9033d99491
Merge pull request #217 from riscv/disable_target64
build with --disable-target64
2018-02-26 12:06:47 -08:00
Tim Newsome 3c1c6e059c
Merge pull request #203 from riscv/sysbusbits
Add support for system bus master, and for targets that don't have any program buffer
2018-02-20 09:22:22 -08:00
Kaspar Schleiser d570f89303 target/riscv: add some switch fallthrough comments 2018-02-20 14:31:31 +01:00
Tim Newsome 6b02ab4196 Fix build with --disable-target64
Change-Id: I5acf47845ff197a1aeb31356de7e4cd8ce63d476
2018-02-19 15:07:10 -08:00
Tim Newsome cf895486b6 Add a build with --disable_target64
Change-Id: Ibe52a678ab7b8145ffaa54dce38149aa95bdb48c
2018-02-19 14:25:48 -08:00
Tim Newsome 352e6b82ed
Merge pull request #208 from riscv/run_from_trigger
Handle resuming from a trigger...
2018-02-19 13:42:50 -08:00
Tim Newsome 6cbb45f7f1
Merge pull request #205 from riscv/update
Merge changes from upstream.
2018-02-08 11:36:11 -08:00
Gleb Gagarin 2e415b3930
Merge pull request #210 from riscv/reset_before_hart_enum
complete reset before writing to hartsel field
2018-02-07 18:35:06 -08:00
Gleb Gagarin 5c543ee3a1 complete reset before writing to hartsel field 2018-02-07 16:06:02 -08:00
Tim Newsome ace6b7e49a Handle resuming from a trigger...
... by disabling all triggers, single stepping, enabling them, and then
resuming as usual. Without this change, you'd just be stuck on an
address trigger and would have to manually disable it.

Change-Id: I5834984671baa6b64f72e533c4aa94555c64617e
2018-02-07 13:30:23 -08:00
Tim Newsome 706af27eee Merge branch 'master' into update
Change-Id: I2cd34ed5bb1903736ae8ce109acebaf13bf49805
2018-02-02 14:17:32 -08:00
Tim Newsome 6e278cded6
Merge pull request #199 from riscv/regname
Mention register name instead of number in error
2018-02-01 12:05:33 -08:00
Tomas Vanek c2b2a7a3b8 Kinetis_ke: add KEAx family to texi and cfg comment
Change-Id: Id8f676b027f57fc540473c1a3a01bdd2ec49a200
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4232
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
2018-02-01 19:38:49 +00:00
Tim Newsome a80ab87efd Add unreachable return for mingw build.
Change-Id: I8c0c4d7be8f6f28638cc2b5ae8114f5c8f95f94b
2018-01-31 16:55:43 -08:00
Tim Newsome 7114ef485c Fix cut and paste bug.
Change-Id: I1c554cbe3d7cb7845bc62f14ae6b8dff107eb192
2018-01-31 16:45:33 -08:00
Tim Newsome bb2c25c5ce Make OpenOCD work when there is no program buffer.
Fixed abstract register access for registers that aren't XLEN wide.
Avoided excessive errors cases where we attempted to execute a fence but
failed.
Don't mark all the CSRs as caller-save. gdb was saving/restoring
dscratch, which broke function calls as a side effect. dscratch is
accessible for people who really know what they're doing, but gdb should
never quietly access it. The same is probably true for other CSRs.

Change-Id: I7bcdbbcb7e3c22ad92cbc205bf537c1fe548b160
2018-01-31 15:33:45 -08:00
Tim Newsome 6f0d70f5c8 Mention register name instead of number in error
Change-Id: I5be5e57418e672fc76383fc24635cdbfb1e65578
2018-01-30 12:30:39 -08:00
Tim Newsome ee93a9b2f1 Add error handling code to system bus read/write
It's not tested because spike never reports any busy errors since every
access happens instantaneously.

Change-Id: If43ea233a99f98cd419701dc98f0f4a62aa866eb
2018-01-30 08:53:46 -08:00
Paul Fertser 5a98ff786e tcl: interface: harmonise RPi configs
Make all configs specify same JTAG and SWD GPIO numbers.

Change-Id: I65b09c1671c97f253f0aab88e511de7409d91e0a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3932
Tested-by: jenkins
2018-01-30 07:39:24 +00:00
Paul Fertser 3c9bd7c6f3 flash: nor: jtagspi: fix jtagspi_read_status() warning
Clang static analyzer says that in certain cases "Assigned value is
garbage or undefined" there.

Change-Id: Ib35a4cf7a553ba9461270a0dc4c4b9b205091e73
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4338
Tested-by: jenkins
2018-01-30 07:36:51 +00:00
Paul Fertser ab597027ea doxygen: fix issues with recent Doxygen versions
This fixes parsing of several documentation files which do not have
dot in the filename.

style.txt change fixes doxygen warnings and ensures proper display of
comment begin/end instructions in HTML.

Tested with Doxygen 1.8.13.

Change-Id: I9fd9ac3b51b47076b8fdbd3e93b90c3eba9b9631
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4342
Tested-by: jenkins
2018-01-30 07:35:50 +00:00
Paul Fertser fa86553e76 x86_32_common: fix some warnings
Mostly "Dead assignment" reported by Clang static analyzer.

Change-Id: Ibf81d2ba2462570ee3a40e57a60c55a1d1fa0c00
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4351
Tested-by: jenkins
2018-01-30 07:34:32 +00:00
Tim Newsome 0f0c5b1ff5 Merge branch 'riscv' into sysbusbits
Change-Id: Ib7921c73a4bdd586703031be3509d1dec9bb3913
2018-01-29 11:39:14 -08:00
Tim Newsome ec543bdc7b
Merge pull request #198 from riscv/hartsellen
Detect hartsellen, limiting which harts we probe
2018-01-29 11:11:00 -08:00
Tomas Vanek dd890d4cad arm_adi_v5: fix return value of mem_ap_read/write for size 0
Unhandled marginal case produced a warning in Clang static analyzer.

Change-Id: I3e2fc4182fa4f863acfb972b1e7a512fce5bf33a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Suggested-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/4357
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-29 14:47:40 +00:00
Matthias Welwarsky 1ac0f5d493 aarch64: clean up scan-build errors
scan-build reported a couple of problems with code in aarch64.c,
this patch cleans them up. No functional changes.

Change-Id: Ie210237ddc840a8bbcd535f86a3a5faf473132f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4346
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-01-29 08:24:17 +00:00
Paul Fertser e60573c528 jtag: drivers: usb_blaster: clarify lowlevel driver selection code
This patch should make the code logic more transparent and user
notifications more useful.

It also fixes a warning "array subscript is below array bounds" that
leads to FTBFS on Raspbian GNU/Linux 8 (jessie).

Change-Id: I626b6a5bc013dfee7d36cf196f0abab981d30675
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3931
Tested-by: jenkins
2018-01-27 17:16:02 +00:00
Tim Newsome 6a98fb7076 Detect hartsellen, limiting which harts we probe
Tested with doctored spike with hartsellens of 0, 1, 3, and 10.

Change-Id: I97f57c7d03b076792d5ecd66545d9b9e853ed515
2018-01-26 16:39:58 -08:00
Tim Newsome 5184c32125 Clear errors that we see.
Also WIP towards handling busy errors, but I'm putting that on hold
while I change the spec...

Change-Id: Iccf47048da46e75b0d769e56004fd783bba1dbf0
2018-01-26 15:43:05 -08:00
Tim Newsome b67379700b Add support for v1 system bus access.
This is functional, but doesn't handle errors.

Change-Id: Ifb46af1b0b567f3c2a6135b2ad5eb7ba63a3f595
2018-01-26 15:43:05 -08:00
Tim Newsome beac00149c Use new debug_defines.h
Change-Id: Iefc8424343dbed05fa9dacc626829955fc16f299
2018-01-26 15:41:45 -08:00
Daniel Kucera a0c4c9e717 nor/nrf5: added nrf51822 QFAAH2
Change-Id: I59725e098371c63ec3e6aa1d91bfed36b824a182
Signed-off-by: Daniel Kucera <daniel.kucera@gmail.com>
Reviewed-on: http://openocd.zylin.com/4334
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-26 22:38:27 +00:00
Matthias Welwarsky a640f139ba aarch64: implement mmu on/off for aarch32
add decoding of aarch32 core modes (register layout is compatible)

Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-01-26 10:53:09 +00:00
Tim Newsome 68c57474f9
Merge pull request #192 from riscv/memlog
Make all memory logging lines consistent.
2018-01-25 10:51:35 -08:00
Tim Newsome 64f1f7b1c1 Add read buffer to bitbang, improving performance.
Previously for every bit scanned OpenOCD would write the bit, wait for
that bit to be scanned, and then read the result. This involves at least
2 context switches. Most of the time the next bit scanned does not
depend on the last bit we read, so with a buffer we now write a bunch of
bits to be scanned all at once, and then we wait for them all to be
scanned and have a result.

This reduces the time for one testcase where OpenOCD connects to a
simulator from 12.30s to 5.35s!

Running all our tests went from 13m13s to 3m55s.

Change-Id: Ie9fcea043ac1d7877a521125334ed47d4b3e1615
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4312
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-01-25 16:44:06 +00:00
Christopher Head 2428722a23 Use timeval helpers
Some of these changes actually fix broken comparisons which could
occasionally fail. Others just clean up the code and make it more clear.

Change-Id: I6c398bdc45fa0d2716f48a74822457d1351f81a5
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:43:49 +00:00
Christopher Head e0fc7a54f2 Add timeval_compare helper function
Change-Id: Id75727a150912ff778a4fa32ad56467da33a6324
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4379
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:43:45 +00:00
Paul Fertser e22c6484ea tcl: target: klx: use 1KiB for working area
Some parts have only that much. Reported by robertfoos_ on IRC.

Change-Id: I684fdccfa62cf726466ddc467543a990fd88c4dc
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4369
Reviewed-by: Robert Foss <robert.foss@memcpy.io>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-01-25 16:41:32 +00:00
Tomas Vanek b7be0a873c flash Kinetis: add K27 and K28 devices
Tested on FRDM-K28F. Thanks to Thomas Varghese for donating the kit.

Change-Id: Idcdd8bcf992acebd19e5335f7f833356500c45dd
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4255
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2018-01-25 16:40:58 +00:00