Commit Graph

7 Commits (c3ea15dc62afcbdb69f4d8ee74c782426b650133)

Author SHA1 Message Date
Paul Fertser a09a75653d armv7m: add generic trace support (TPIU, ITM, etc.)
This provides support for various trace-related subsystems in a
generic and expandable way.

Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2538
Tested-by: jenkins
2015-03-25 20:46:43 +00:00
Uwe Bonnes 3e1dfdcb85 stm32l1.cfg: Add missing dash to fix f7394049d3 commit.
Change-Id: Ifeb2d4fc2b43813edbc6fe2cf08bfd4c55cd1e86
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2590
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Stian Skjelstad <stian@nixia.no>
2015-03-10 07:35:37 +00:00
Uwe Bonnes f7394049d3 stm32l1.cfg: Add ID Code of Cat.2 devices.
Change-Id: I4eb5020858c1896e294d633213f3df3fa45b6250
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/2517
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2015-03-09 06:26:45 +00:00
Paul Fertser a1bbf4b75b cfg: add srst_nogate to the supported targets, remove from board configs
It depends on the particular target whether it can work with SRST
asserted or not, so this belongs to the target config rather than the
board config.

Also, this allows for simple

openocd -f myboard.cfg -c "reset_config connect_assert_srst"

command to be used whenever a user feels a need to connect to an
unresponsive target.

Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2459
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-26 20:54:51 +00:00
Karl Palsson 1663a17d9d target/stm32xx: Endian is not configurable.
So remove it from all the configs, it's misleading, and leads to cargo
culting of config files.

Change-Id: I2b77e60d5e96f9759c7c9fc91b20e73be2e95d9a
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2446
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-15 23:26:18 +00:00
Karl Palsson 0ea9a66239 cfg: stm32l1: Use specific chipname
This should have been corrected earlier with the split of l1/l0 code
apart.

Change-Id: I87b94a310ae7e76318554a9cd2705348a942d58b
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2447
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-01-15 23:20:44 +00:00
Karl Palsson c3ec1940b5 stm32l: split l0/l1 support no jtag, different HSI settings
L0 is cortex m0+, so different id codes, SWD only, different addresses
for the clock speedup.  It has no endian options, no boundary scan.

Removed all L0 specific portions from L1 files, and renamed files to clarify
their purpose.  The deprecated stm32lx_stlink.cfg is kept as is, as it is only
around for backwards compatibility with prior releases.

Tested on STM32L053 Discovery and STM32L151 Discovery.

Has _not_ been tested with jtag on L1.

Change-Id: I8eea890d2f92a302d9e9c8a8832d218ee1b6bcfc
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2405
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Juha Niskanen <juha.niskanen@haltian.com>
2014-12-03 09:10:21 +00:00