This is a complete flash driver for the Infineon XMC4xxx family of
microcontrollers, based on the TMS570 driver by Andrey Yurovsky.
The driver attempts to discover the particular variant of MCU via a
combination of the SCU register (to determine if this is indeed an
XMC4xxx part) and the FLASH0_ID register (to determine the variant).
If this fails, the driver will not load.
The driver has been added to the README and documentation.
Tests:
* Hardware: XMC4500 (XMC4500_relax), XMC4200 (XMC4200 enterprise)
* SWD + JTAG
* Binary: 144k, 1M
Note:
* Flash protect only partly tested. These parts only allow the flash
protection registers (UCB) to be written 4 times total, and my devkits
have run out of uses (more on the way)
Future Work:
* User 1/2(permalock) locking support via custom command
* In-memory flash loader bootstrap (flashing is rather slow...)
Change-Id: I1d3345d5255d8de8dc4175cf987eb4a037a8cf7f
Signed-off-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2488
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This is a driver for the Atmel Cortex-M7 SAMV, SAMS, and SAME.
I started with the at91sam4.c driver and then restructured it
significantly to try to simplify it and limit the functionality
to just a flash driver, as well as to comply with the style guide.
Change-Id: I5340bf61f067265b8ebabd3adad45be45324b707
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/2952
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
New configuration for NXP LPC4370 which consists of a Cortex-M4
and two Cortex-M0 cores.
Change-Id: I9918e3ff33218a14a99e4bbab9dce2e7b45b4d96
Signed-off-by: Jim Norris <u17263@att.net>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: La Fonera FON2200
Change-Id: Ibfdbfc9c2beca6cf436c9ee5e493b08bfb55ac85
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2839
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: Netgear WP102
Change-Id: Id93957b5d5851a272f15be35f9f448a9ce6d8a08
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2835
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Default to lpc8xx as before, but allow setting the actual CHIPNAME.
Change-Id: I5a48fa75c640440a0d4c3f2858653e94bed846d2
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3084
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reuse the flashless LPC4350 as base and amend it as necessary.
The LPC43x7 have 2x 512 KB of flash.
Change-Id: Ia7ffbc7101023479971984b839f171ed4be6b089
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3037
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Add support for the JTAG TAPID found on SK-FM4-U120-9B560-MEM V1.1.0 board.
Change-Id: Idbfe28927e0c549f0c89c29904d23971281927c9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3039
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
It is found on the SK-FM4-U120-9B560-MEM V1.1.0 among others.
Change-Id: I4c708c9391e954cbbc8d0860a2a2dbd264aea865
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3008
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Its memory layout is different from MB9BFxxx.
Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The XS1-XAU8A-10 has 8 xCORE cores and one ARM core.
This config represents the ARM Cortex-M3 core, which is apparently
Silicon Labs EFM32 Giant Gecko IP.
Change-Id: I998360f096c759d2e274d96c1ca2e0450ba61146
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2762
Tested-by: jenkins
Reviewed-by: Oleksij Rempel
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Flash driver "mini51.c" and "nuc1x.c" are same target MCU.
This patch integrates each driver and functions,
and makes into new "NuMicro" flash driver.
Change-Id: Ifff5c1cfdd265acca0f489631695be9194fa144c
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/2794
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
A target config and a simple flash driver for the ADuCM360 microcontroller.
The EEPROM of the chip may be erased and programmed.
Change-Id: Ic2bc2f91ec5b6f72e3976dbe18071f461fe503b8
Signed-off-by: Ivan Buliev <i.buliev@mikrosistemi.com>
Reviewed-on: http://openocd.zylin.com/2787
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
As found on the Parallella-I board SKU A101020.
Change-Id: Ie7e7a36325926d67fbe555b46a9be8a74fac8dba
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2729
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This covers only the Cortex-A5 for now, not the Cortex-M4.
Change-Id: I739ec52b14b83d6e9f124ed61f8941502e481402
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2766
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
code polishing to be consistent with other scripts
Change-Id: Ib52a92f48df9d2bdf543792b856e33aa04dbebe3
Signed-off-by: Radek Dostal <radek.dostal@streamunlimited.com>
Reviewed-on: http://openocd.zylin.com/2779
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Split TMS570 target into LS31/LS21 and LS20/LS10 targets.
Board for the TMS570LS20SUSB Kit, which uses the TMS570 Cortex-R4 MCU from TI.
Tested attaching.
Change-Id: I1a69ac1ed800d0d6b7f9860c19cbd149e3e47620
Signed-off-by: Alex Ray <a@machinaut.com>
Reviewed-on: http://openocd.zylin.com/2089
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Use mmw to manipulate only selected bits of the word. msb and mwb verify the
memory location and may error on PLLRDY set as a result of PLLON written.
Change-Id: I9a4c1e58f002a1e5e99be1bd34aac27ba65d111d
Reported-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2702
Tested-by: jenkins
This is a remake of http://openocd.zylin.com/1966
originally written by Angus Gratton <gus@projectgus.com>
ATSAM4L has a "System Manager Access Port" (SMAP) that holds the CPU
in reset if TCK is low when srst (RESET_N) is deasserted.
Without this change any use of sysresetreq or srst locks the chip
in reset state until power is cycled.
A new function smap_reset_deassert is called as reset-deassert-post event handler.
It optionally prepares reset vector catch and SMAP reset is released then.
Change-Id: Iad736357b0f551725befa2b9e00f3bc54504f3d8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2604
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Assembled by trial-and-error for an S6E2CC.
Change-Id: I317c12d24c9075ce3de286455fa3ee45731c5c81
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2569
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Original submitted code had only been tested with em358, but testing with
actual em357 revealed errors that this patch corrects.
Change-Id: I70cf31210de8ed84e3755a56e76261ad200322bb
Signed-off-by: Ed Beroset <beroset@ieee.org>
Reviewed-on: http://openocd.zylin.com/2581
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Base config, verified against XMC4500, XMC4400 and XMC4100/XMC4200 manuals.
Change-Id: I10907bdf307bc6d11dc5454bf5391758de49dc30
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2480
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
this is just to avoid open coding that in
icepick_d_tapenable. Cleanup only, no functional
changes.
Change-Id: Iabd20291b7bdd95957afa1c74f52171789201227
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2624
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
it also works on icepick_d.
Change-Id: I50c0c81286aae673c94ea77e47454ff48eab1668
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2623
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reusing what's already there to ease maintainability.
Change-Id: I2030581669c644e2d9d9f9968075ab6344445d04
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2622
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This commit is only for the sake of completeness as
default coreid is zero. In any case, coreids 1-4 are
used for the different PRU cores inside the SoC.
Change-Id: I775f2f444b1a908ffaf7bdbc43bcc966f19668c4
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2621
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Use more descriptive names for JRC and DAPs
so they more closely match documentation.
For example there's no Cortex A9 DAP, that's
the DebugSS DAP where Cortex A9 target sits. In
that same DAP we have have ETM, STM and both
dual-PRU subsystems.
Change-Id: I0e66ebb6299763f96606fae3e4c62e5785c804f2
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2620
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Main DAP (where Cortex A9 sits) ID is actually
0x46b6902f. Fix it.
Change-Id: Ifa3335186bcf60d264d4ecea477bfe2f5ca10ead
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2619
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
this event handler will configure and lock PLLs
and configure DDR so platform is placed in usable
state.
Change-Id: Idd02f4c9789181d69578f8606ac3576ea1dd8a0b
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2616
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
sometimes, watchdog might be left running and
it could expire in the middle of a debug session,
to prevent that, just make sure to disable watchdog
on reset-end if current state is 'halted'.
Change-Id: Ib4f2a2321cba17cd8c56ca3ae63114a563a6de90
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2615
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
a later commit will implement a proper reset-init
handler to lock pll and configure ddr as we should.
Change-Id: I432cf28a5a944bfa83c20aed7298dbd29df30e38
Tested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2614
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
According to AM4379 TRM [1], table 2-1 L3 Memory Map,
we have a total of 256KiB and there's no reason not to
use it all.
[1] http://www.ti.com/lit/ug/spruhl7b/spruhl7b.pdf
Change-Id: I117f2afe721bc4e3f0df304d3542e1a91aa69d12
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2611
Tested-by: jenkins
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Since commit ec9ccaa288 (arm_adi_v5: make dap_lookup_cs_component()
traverse subtables and handle multicore) AM437x devices can't be used
with OpenOCD anymore. The reason is that dbgbase used to be set to zero
before that commit and that just happens to work with AM437x devices.
A more robust solution is to pass correct dbgbase when creating the
target, which this commit does.
Signed-off-by: Felipe Balbi <balbi@ti.com>
Change-Id: Iaf2617804324de8094b25137943e08b84f14c75f
Reviewed-on: http://openocd.zylin.com/2602
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This should allow most of the existing configurations for older
versions to remain compatible without forcing the user to change his
or her config to explicitly select transport.
Also in some circumstances can remove the need to chain a "-c transport
select X" when building custom configs on the command line, which seems
like a common new user pitfall.
Change-Id: Ic87a38c0b9b88e88fb6d106385efce2f39381d3d
Suggested-by: Petteri Aimonen <jpa@git.mail.kapsi.fi>
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/2551
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Valgrind-tested.
Comparison of flashing performance on an FRDM-KL25Z board running mbed
CMSIS-DAP variant, 5MHz clock, old driver:
wrote 28096 bytes from file demo.elf in 26.833590s (1.023 KiB/s)
verified 27264 bytes in 1.754972s (15.171 KiB/s)
this implementation:
wrote 28096 bytes from file demo.elf in 3.691939s (7.432 KiB/s)
verified 27264 bytes in 0.598987s (44.450 KiB/s)
Also tested "Keil ULINK-ME CMSIS-DAP" with an STM32F100 target, 5MHz
clock, results reading from flash, old driver:
dumped 131072 bytes in 98.445305s (1.300 KiB/s)
this implementation:
dumped 131072 bytes in 8.242686s (15.529 KiB/s)
Change-Id: Ic64d3124b1d6cd9dd1016445bb627c71e189ae95
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2356
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This provides support for various trace-related subsystems in a
generic and expandable way.
Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2538
Tested-by: jenkins
Keep clocks running in low power modes. Stop watchdogs from interfering
with the debug session. Set up PLL and increase clock at reset init.
Change-Id: I984d2018f7d47a1042f1e12894563154fa7b566c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2196
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Initial Support for AT91SAM7A2 on Olimex SAM7-LA2 board.
The board seems not to be able to reset into halted mode, as srst is
connected to NRESET of the cpu (configured srst_pulls_trst).
JTAG RCLK is connected to CLK.
Tested with interface/ftdi/olimex-arm-usb-ocd-h.cfg.
Change-Id: I2bdd67e3683e45f1119c5850bad294aa107891d8
Signed-off-by: Arne Wichmann <arne.wichmann@gmail.com>
Reviewed-on: http://openocd.zylin.com/2318
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This adds configs for Alphascale asm9260t ARM based SoC and
Evaluation Kit based on this chip.
Change-Id: Id8d3a1ef204e3ae84540c2693e3d62650ba82f73
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2515
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Rémi PRUD’HOMME
Jeff Ciesielski
Morgan Quigley
Jim Norris
Oleksij Rempel
Andreas Färber
Nemui Trinomius
Ivan Buliev
Radek Dostal
Jiri Kastner
Alex Ray
Spencer Oliver
Paul Fertser
Tomas Vanek
Ed Beroset
Felipe Balbi
Angus Gratton
Uwe Bonnes
Andreas Fritiofson
Arne Wichmann