of as a side effect of target->type->poll(). This makes it clearer when things
happen during reset/examine.
git-svn-id: svn://svn.berlios.de/openocd/trunk@585 b42882b7-edfa-0310-969c-e2dbd0fdcd60
that sw_bkpts also fails if the target is an unknown state(i.e.
not examined yet).
- feroceon embedded ICE registers are now set up after TRST
has been deasserted(not tested, but it was broken as is
anyway).
git-svn-id: svn://svn.berlios.de/openocd/trunk@582 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- support new str91x/str9xpec devices
- update target scripts and docs for changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@577 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Work in progress to allow launching GDB/telnet server *before* jtag
chain enum, validate & examine
git-svn-id: svn://svn.berlios.de/openocd/trunk@569 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- DCRDR now used to access special core registers - info is currently omitted from the cortex_m3 TRM ARM have told me this is the preferred access method and the docs will be updated soon.
- now checks for User Thread Mode and Thread mode when halted.
- removed repeated function declarations from command.c
- cortex_m3_prepare_reset_halt removed, updated cortex_m3_assert_reset to suit
git-svn-id: svn://svn.berlios.de/openocd/trunk@558 b42882b7-edfa-0310-969c-e2dbd0fdcd60
to daemon_startup(still supported).
- print warning if srst and trst change state at the same time when srst_and_trst
is seperate
- reset now performs a trst, examines and validates the jtag chain before targets
assert reset
- if startup fails to examine and validate the jtag chain, try a reset before
trying again
git-svn-id: svn://svn.berlios.de/openocd/trunk@552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- If communication fails during assert between assert/deassert and during
assert, warnings are printed. The warning suggests using srst_only if the
clock locks up as that would allow the reset vector to be set up before
asserting reset.
git-svn-id: svn://svn.berlios.de/openocd/trunk@544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
as an optional parameter with default reset_init. This is to streamline
things w.r.t. the target library.
git-svn-id: svn://svn.berlios.de/openocd/trunk@540 b42882b7-edfa-0310-969c-e2dbd0fdcd60
for a bit more info before I can tell with confidence whether or not
this would have any effect.
- worked on error propagation and output for flash
git-svn-id: svn://svn.berlios.de/openocd/trunk@539 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Wrote a default flash erase check fn which uses CFI's target algorithm
w/fallback to memory reads.
- "flash info" no longer prints erase status as it is stale.
- "flash erase_check" now prints erase status. erase check can take a
*long* time. Work in progress
- arm7/9 with seperate srst & trst now supports reset init/halt
after a power outage. arm7/9 no longer makes any assumptions
about state of target when reset is asserted.
- fixes for srst & trst capable arm7/9 with reset init/halt
- prepare_reset_halt retired. This code needs to be inside
assert_reset anyway
- haven't been able to get stm32 write algorithm to work. Fallback
flash write does work. Haven't found a version of openocd trunk
where this works.
- added target_free_all_working_areas_restore() which can
let be of restoring backups. This is needed when asserting
reset as the target must be assumed to be an unknown state.
Added some comments to working areas API
- str9 reset script fixes
- some guidelines
- fixed dangling callbacks upon reset timeout
git-svn-id: svn://svn.berlios.de/openocd/trunk@536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
oharboe
ntfreak
mifi